This is an automated email from the git hooks/post-receive script.
unknown user pushed a change to branch devel/c++-coroutines in repository gcc.
from 31b3c1cb0e3 Merge master r12-2285. adds acd4b9103c1 rs6000: Add support for SSE4.1 "test" intrinsics adds 60aee15bb7e rs6000: Add tests for SSE4.1 "test" intrinsics adds 8695bf78dad gcc: Add vec_select -> subreg RTL simplification adds 0e7754560f6 Daily bump. adds 66907e73995 adjust landing pads when changing main label adds a7098d6ef4e fix typo in attr_fnspec::verify adds 1dd3f210958 Support reduction def re-use for epilogue with different ve [...] adds 3be762c2ed7 godump: Fix -fdump-go-spec= reproduceability issue [PR101407] adds a967a3efd39 tree-optimization/101445 - fix negative stride SLP vect with gaps adds f9c2ce1dae2 libstdc++: Add noexcept-specifier to basic_string_view(It, End) adds cc11b924bfe x86: Don't enable UINTR in 32-bit mode adds ab0a6b213ab Vect: Add support for dot-product where the sign for the mu [...] adds 752045ed1ee AArch64: Add support for sign differing dot-product usdot f [...] adds 6412c58c781 AArch32: Add support for sign differing dot-product usdot f [...] adds 1e0ab1c4ba6 middle-end: Add tests middle end generic tests for sign dif [...] adds c9165e2d58b AArch32: Correct sdot RTL on aarch32 adds 6d1cdb27828 AArch64: Correct dot-product auto-vect optab RTL adds 269ca408e28 Fortran - ICE in gfc_conv_expr_present initializing non-dum [...] adds a42f8120442 c++: constexpr array reference and value-initialization [PR101371] adds 398572c1544 Turn hybrid mode off, default to ranger-only mode for EVRP. adds 4940166a151 Vect: correct rebase issue new 0d8a54a3526 Merge master r12-2306.
The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: gcc/ChangeLog | 186 ++++++++++++ gcc/DATESTAMP | 2 +- gcc/combine.c | 14 + gcc/config/aarch64/aarch64-simd-builtins.def | 9 +- gcc/config/aarch64/aarch64-simd.md | 64 ++--- gcc/config/aarch64/aarch64-sve-builtins-base.cc | 2 +- gcc/config/aarch64/aarch64-sve.md | 2 +- gcc/config/aarch64/aarch64.md | 11 +- gcc/config/aarch64/arm_neon.h | 12 +- gcc/config/arm/neon.md | 20 +- gcc/config/arm/vfp.md | 2 +- gcc/config/i386/driver-i386.c | 25 +- gcc/config/i386/i386-options.c | 1 + gcc/config/i386/i386.h | 7 +- gcc/config/rs6000/smmintrin.h | 56 ++++ gcc/cp/constexpr.c | 15 +- gcc/cse.c | 14 + gcc/doc/md.texi | 52 +++- gcc/doc/sourcebuild.texi | 9 + gcc/fortran/trans-expr.c | 5 +- gcc/godump.c | 4 +- gcc/optabs-tree.c | 7 +- gcc/optabs-tree.h | 3 +- gcc/optabs.c | 32 ++- gcc/optabs.def | 1 + gcc/params.opt | 2 +- gcc/rtl.c | 15 + gcc/rtl.h | 1 + gcc/rtlanal.c | 19 ++ gcc/rtlanal.h | 3 + gcc/simplify-rtx.c | 10 + gcc/testsuite/ChangeLog | 157 +++++++++++ gcc/testsuite/g++.dg/cpp1y/constexpr-101371-2.C | 23 ++ gcc/testsuite/g++.dg/cpp1y/constexpr-101371.C | 29 ++ gcc/testsuite/gcc.dg/pr80776-1.c | 2 +- gcc/testsuite/gcc.dg/vect/pr101445.c | 28 ++ gcc/testsuite/gcc.dg/vect/vect-reduc-dot-10.c | 13 + gcc/testsuite/gcc.dg/vect/vect-reduc-dot-11.c | 13 + gcc/testsuite/gcc.dg/vect/vect-reduc-dot-12.c | 13 + gcc/testsuite/gcc.dg/vect/vect-reduc-dot-13.c | 13 + gcc/testsuite/gcc.dg/vect/vect-reduc-dot-14.c | 13 + gcc/testsuite/gcc.dg/vect/vect-reduc-dot-15.c | 13 + gcc/testsuite/gcc.dg/vect/vect-reduc-dot-16.c | 13 + .../{vect-reduc-dot-1.c => vect-reduc-dot-17.c} | 13 +- .../{vect-reduc-dot-1.c => vect-reduc-dot-18.c} | 15 +- .../{vect-reduc-dot-1.c => vect-reduc-dot-19.c} | 21 +- .../{vect-reduc-dot-1.c => vect-reduc-dot-20.c} | 21 +- .../{vect-reduc-dot-1.c => vect-reduc-dot-21.c} | 21 +- .../{vect-reduc-dot-1.c => vect-reduc-dot-22.c} | 21 +- .../{vect-reduc-dot-1.c => vect-reduc-dot-9.c} | 11 +- .../gcc.target/aarch64/extract_zero_extend.c | 9 - .../gcc.target/aarch64/narrow_high_combine.c | 314 ++++++++++++++------- .../gcc.target/aarch64/simd/vmulx_laneq_f64_1.c | 2 +- .../gcc.target/aarch64/simd/vmulxd_laneq_f64_1.c | 2 +- .../gcc.target/aarch64/simd/vmulxs_lane_f32_1.c | 2 +- .../gcc.target/aarch64/simd/vmulxs_laneq_f32_1.c | 2 +- .../gcc.target/aarch64/simd/vqdmlalh_lane_s16.c | 2 +- .../gcc.target/aarch64/simd/vqdmlals_lane_s32.c | 2 +- .../gcc.target/aarch64/simd/vqdmlslh_lane_s16.c | 2 +- .../gcc.target/aarch64/simd/vqdmlsls_lane_s32.c | 2 +- .../gcc.target/aarch64/simd/vqdmullh_lane_s16.c | 2 +- .../gcc.target/aarch64/simd/vqdmullh_laneq_s16.c | 2 +- .../gcc.target/aarch64/simd/vqdmulls_lane_s32.c | 2 +- .../gcc.target/aarch64/simd/vqdmulls_laneq_s32.c | 2 +- .../gcc.target/aarch64/simd/vusdot-autovec.c | 38 +++ gcc/testsuite/gcc.target/aarch64/sve/dup_lane_1.c | 20 +- gcc/testsuite/gcc.target/aarch64/sve/extract_1.c | 4 +- gcc/testsuite/gcc.target/aarch64/sve/extract_2.c | 4 +- gcc/testsuite/gcc.target/aarch64/sve/extract_3.c | 4 +- gcc/testsuite/gcc.target/aarch64/sve/extract_4.c | 4 +- gcc/testsuite/gcc.target/aarch64/sve/live_1.c | 5 +- .../gcc.target/aarch64/sve/vusdot-autovec.c | 38 +++ gcc/testsuite/gcc.target/arm/crypto-vsha1cq_u32.c | 4 +- gcc/testsuite/gcc.target/arm/crypto-vsha1h_u32.c | 4 +- gcc/testsuite/gcc.target/arm/crypto-vsha1mq_u32.c | 4 +- gcc/testsuite/gcc.target/arm/crypto-vsha1pq_u32.c | 4 +- .../gcc.target/arm/mve/intrinsics/vgetq_lane_f16.c | 4 +- .../gcc.target/arm/mve/intrinsics/vgetq_lane_f32.c | 4 +- .../gcc.target/arm/mve/intrinsics/vgetq_lane_s16.c | 4 +- .../gcc.target/arm/mve/intrinsics/vgetq_lane_s32.c | 4 +- .../gcc.target/arm/mve/intrinsics/vgetq_lane_s8.c | 4 +- .../gcc.target/arm/mve/intrinsics/vgetq_lane_u16.c | 4 +- .../gcc.target/arm/mve/intrinsics/vgetq_lane_u32.c | 4 +- .../gcc.target/arm/mve/intrinsics/vgetq_lane_u8.c | 4 +- gcc/testsuite/gcc.target/arm/simd/vusdot-autovec.c | 38 +++ gcc/testsuite/gcc.target/i386/pr101395-1.c | 12 + gcc/testsuite/gcc.target/i386/pr101395-2.c | 22 ++ gcc/testsuite/gcc.target/i386/pr101395-3.c | 6 + gcc/testsuite/gcc.target/i386/vect-reduc-1.c | 17 ++ .../gcc.target/{i386 => powerpc}/sse4_1-ptest-1.c | 4 +- gcc/testsuite/gfortran.dg/pr100949.f90 | 10 + gcc/testsuite/lib/target-supports.exp | 80 ++++++ gcc/tree-cfg.c | 9 +- gcc/tree-ssa-alias.c | 2 +- gcc/tree-vect-loop.c | 235 +++++++++------ gcc/tree-vect-patterns.c | 86 ++++-- gcc/tree-vect-stmts.c | 6 + libgomp/ChangeLog | 7 + libstdc++-v3/ChangeLog | 11 + libstdc++-v3/include/std/string_view | 1 + .../basic_string_view/cons/char/range.cc | 18 +- 101 files changed, 1700 insertions(+), 434 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-101371-2.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-101371.C create mode 100644 gcc/testsuite/gcc.dg/vect/pr101445.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-reduc-dot-10.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-reduc-dot-11.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-reduc-dot-12.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-reduc-dot-13.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-reduc-dot-14.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-reduc-dot-15.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-reduc-dot-16.c copy gcc/testsuite/gcc.dg/vect/{vect-reduc-dot-1.c => vect-reduc-dot-17.c} (72%) copy gcc/testsuite/gcc.dg/vect/{vect-reduc-dot-1.c => vect-reduc-dot-18.c} (69%) copy gcc/testsuite/gcc.dg/vect/{vect-reduc-dot-1.c => vect-reduc-dot-19.c} (58%) copy gcc/testsuite/gcc.dg/vect/{vect-reduc-dot-1.c => vect-reduc-dot-20.c} (58%) copy gcc/testsuite/gcc.dg/vect/{vect-reduc-dot-1.c => vect-reduc-dot-21.c} (58%) copy gcc/testsuite/gcc.dg/vect/{vect-reduc-dot-1.c => vect-reduc-dot-22.c} (53%) copy gcc/testsuite/gcc.dg/vect/{vect-reduc-dot-1.c => vect-reduc-dot-9.c} (72%) create mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vusdot-autovec.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/vusdot-autovec.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vusdot-autovec.c create mode 100644 gcc/testsuite/gcc.target/i386/pr101395-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr101395-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr101395-3.c create mode 100644 gcc/testsuite/gcc.target/i386/vect-reduc-1.c copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse4_1-ptest-1.c (94%) create mode 100644 gcc/testsuite/gfortran.dg/pr100949.f90