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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig in repository toolchain/ci/linux.
from 6327edceb62b Merge branch 'i2c/for-current' of git://git.kernel.org/pub [...] adds 4a350a0ee5b0 iommu/vt-d: Fix adding non-PCI devices to Intel IOMMU adds 7d4e6ccd1fb0 iommu: Remove device link to group on failure adds f78947c40920 iommu/vt-d: Unlink device if failed to add to group adds 55817b340a31 iommu/dma: fix variable 'cookie' set but not used adds 040a3c33623b Merge tag 'iommu-fixes-v5.5-rc5' of git://git.kernel.org/p [...] adds 13cf4cf03018 riscv: move sifive_l2_cache.h to include/soc adds dc6fcba72f04 riscv: Fixup obvious bug for fp-regs reset adds 373adb7313b2 Merge tag 'riscv/for-v5.5-rc6' of git://git.kernel.org/pub [...] adds b3a987b0264d Linux 5.5-rc6
No new revisions were added by this update.
Summary of changes: Makefile | 2 +- arch/riscv/kernel/head.S | 2 +- drivers/edac/sifive_edac.c | 2 +- drivers/iommu/dma-iommu.c | 3 --- drivers/iommu/intel-iommu.c | 22 ++++++++++++++++++---- drivers/iommu/iommu.c | 1 + drivers/soc/sifive/sifive_l2_cache.c | 2 +- .../asm => include/soc/sifive}/sifive_l2_cache.h | 6 +++--- 8 files changed, 26 insertions(+), 14 deletions(-) rename {arch/riscv/include/asm => include/soc/sifive}/sifive_l2_cache.h (72%)