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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig in repository toolchain/ci/llvm-project.
from b37f6d3af10 [llvm-exegesis] Remove unused variable after D72928 adds 67420f1b0e9 [lldb/Util] Add a utility to run transparently capture and [...] adds a17ad3592ff [lldb/Test] Check that attribute exists before comparing its value adds ea99c099634 [OpenMP] affinity little fix for FreeBSD adds 04de24e690d [lldb/IOHandler] Improve synchronization between IO handlers. adds fb3d9153c01 [clangd] Fix DocumentOutline for concepts adds d053b7a2978 [lldb/Docs] Add lldb-x86_64-fedora to the CI page adds f6418d72f57 AMDGPU/GlobalISel: Add documentation for RegisterBankInfo adds b70e4efb75b [mlir] Generalize broadcastable trait operands adds 2e42cc7a50e [NFC] small rename of private member in InlineCost.cpp adds fdb9cc7dc56 Fix printer for llvm.addressof symbol name that need escaping adds c12a5917d2f [Hexagon] Add support for Hexagon/HVX v67 ISA adds 8615eeb4556 AMDGPU: Partially merge indirect register write handling adds 9b13b4a0e3a AMDGPU: Prepare to use scalar register indexing adds 317fdcd09ae AMDGPU: Cleanup and generate 64-bit div tests adds c81fe34718d [lld][ELF] Don't apply --fix-cortex-a53-843419 to relocatab [...] adds d232c215669 [AsmPrinter] Don't emit __patchable_function_entries entry [...] adds edd4398f4cd Revert "PR17164: Change clang's default behavior from -flax [...] adds e5823bf806c AMDGPU: Don't create weird sized integers adds 385fb337de9 AMDGPU: Generate test checks adds fa40b41168f Revert "[libc++] Optimize / partially inline basic_string c [...] adds d1da63664f4 [lld][RISCV] Print error when encountering R_RISCV_ALIGN adds e446322f73f [llvm-objcopy][ELF] Allow setting SHF_EXCLUDE flag for ELF [...] adds c72aa27f917 AMDDGPU/GlobalISel: Fix RegBankSelect for llvm.amdgcn.ps.live adds 38bdb94120b [clangd] Fix rename for explicit destructor calls adds b16f82ad3b0 Revert "[MachO] Add a test for detecting reserved unit length." adds 5721483b642 [AMDGPU] Fix -Wunused-variable after e5823bf806ca9fa6f87583 [...] adds 02c1321139d [MC] Improve a report_fatal_error adds e15fb06e2d0 [RISCV] Pass target-abi via module flag metadata adds a80291ce10b Revert "[AMDGPU] Invert the handling of skip insertion." adds 65f6ee618e7 [gn build] Port a80291ce10b adds fffea2842d2 [MLIR] LLVM Dialect: add llvm.cmpxchg and improve llvm.atom [...] adds ff9877ce34b [ARM][MVE] Enable masked scatter adds 6b4f86f65f1 Reapply: [MachO] Add a test for detecting reserved unit length. adds dbd0ad33668 [LLD][ELF] Add support for INPUT_SECTION_FLAGS adds a672f579a2f Regenerate rotated uxt tests adds 8d2e6bdbe14 [TargetLowering] SimplifyDemandedBits - Pull out InDemanded [...] adds d6f4cfdbd79 [llvm-exegesis] Add support for AVX512 explicit rounding operands. adds 5f5f4785648 [DAG] Fold extract_vector_elt (scalar_to_vector), K to unde [...] adds 89e6601fb15 [llvm-readelf][llvm-readobj] - Fix the indentation when pri [...] adds bc29069dc40 [analyzer] Enable PlacementNewChecker by default adds 4e8116f4692 [ELF] Refactor uses of getInputSections to improve efficiency NFC adds 1f7b95d038e [lldb][NFC] Convert LLDB_LOGF to LLDB_LOG in ClangASTSource.cpp adds 87632b9e061 [llvm-exegesis] Fix support for LEA64_32r. adds 9a52ea5cf9c Create a gpu.module operation for the GPU Dialect. adds 3f9b6b270f8 [lldb] Use llvm::stable_sort in Line adds bc8a1ab26fb [Alignment][NFC] Use Align with CreateMaskedLoad adds 295aea80789 [llvm-readobj] - Remove rpath.test. adds 139771f8b02 [Alignment][NFC] Use Align with CreateElementUnorderedAtomi [...] adds 5181c67febc AMDGPU/GlobalISel: Add some baseline tests for unmerge lega [...] adds fccd0da5ee6 [clang-tidy] New check: bugprone-misplaced-pointer-arithmet [...] adds 65a31a97b45 [gn build] Port fccd0da5ee6 adds 18a96fd573b [lldb/DWARF] Fix a leak in line table construction adds 5e70f4bdc15 [lldb/breakpad] Use new line table constructor adds 651fa669a23 [TargetLowering] SimplifyDemandedBits ANY_EXTEND/ANY_EXTEND [...] adds f651c402a22 [clangd] Capture the missing injected class names in findEx [...] new b065902ed45 [X86] combineBT - use SimplifyDemandedBits instead of GetDe [...] new 47f99d2ca8a [SelectionDAG] GetDemandedBits - remove ANY_EXTEND handling new d7032bc3c00 [PowerPC][NFC] Reclaim TSFlags bit 6 new 81f385b0c6e Make dropTriviallyDeadConstantArrays not quadratic new f04284cf1d4 [TargetLowering] SimplifyDemandedBits ISD::SRA multi-use handling new 6a24339a452 [ARM] Follow AACPS standard for volatile bit-fields access width new 2147703bde1 Revert "[ARM] Follow AACPS standard for volatile bit-fields [...] new 1256d68093a [RISCV] Check the target-abi module flag matches the option new 1fbb1d6df01 [clangd] Drop returntype/type when hovering over type-ish names new 020041d99b5 Update spelling of {analyze,insert,remove}Branch in strings [...] new a6883017ea9 [Clang] Un-break scan-build after integrated-cc1 change new 3023352a7d0 [mlir][spirv] Simplify scalar type size calculation. new 7b8dc8c5769 [libcxx] Support Python 3.8 in the test suite new 305bf5b21db [Hexagon] Add support for Hexagon v67t microarchitecture (t [...] new a731c6ba94d [lldb/Initializers] Move all macOS initializers into Platfo [...] new 24d7a0935be [HIP] use GetProgramPath for executable discovery new 2e667d07c77 [FPEnv][SystemZ] Platform-specific builtin constrained FP e [...] new 7a8b0b1595e [StackColoring] Remap PseudoSourceValue frame indices via M [...] new 72b8bad1505 [lldb/Hexagon] Include <mutex> new 8e1f0974c28 [PowerPC] Delete PPCSubtarget::isDarwin and isDarwinABI new cf263807a6c [lldb/tools] Update lldb-test's system initializer new 372cb38f451 [Codegen] Emit both AssumeAlignedAttr and AllocAlignAttr as [...] new 6b2f820221c [NFC][Codegen] Use MaybeAlign + APInt::getLimitedValue() wh [...] new 68122b5826b [APFloat] Extend conversion from special strings
The 24 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: .../clang-tidy/bugprone/BugproneTidyModule.cpp | 3 + .../clang-tidy/bugprone/CMakeLists.txt | 1 + .../MisplacedPointerArithmeticInAllocCheck.cpp | 105 + .../MisplacedPointerArithmeticInAllocCheck.h | 36 + clang-tools-extra/clangd/FindSymbols.cpp | 7 +- clang-tools-extra/clangd/FindTarget.cpp | 11 + clang-tools-extra/clangd/Hover.cpp | 25 +- .../clangd/unittests/FindSymbolsTests.cpp | 9 + .../clangd/unittests/FindTargetTests.cpp | 92 +- clang-tools-extra/clangd/unittests/HoverTests.cpp | 11 +- clang-tools-extra/clangd/unittests/RenameTests.cpp | 37 + .../clangd/unittests/SemanticHighlightingTests.cpp | 2 +- clang-tools-extra/docs/ReleaseNotes.rst | 7 + ...prone-misplaced-pointer-arithmetic-in-alloc.rst | 25 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 1 + ...ugprone-misplaced-pointer-arithmetic-in-alloc.c | 56 + ...prone-misplaced-pointer-arithmetic-in-alloc.cpp | 53 + clang/docs/CommandGuide/clang.rst | 11 +- clang/include/clang/Basic/BuiltinsHexagon.def | 10 +- clang/include/clang/Basic/BuiltinsHexagonDep.def | 31 + clang/include/clang/Basic/LangOptions.def | 2 +- clang/include/clang/Driver/Options.td | 4 + .../clang/StaticAnalyzer/Checkers/Checkers.td | 12 +- clang/lib/Basic/Targets/Hexagon.cpp | 38 +- clang/lib/Basic/Targets/Hexagon.h | 6 + clang/lib/CodeGen/CGBuiltin.cpp | 123 +- clang/lib/CodeGen/CGCall.cpp | 8 +- clang/lib/CodeGen/CodeGenModule.cpp | 7 + clang/lib/Driver/Job.cpp | 2 +- clang/lib/Driver/ToolChains/HIP.cpp | 23 +- clang/lib/Driver/ToolChains/Hexagon.cpp | 13 +- clang/test/Analysis/placement-new-user-defined.cpp | 2 +- clang/test/Analysis/placement-new.cpp | 18 +- .../assume-aligned-and-alloc-align-attributes.c | 77 + clang/test/CodeGen/builtins-hexagon-v67-audio.c | 135 + clang/test/CodeGen/builtins-hexagon-v67.c | 50 + .../CodeGen/builtins-systemz-vector-constrained.c | 55 + .../CodeGen/builtins-systemz-vector2-constrained.c | 69 + .../CodeGen/builtins-systemz-zvector-constrained.c | 317 + .../builtins-systemz-zvector2-constrained.c | 543 ++ .../builtins-systemz-zvector3-constrained.c | 109 + clang/test/CodeGen/riscv-metadata.c | 14 + clang/test/Driver/cuda-simple.cu | 4 +- clang/test/Driver/hexagon-toolchain-elf.c | 16 + clang/test/Driver/offloading-interoperability.c | 4 +- clang/test/Driver/option-aliases.c | 4 +- clang/test/Headers/altivec-header.c | 2 +- clang/test/Headers/arm-neon-header.c | 2 +- clang/test/Headers/x86-intrinsics-headers.c | 2 +- clang/test/Headers/x86intrin-2.c | 4 +- clang/test/Headers/x86intrin.c | 2 +- clang/test/Preprocessor/hexagon-predefines.c | 10 + clang/test/Sema/vector-assign.c | 12 +- clang/test/Sema/vector-cast.c | 23 +- clang/test/Sema/vector-ops.c | 3 +- libcxx/include/string | 21 +- libcxx/utils/libcxx/test/target_info.py | 14 +- libcxxabi/test/test_demangle.pass.cpp | 18 +- lld/ELF/Arch/RISCV.cpp | 9 +- lld/ELF/Driver.cpp | 3 +- lld/ELF/LinkerScript.cpp | 11 +- lld/ELF/LinkerScript.h | 10 +- lld/ELF/OutputSections.cpp | 13 +- lld/ELF/OutputSections.h | 3 +- lld/ELF/ScriptParser.cpp | 97 +- lld/test/ELF/aarch64-cortex-a53-843419-recognize.s | 8 + lld/test/ELF/input-section-flags-diag1.test | 13 + lld/test/ELF/input-section-flags-diag2.test | 13 + lld/test/ELF/input-section-flags-diag3.test | 13 + lld/test/ELF/input-section-flags-keep.s | 27 + lld/test/ELF/input-section-flags.s | 115 + lld/test/ELF/riscv-reloc-align.s | 12 + .../MachOTests/MachONormalizedFileToAtomsTests.cpp | 7 +- lldb/docs/resources/bots.rst | 1 + lldb/include/lldb/Core/Debugger.h | 2 + lldb/include/lldb/Symbol/LineTable.h | 8 +- .../breakpoint_callback_command_source}/Makefile | 0 .../TestBreakpointCallbackCommandSource.py | 35 + .../breakpoint_callback_command_source/main.c | 4 + .../breakpoint_callback_command_source/source.lldb | 1 + lldb/source/API/SystemInitializerFull.cpp | 26 - lldb/source/Core/Debugger.cpp | 73 +- .../ExpressionParser/Clang/ClangASTSource.cpp | 330 +- .../Plugins/Platform/MacOSX/PlatformMacOSX.cpp | 29 +- .../SymbolFile/Breakpad/SymbolFileBreakpad.cpp | 15 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 11 +- .../Plugins/SymbolFile/PDB/SymbolFilePDB.cpp | 4 +- lldb/source/Symbol/LineTable.cpp | 22 +- lldb/test/Shell/Reproducer/lit.local.cfg | 4 + lldb/test/Shell/helper/toolchain.py | 22 +- lldb/test/Shell/lit.cfg.py | 12 +- lldb/tools/lldb-test/SystemInitializerTest.cpp | 27 - lldb/utils/CMakeLists.txt | 1 + lldb/utils/lldb-repro/CMakeLists.txt | 4 + lldb/utils/lldb-repro/lldb-repro.py | 60 + llvm/docs/CommandGuide/llvm-objcopy.rst | 1 + llvm/docs/WritingAnLLVMBackend.rst | 34 +- llvm/include/llvm/Analysis/VectorUtils.h | 1 + llvm/include/llvm/BinaryFormat/ELF.h | 21 +- llvm/include/llvm/CodeGen/MachineInstr.h | 6 +- llvm/include/llvm/CodeGen/PseudoSourceValue.h | 3 +- llvm/include/llvm/CodeGen/TargetInstrInfo.h | 14 +- llvm/include/llvm/IR/IRBuilder.h | 49 +- llvm/include/llvm/IR/IntrinsicsHexagonDep.td | 86 + llvm/include/llvm/MC/MCInstrDesc.h | 6 +- llvm/lib/Analysis/InlineCost.cpp | 11 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 6 +- llvm/lib/CodeGen/BranchFolding.cpp | 2 +- llvm/lib/CodeGen/EarlyIfConversion.cpp | 12 +- llvm/lib/CodeGen/MachineBasicBlock.cpp | 4 +- llvm/lib/CodeGen/MachineBlockPlacement.cpp | 14 +- llvm/lib/CodeGen/MachineVerifier.cpp | 6 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 + llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 13 - llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 20 +- llvm/lib/CodeGen/StackColoring.cpp | 14 +- llvm/lib/IR/AutoUpgrade.cpp | 9 +- llvm/lib/IR/IRBuilder.cpp | 26 +- llvm/lib/IR/LLVMContextImpl.cpp | 22 +- llvm/lib/MC/ELFObjectWriter.cpp | 2 +- llvm/lib/ObjectYAML/ELFYAML.cpp | 3 + llvm/lib/Support/APFloat.cpp | 64 +- .../Target/AArch64/AArch64ConditionOptimizer.cpp | 2 +- .../Target/AArch64/AArch64ConditionalCompares.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 3 - llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | 7 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 63 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 - llvm/lib/Target/AMDGPU/CMakeLists.txt | 1 - llvm/lib/Target/AMDGPU/R600InstrInfo.cpp | 2 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 67 +- llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 5 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 37 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 62 +- llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 10 +- .../Target/AMDGPU/SIRemoveShortExecBranches.cpp | 158 - llvm/lib/Target/AMDGPU/SOPInstructions.td | 15 +- llvm/lib/Target/AMDGPU/VOP1Instructions.td | 20 - llvm/lib/Target/ARC/ARCInstrInfo.cpp | 4 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.h | 4 +- llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp | 198 +- .../Target/Hexagon/AsmParser/HexagonAsmParser.cpp | 29 +- .../Hexagon/Disassembler/HexagonDisassembler.cpp | 5 +- llvm/lib/Target/Hexagon/Hexagon.td | 36 + llvm/lib/Target/Hexagon/HexagonArch.h | 37 + llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp | 12 +- .../lib/Target/Hexagon/HexagonConstPropagation.cpp | 9 +- llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp | 12 +- llvm/lib/Target/Hexagon/HexagonDepArch.h | 39 +- llvm/lib/Target/Hexagon/HexagonDepArch.td | 24 +- llvm/lib/Target/Hexagon/HexagonDepDecoders.inc | 44 +- llvm/lib/Target/Hexagon/HexagonDepIICHVX.td | 493 +- llvm/lib/Target/Hexagon/HexagonDepIICScalar.td | 8257 ++++++++++++++------ llvm/lib/Target/Hexagon/HexagonDepITypes.h | 87 +- llvm/lib/Target/Hexagon/HexagonDepITypes.td | 87 +- llvm/lib/Target/Hexagon/HexagonDepInstrFormats.td | 6145 ++++++++------- llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td | 6023 ++++++++------ llvm/lib/Target/Hexagon/HexagonDepMapAsm2Intrin.td | 59 + llvm/lib/Target/Hexagon/HexagonDepMappings.td | 11 +- llvm/lib/Target/Hexagon/HexagonDepMask.h | 2821 +++++++ llvm/lib/Target/Hexagon/HexagonDepOperands.td | 188 +- llvm/lib/Target/Hexagon/HexagonDepTimingClasses.h | 200 +- llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp | 6 +- llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 5 + llvm/lib/Target/Hexagon/HexagonInstrFormats.td | 103 +- llvm/lib/Target/Hexagon/HexagonInstrFormatsV5.td | 86 - llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp | 155 +- llvm/lib/Target/Hexagon/HexagonInstrInfo.h | 24 +- llvm/lib/Target/Hexagon/HexagonPatterns.td | 45 +- llvm/lib/Target/Hexagon/HexagonPseudo.td | 12 +- llvm/lib/Target/Hexagon/HexagonSchedule.td | 26 +- llvm/lib/Target/Hexagon/HexagonScheduleV67.td | 39 + llvm/lib/Target/Hexagon/HexagonScheduleV67T.td | 61 + llvm/lib/Target/Hexagon/HexagonSubtarget.cpp | 26 +- llvm/lib/Target/Hexagon/HexagonSubtarget.h | 28 +- llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 8 + llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp | 69 +- llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.h | 8 + .../Hexagon/MCTargetDesc/HexagonAsmBackend.cpp | 15 +- .../Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h | 8 +- .../Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp | 6 +- .../Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp | 103 +- .../Hexagon/MCTargetDesc/HexagonMCInstrInfo.h | 28 +- .../Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp | 107 +- .../Hexagon/MCTargetDesc/HexagonMCTargetDesc.h | 3 + .../Hexagon/MCTargetDesc/HexagonShuffler.cpp | 46 +- .../Target/Hexagon/MCTargetDesc/HexagonShuffler.h | 20 +- llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp | 2 +- llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp | 2 +- llvm/lib/Target/PowerPC/PPC.h | 9 - llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 36 +- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 47 +- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 6 - llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 73 +- llvm/lib/Target/PowerPC/PPCInstrFormats.td | 2 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 5 +- llvm/lib/Target/PowerPC/PPCInstrInfo.h | 2 +- llvm/lib/Target/PowerPC/PPCMCInstLower.cpp | 28 - llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 17 +- llvm/lib/Target/PowerPC/PPCSubtarget.cpp | 21 - llvm/lib/Target/PowerPC/PPCSubtarget.h | 18 +- llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 2 +- llvm/lib/Target/RISCV/RISCVTargetMachine.cpp | 14 +- llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.cpp | 24 +- llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h | 2 + llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp | 2 +- llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 5 +- llvm/lib/Target/XCore/XCoreInstrInfo.cpp | 2 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 2 +- .../Transforms/Instrumentation/MemorySanitizer.cpp | 5 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 6 +- .../AArch64/patchable-function-entry-bti.ll | 13 +- .../CodeGen/AArch64/patchable-function-entry.ll | 27 +- .../AMDGPU/GlobalISel/divergent-control-flow.ll | 11 +- .../AMDGPU/GlobalISel/legalize-unmerge-values.mir | 734 ++ .../GlobalISel/regbankselect-amdgcn.ps.live.mir | 17 + .../AMDGPU/amdgpu-codegenprepare-i16-to-i32.ll | 3227 +++++--- .../CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll | 104 +- .../AMDGPU/atomic_optimizations_local_pointer.ll | 312 +- .../AMDGPU/atomic_optimizations_pixelshader.ll | 2 +- llvm/test/CodeGen/AMDGPU/branch-condition-and.ll | 5 +- llvm/test/CodeGen/AMDGPU/branch-relaxation.ll | 9 +- llvm/test/CodeGen/AMDGPU/call-skip.ll | 9 +- llvm/test/CodeGen/AMDGPU/collapse-endcf.ll | 49 +- .../CodeGen/AMDGPU/control-flow-fastregalloc.ll | 15 +- llvm/test/CodeGen/AMDGPU/convergent-inlineasm.ll | 8 +- llvm/test/CodeGen/AMDGPU/cse-phi-incoming-val.ll | 2 +- llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll | 21 +- .../AMDGPU/divergent-branch-uniform-condition.ll | 11 +- llvm/test/CodeGen/AMDGPU/else.ll | 3 +- llvm/test/CodeGen/AMDGPU/hoist-cond.ll | 2 +- .../test/CodeGen/AMDGPU/insert-skips-flat-vmem.mir | 2 +- llvm/test/CodeGen/AMDGPU/insert-skips-gws.mir | 2 +- .../CodeGen/AMDGPU/insert-skips-ignored-insts.mir | 2 +- .../CodeGen/AMDGPU/insert-skips-kill-uncond.mir | 2 +- llvm/test/CodeGen/AMDGPU/inserted-wait-states.mir | 4 +- llvm/test/CodeGen/AMDGPU/max.i16.ll | 29 +- .../test/CodeGen/AMDGPU/mubuf-legalize-operands.ll | 6 +- llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll | 3 +- llvm/test/CodeGen/AMDGPU/ret_jump.ll | 23 +- llvm/test/CodeGen/AMDGPU/sdiv64.ll | 1165 +++ .../AMDGPU/{sdivrem64.ll => sdivrem64.r600.ll} | 56 +- llvm/test/CodeGen/AMDGPU/si-annotate-cf-noloop.ll | 2 + .../si-lower-control-flow-unreachable-block.ll | 10 +- llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir | 2 +- .../CodeGen/AMDGPU/skip-branch-taildup-ret.mir | 2 +- llvm/test/CodeGen/AMDGPU/skip-branch-trap.ll | 7 +- llvm/test/CodeGen/AMDGPU/skip-if-dead.ll | 13 +- llvm/test/CodeGen/AMDGPU/smrd_vmem_war.ll | 2 +- llvm/test/CodeGen/AMDGPU/srem64.ll | 1232 +++ .../stack-pointer-offset-relative-frameindex.ll | 3 +- .../CodeGen/AMDGPU/subreg-coalescer-undef-use.ll | 5 +- llvm/test/CodeGen/AMDGPU/udiv64.ll | 1201 +++ .../AMDGPU/{udivrem64.ll => udivrem64.r600.ll} | 64 +- llvm/test/CodeGen/AMDGPU/uniform-cfg.ll | 2 +- .../AMDGPU/uniform-loop-inside-nonuniform.ll | 2 + llvm/test/CodeGen/AMDGPU/urem64.ll | 978 +++ llvm/test/CodeGen/AMDGPU/valu-i1.ll | 42 +- llvm/test/CodeGen/AMDGPU/wave32.ll | 16 +- llvm/test/CodeGen/AMDGPU/wqm.ll | 5 +- llvm/test/CodeGen/ARM/uxt_rot.ll | 129 +- llvm/test/CodeGen/Hexagon/df-min-max.ll | 67 + .../CodeGen/Hexagon/disable-const64-tinycore.ll | 91 + llvm/test/CodeGen/Hexagon/disable-const64.ll | 33 + llvm/test/CodeGen/Hexagon/fminmax-v67.ll | 45 + llvm/test/CodeGen/Hexagon/fmul-v67.ll | 52 + llvm/test/CodeGen/Hexagon/intrinsics-v67.ll | 285 + llvm/test/CodeGen/Hexagon/swp-sigma.ll | 3 +- llvm/test/CodeGen/Hexagon/tc_duplex.ll | 27 + llvm/test/CodeGen/Hexagon/tc_duplex_asm.ll | 22 + llvm/test/CodeGen/Hexagon/tc_sched.ll | 82 + llvm/test/CodeGen/Hexagon/tc_sched1.ll | 32 + llvm/test/CodeGen/Hexagon/tiny_bkfir_artdeps.ll | 130 + llvm/test/CodeGen/Hexagon/tiny_bkfir_loop_align.ll | 134 + llvm/test/CodeGen/Hexagon/tinycore.ll | 51 + .../CodeGen/PowerPC/2008-10-31-PPCF128Libcalls.ll | 44 - .../test/CodeGen/PowerPC/stack-coloring-vararg.mir | 14 +- llvm/test/CodeGen/RISCV/module-target-abi.ll | 24 + llvm/test/CodeGen/RISCV/module-target-abi2.ll | 27 + llvm/test/CodeGen/SystemZ/branch-08.ll | 2 +- llvm/test/CodeGen/SystemZ/int-cmp-02.ll | 2 +- llvm/test/CodeGen/Thumb2/mve-gather-scatter-opt.ll | 55 +- .../CodeGen/Thumb2/mve-scatter-ind16-scaled.ll | 181 + .../CodeGen/Thumb2/mve-scatter-ind16-unscaled.ll | 460 ++ .../CodeGen/Thumb2/mve-scatter-ind32-scaled.ll | 240 + .../CodeGen/Thumb2/mve-scatter-ind32-unscaled.ll | 419 + .../CodeGen/Thumb2/mve-scatter-ind8-unscaled.ll | 540 ++ llvm/test/CodeGen/Thumb2/mve-scatter-ptrs.ll | 633 ++ .../test/CodeGen/X86/const-shift-of-constmasked.ll | 4 +- llvm/test/CodeGen/X86/patchable-function-entry.ll | 33 +- llvm/test/CodeGen/X86/vector-sext.ll | 4 +- llvm/test/MC/Hexagon/audio.s | 27 + llvm/test/MC/Hexagon/cmpyrw.s | 3 + llvm/test/MC/Hexagon/extensions/v67_hvx.s | 2810 +++++++ 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