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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-arm in repository toolchain/ci/binutils-gdb.
from fc5c1c28b3 RISC-V: Scalar crypto instruction and entropy source CSR testcases. adds 38f9e52086 sim: iq2000: fix some missing prototypes warnings adds 54f7a83a62 sim: keep track of program environment strings adds 8cfc9a1895 sim: callback: expose argv & environ adds fab6939b01 sim: syscall: fix argvlen & argv implementation adds 85588c9ab9 sim: syscall: hoist argc/argn/argnlen to common code adds 35818ade96 sim: nrun: add --env-{set,unset,clear} command line options adds 3b2934856f sim: run: support concise env var settings
No new revisions were added by this update.
Summary of changes: include/sim/callback.h | 6 ++ sim/aarch64/interp.c | 10 +++ sim/bfin/interp.c | 43 +++---------- sim/bpf/sim-if.c | 13 +++- sim/common/callback.c | 2 + sim/common/nrun.c | 7 ++- sim/common/sim-base.h | 4 ++ sim/common/sim-options.c | 121 ++++++++++++++++++++++++++++++++++- sim/common/sim-utils.c | 1 + sim/common/syscall.c | 132 ++++++++++++++++++++++++++------------- sim/cris/sim-if.c | 26 ++++++-- sim/example-synacor/interp.c | 11 ++++ sim/frv/sim-if.c | 17 ++++- sim/ft32/interp.c | 11 ++++ sim/iq2000/Makefile.in | 2 +- sim/iq2000/sem-switch.c | 4 +- sim/iq2000/sem.c | 4 +- sim/iq2000/sim-if.c | 13 +++- sim/iq2000/sim-main.h | 5 ++ sim/lm32/sim-if.c | 17 ++++- sim/m32r/sim-if.c | 19 ++++-- sim/pru/interp.c | 10 +++ sim/riscv/interp.c | 11 ++++ sim/testsuite/cris/c/c.exp | 3 +- sim/testsuite/cris/c/readlink7.c | 5 +- sim/testsuite/cris/c/readlink8.c | 6 +- 26 files changed, 394 insertions(+), 109 deletions(-)