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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig in repository toolchain/ci/llvm-project.
from 8e2871cd2c2 [X86] Add support for {vex2}, {vex3}, and {evex} to the ass [...] adds ba55a40fd07 [AArch64] Add test case to show missed opportunity to remov [...] adds c176b708e45 [InstCombine] Add with.overflow always overflow tests; NFC adds 2b523f81625 [GlobalISel][AArch64] Allow CallLowering to handle types wh [...] adds 92d74f19cf4 [AArch64][GlobalISel] Add legalization for some vector G_SH [...] adds 888dd5d198c [AArch64][GlobalISel] Legalize vector G_ICMP. adds 9bf092d7198 [AArch64][GlobalISel] Add isel support for vector G_ICMP an [...] adds 60f83544bb3 [X86] Fix a dangling StringRef issue introduced in r358029. adds d1ba3b13f83 [LLVM-C] Add Section and Symbol Iterator Accessors for Obje [...] adds bec0a45ddce [LLVM-C] Add Bindings to Access an Instruction's DebugLoc adds 50f726d73a4 [LLVM-C] Correct The Current Debug Location Accessors adds 7143224272a [X86] Add VEX_LIG to scalar VEX/EVEX instructions that were [...] adds 9ca3a95f798 [X86] Support the EVEX versions vcvt(t)ss2si and vcvt(t)sd2 [...] adds a49c95e02aa [Sparc] Fix incorrect MI insertion position for spilling f128. adds 5f2b5cd85e5 [llvm-objdump] Accept and ignore --wide/-w adds f8a74c18ec8 [lldb-server] Introduce Socket::Initialize and Terminate to [...] adds 7d4ad143715 [llvm-objdump] Don't print trailing space in dumpBytes adds 391d5caa106 [X86] Move the 2 byte VEX optimization for MOV instructions [...] adds 9ca9d32b6be [ObjC][ARC] Convert the retainRV marker that is passed as a [...] adds 60c3a3b6d0f [CodeGen][ObjC] Emit the retainRV marker as a module flag i [...] adds 0c01607bbff Rename a variable and add a comment. adds 5e13ff1da20 [InstCombine] Canonicalize (-X s/ Y) to -(X s/ Y). adds 596cbeb7058 [InstCombine] Directly call computeOverflow methods in Opti [...] adds 09020ec2a71 [InstCombine] Handle usubo always overflow adds b3be23d3342 [DWARF] Simplify LineTable::findRowInSeq adds f5f45f21d84 Docstringify some comments in the swig interface files adds db1a69c2504 [VPLAN] Minor improvement to testing and debug messages. adds fab4bdf4b93 Add REQUIRES: asserts to test using -debug-only adds 83443c9a9ec [ScheduleDAG] Add statistics for maintaining the topologica [...] adds 3739979c203 [DebugInfo] Make InstrRange into a class, NFC adds 6feef56d1bd [DebugInfo] Rename DbgValueHistoryMap::{InstrRange -> Entry}, NFC adds 165846b031c [ARM GlobalISel] Map G_FCONSTANT adds 3533ad6801e [ARM GlobalISel] Select G_FCONSTANT into pools adds b6e83b98f94 [ARM GlobalISel] Select G_FCONSTANT for VFP3 adds 4a7f8d8d6b1 [ARM GlobalISel] Add some asserts. NFC. adds 6bdade85de4 Fixup r358063 adds ac590673637 MCDwarf: use write_zeroes for MCDwarfLineAddr::FixedEncode adds bbd798f71c3 MCSymbolicELF: simplify. (Flags & (x << s)) >> s is equival [...] adds 56f70c625ab [AsmPrinter] Delete unused RangeSpanList::addRange adds 3a8bb7cd2c7 Discard debuginfo for object files empty after GC adds 139e9f247ab Minidump: Use llvm parser for reading the ModuleList stream adds d9114d46210 [TargetLowering] Move shouldFoldShiftPairToMask next to pre [...] adds 5ffec6deef0 [DebugInfo] Improve handling of clobbered fragments adds b96943b6a00 [DebugInfo] Track multiple registers in DbgEntityHistoryCalculator adds 6f9978319fa [clangd] Refactor speculateCompletionFilter and also extrac [...] adds 9b765de6dd1 [clangd] Add -header-insertion=never flag to disable includ [...] adds 628f1ae5042 [llvm-exegesis] Fix error propagation from yaml writing (fr [...] adds 41bdeb7b125 [llvm-exegesis] YamlContext: fix some missing spaces/quotes [...] adds 8ab74145808 [llvm-readobj] Should declare `ListScope` for `verneed` entries. adds 1992e8f38ed [llvm-exegesis] Pacify bots - don't std::move() - prevents [...] adds 48e2eb0b271 [NFC] Fix unused variable warning. adds 651463e4a8f [ARM] [FIX] Add missing f16 vector operations lowering adds 71660b03216 Revert "[LLVM-C] Correct The Current Debug Location Accessors" adds aae424a2d26 [AArch64] Add lowering pattern for scalar fp16 facge and facgt adds cce47418c93 [LLVM-C] Correct The Current Debug Location Accessors (Again) adds 3ecb04a9dae clang-cl: Fix parsing of the /F option (PR41405) adds 6a7412a893d [testsuite] Split Obj-C foundation test adds ae6c9403d13 [MachineOutliner] Replace ostringstream based string concat [...] adds 0d9f609d824 [WebAssembly] Assign GOT entries symbols used in data relocations adds b814e57ffba [clangd] Don't insert extra namespace qualifiers when Sema [...] adds 8eae988b89a Fix a typo adds aef7247adbf clangd: repair the build after SVN r358091 adds 9ff3afbea7b [clangd] Use #if CLANGD_BUILD_XPC because it may be defined as 0 adds ef23e884805 [InstCombine] Handle saddo always overflow adds 37d8d55823b [X86][AVX] getTargetConstantBitsFromNode - extract bits fro [...] adds 0e66db5d771 Improve compile-time performance in computeKnownBitsFromAssume. adds 2d02c6df6b2 [clangd] Fix non-indexing of builtin functions like printf [...] adds 7a543c37582 [InstCombine] ssubo X, C -> saddo X, -C adds 0a8228fd28e [InstCombine] Handle ssubo always overflow adds 5277b3ff251 [AsmPrinter] refactor to remove remove AsmVariant. NFC adds b9a00cb504b add FIXME: as per echristo adds e1b9b9dc15c clangd: fix the build with XPC adds 8b36ac818cd Don't emit an unreachable return block. adds 9e0eeba5692 GlobalISel: Handle odd breakdowns for bit ops adds fa4b0b08ead [libc++abi] Create a macro for the 32 bit guard setting on [...] adds 6e84a09ee9b build: add binary dir to the unittests adds 35fe07916ae [AArch64] Teach getTestBitOperand to look through ANY_EXTENDS adds 7187272b2bc GlobalISel: Support legalizing G_CONSTANT with irregular breakdown adds 0aab99902ba GlobalISel: Fix invoke lowering creating invalid type registers adds 2064e45ce35 GlobalISel: Move computeValueLLTs adds 5f6eb1817af llvm-undname: Fix another crash-on-invalid adds 0861c87b06c Revert rL357745: [SelectionDAG] Compute known bits of CopyFromReg adds 4e3fd7757aa [ARM] Add an extra constant hoisting test. NFC adds 7ae29f57426 Fix an off-by-one mistake in IRGen's copy-construction spec [...] adds 163157378ee [kate] Add '!mul' operator that was introduced in D58775 adds 5d9f656bb75 [TableGen] Introduce !listsplat 'binary' operator adds dc67659ba59 [X86] X86ScheduleBdVer2: use !listsplat operator to cleanup [...] new 5a736c9bbf0 [PDB Docs] Start documenting CodeView Type Records. new 59a0e047015 [llvm] Non-functional change: declared a local variable as const. new e3e24ad25fb Fix header inclusion order failures new ad8f3a1440c [X86AsmPrinter] refactor to limit use of Modifier. NFC
The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: clang-tools-extra/clangd/ClangdLSPServer.h | 1 + clang-tools-extra/clangd/CodeComplete.cpp | 199 +- clang-tools-extra/clangd/CodeComplete.h | 24 +- clang-tools-extra/clangd/Transport.h | 2 +- clang-tools-extra/clangd/index/SymbolCollector.cpp | 6 +- clang-tools-extra/clangd/tool/ClangdMain.cpp | 18 +- clang-tools-extra/unittests/clangd/CMakeLists.txt | 3 + .../unittests/clangd/CodeCompleteTests.cpp | 81 +- .../unittests/clangd/SymbolCollectorTests.cpp | 14 +- clang/include/clang/Driver/CLCompatOptions.td | 2 +- clang/lib/CodeGen/CGCall.cpp | 9 - clang/lib/CodeGen/CGClass.cpp | 2 +- clang/lib/CodeGen/CGObjC.cpp | 12 +- clang/lib/CodeGen/CodeGenFunction.cpp | 15 + clang/test/CodeGen/unreachable-ret.c | 23 + clang/test/CodeGenCXX/pod-member-memcpys.cpp | 14 + clang/test/CodeGenObjC/arc-unsafeclaim.m | 3 +- clang/test/Driver/cl-options.c | 2 +- clang/test/OpenMP/parallel_reduction_codegen.cpp | 2 +- libcxxabi/include/__cxxabi_config.h | 4 + libcxxabi/include/cxxabi.h | 2 +- libcxxabi/src/cxa_guard.cpp | 20 +- lld/ELF/Driver.cpp | 7 +- lld/ELF/InputFiles.cpp | 4 +- lld/ELF/InputFiles.h | 18 +- lld/ELF/InputSection.cpp | 1 + lld/ELF/InputSection.h | 10 +- lld/ELF/MarkLive.cpp | 36 +- lld/test/ELF/linkerscript/comdat-gc.s | 3 + .../linkerscript/{comdat-gc.s => debuginfo-gc.s} | 4 +- lld/test/ELF/verdef-defaultver.s | 26 +- lld/test/ELF/verneed.s | 40 +- lld/test/wasm/shared.ll | 2 +- lld/wasm/InputChunks.cpp | 13 +- lld/wasm/Writer.cpp | 17 +- lldb/include/lldb/Host/Socket.h | 3 + .../test/lang/objc/foundation/TestObjCMethods2.py | 155 +- .../lang/objc/foundation/TestObjCMethodsNSArray.py | 37 + .../lang/objc/foundation/TestObjCMethodsNSError.py | 50 + .../lang/objc/foundation/TestObjCMethodsString.py | 54 + lldb/scripts/interface/SBModuleSpec.i | 4 + lldb/scripts/interface/SBProcess.i | 3 - lldb/scripts/interface/SBThreadPlan.i | 5 +- lldb/source/Host/common/Socket.cpp | 27 + .../Initialization/SystemInitializerCommon.cpp | 7 + .../Plugins/Platform/Windows/PlatformWindows.cpp | 7 +- .../Plugins/Process/minidump/MinidumpParser.cpp | 57 +- .../Plugins/Process/minidump/MinidumpParser.h | 6 +- .../Plugins/Process/minidump/MinidumpTypes.cpp | 27 - .../Plugins/Process/minidump/MinidumpTypes.h | 40 - .../Plugins/Process/minidump/ProcessMinidump.cpp | 13 +- lldb/unittests/Host/MainLoopTest.cpp | 12 +- lldb/unittests/Host/SocketAddressTest.cpp | 19 +- lldb/unittests/Host/SocketTest.cpp | 12 +- .../Process/gdb-remote/GDBRemoteTestUtils.cpp | 18 +- .../Process/minidump/MinidumpParserTest.cpp | 48 +- llvm/bindings/go/llvm/IRBindings.cpp | 4 +- llvm/bindings/go/llvm/IRBindings.h | 4 +- llvm/bindings/go/llvm/ir.go | 4 +- llvm/docs/PDB/CodeViewTypes.rst | 263 +- llvm/docs/TableGen/LangIntro.rst | 4 + llvm/docs/TableGen/LangRef.rst | 2 +- llvm/include/llvm-c/Core.h | 35 +- llvm/include/llvm-c/DebugInfo.h | 25 + llvm/include/llvm-c/Object.h | 74 +- llvm/include/llvm/CodeGen/Analysis.h | 13 + llvm/include/llvm/CodeGen/AsmPrinter.h | 6 +- .../llvm/CodeGen/DbgEntityHistoryCalculator.h | 86 +- .../include/llvm/CodeGen/GlobalISel/CallLowering.h | 9 +- .../llvm/CodeGen/GlobalISel/LegalizerHelper.h | 1 + .../llvm/CodeGen/GlobalISel/LegalizerInfo.h | 35 +- llvm/include/llvm/CodeGen/MachineInstr.h | 2 + llvm/include/llvm/CodeGen/TargetLowering.h | 18 +- llvm/include/llvm/TableGen/Record.h | 4 +- llvm/lib/Analysis/ValueTracking.cpp | 431 ++- llvm/lib/CodeGen/Analysis.cpp | 30 + .../lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp | 36 +- llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp | 40 +- llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.h | 2 +- .../AsmPrinter/DbgEntityHistoryCalculator.cpp | 180 +- llvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp | 41 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 141 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h | 2 +- llvm/lib/CodeGen/AsmPrinter/DwarfFile.h | 1 - llvm/lib/CodeGen/GlobalISel/CallLowering.cpp | 54 +- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 35 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 139 +- llvm/lib/CodeGen/MachineOutliner.cpp | 14 +- llvm/lib/CodeGen/ScheduleDAG.cpp | 8 + llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 20 - llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp | 46 +- llvm/lib/Demangle/MicrosoftDemangle.cpp | 2 - llvm/lib/IR/AutoUpgrade.cpp | 12 +- llvm/lib/IR/Core.cpp | 12 +- llvm/lib/IR/DebugInfo.cpp | 15 + llvm/lib/MC/MCAsmStreamer.cpp | 2 +- llvm/lib/MC/MCDwarf.cpp | 4 +- llvm/lib/MC/MCInstPrinter.cpp | 6 +- llvm/lib/MC/MCSymbolELF.cpp | 10 +- llvm/lib/Object/Object.cpp | 28 + llvm/lib/TableGen/Record.cpp | 14 + llvm/lib/TableGen/TGLexer.cpp | 1 + llvm/lib/TableGen/TGLexer.h | 6 +- llvm/lib/TableGen/TGParser.cpp | 38 + llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp | 12 +- llvm/lib/Target/AArch64/AArch64CallLowering.cpp | 63 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 6 + llvm/lib/Target/AArch64/AArch64InstrInfo.td | 10 + .../Target/AArch64/AArch64InstructionSelector.cpp | 258 +- llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp | 39 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h | 3 +- llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 8 +- llvm/lib/Target/ARM/ARMAsmPrinter.h | 6 +- llvm/lib/Target/ARM/ARMCallLowering.cpp | 2 + llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp | 5 +- llvm/lib/Target/ARM/ARMInstrNEON.td | 2 + llvm/lib/Target/ARM/ARMInstrVFP.td | 42 +- llvm/lib/Target/ARM/ARMInstructionSelector.cpp | 50 + llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp | 8 + llvm/lib/Target/AVR/AVRAsmPrinter.cpp | 14 +- llvm/lib/Target/BPF/BPFAsmPrinter.cpp | 10 +- llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp | 4 +- llvm/lib/Target/Hexagon/HexagonAsmPrinter.h | 6 +- llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp | 4 +- llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp | 9 +- llvm/lib/Target/Mips/MipsAsmPrinter.cpp | 7 +- llvm/lib/Target/Mips/MipsAsmPrinter.h | 6 +- llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 10 +- llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h | 6 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 10 +- llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp | 19 +- llvm/lib/Target/Sparc/SparcAsmPrinter.cpp | 11 +- llvm/lib/Target/Sparc/SparcRegisterInfo.cpp | 4 +- llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp | 5 +- llvm/lib/Target/SystemZ/SystemZAsmPrinter.h | 6 +- .../Target/WebAssembly/WebAssemblyAsmPrinter.cpp | 13 +- .../lib/Target/WebAssembly/WebAssemblyAsmPrinter.h | 6 +- llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp | 88 +- llvm/lib/Target/X86/X86AsmPrinter.cpp | 126 +- llvm/lib/Target/X86/X86AsmPrinter.h | 6 +- llvm/lib/Target/X86/X86CallLowering.cpp | 2 + llvm/lib/Target/X86/X86ISelLowering.cpp | 19 +- llvm/lib/Target/X86/X86InstrAVX512.td | 84 +- llvm/lib/Target/X86/X86InstrSSE.td | 79 +- llvm/lib/Target/X86/X86RegisterInfo.td | 11 - llvm/lib/Target/X86/X86ScheduleBdVer2.td | 11 +- llvm/lib/Target/XCore/XCoreAsmPrinter.cpp | 19 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 21 + .../Transforms/InstCombine/InstCombineCompares.cpp | 28 +- .../InstCombine/InstCombineMulDivRem.cpp | 6 + llvm/lib/Transforms/ObjCARC/ObjCARCContract.cpp | 11 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 17 +- llvm/test/Bitcode/upgrade-objcretainrelease.ll | 4 +- .../CodeGen/AArch64/GlobalISel/arm64-fallback.ll | 8 - .../CodeGen/AArch64/GlobalISel/legalize-select.mir | 10 +- .../CodeGen/AArch64/GlobalISel/legalize-shift.mir | 31 + .../AArch64/GlobalISel/legalize-vector-icmp.mir | 1922 +++++++++++ .../GlobalISel/legalizer-info-validation.mir | 4 +- .../CodeGen/AArch64/GlobalISel/ret-vec-promote.ll | 16 + .../AArch64/GlobalISel/select-vector-icmp.mir | 3350 ++++++++++++++++++++ .../AArch64/GlobalISel/select-vector-shift.mir | 120 + .../CodeGen/AArch64/GlobalISel/vec-s16-param.ll | 28 + .../CodeGen/AArch64/fp16_intrinsic_scalar_2op.ll | 24 + llvm/test/CodeGen/AArch64/tbz-tbnz.ll | 26 + .../CodeGen/AMDGPU/GlobalISel/legalize-and.mir | 46 + .../AMDGPU/GlobalISel/legalize-constant.mir | 17 + .../test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir | 46 + .../CodeGen/AMDGPU/GlobalISel/legalize-xor.mir | 46 + .../CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.ll | 10 +- .../CodeGen/ARM/GlobalISel/arm-regbankselect.mir | 39 + .../test/CodeGen/ARM/GlobalISel/arm-unsupported.ll | 2 +- .../CodeGen/ARM/GlobalISel/select-fp-const.mir | 139 + .../CodeGen/ARM/armv8.2a-fp16-vector-intrinsics.ll | 36 + llvm/test/CodeGen/ARM/atomic-op.ll | 8 +- llvm/test/CodeGen/PowerPC/pr35688.ll | 16 +- llvm/test/CodeGen/SPARC/fp128.ll | 23 + llvm/test/CodeGen/SystemZ/subregliveness-04.ll | 2 +- .../test/CodeGen/Thumb/consthoist-physical-addr.ll | 75 + llvm/test/CodeGen/X86/combine-bitselect.ll | 118 +- llvm/test/CodeGen/X86/fold-tied-op.ll | 2 +- llvm/test/CodeGen/X86/pr28444.ll | 5 +- llvm/test/DebugInfo/ARM/partial-subreg.ll | 25 +- llvm/test/DebugInfo/COFF/pieces.ll | 2 +- .../test/DebugInfo/MIR/X86/clobbered-fragments.mir | 238 ++ llvm/test/DebugInfo/X86/pieces-3.ll | 1 + llvm/test/Demangle/invalid-manglings.test | 5 + llvm/test/MC/X86/AVX512F_SCALAR-64.s | 176 +- llvm/test/MC/X86/x86_64-avx-encoding.s | 104 + llvm/test/TableGen/listsplat.td | 75 + llvm/test/Transforms/InstCombine/div.ll | 12 +- .../Transforms/InstCombine/sdiv-canonicalize.ll | 18 +- .../Transforms/InstCombine/ssub-with-overflow.ll | 45 +- llvm/test/Transforms/InstCombine/with_overflow.ll | 82 + .../outer_loop_test1_no_explicit_vect_width.ll | 63 +- .../LoopVectorize/explicit_outer_detection.ll | 2 +- .../vplan-stress-test-no-explict-vf.ll | 45 + .../Transforms/ObjCARC/contract-marker-funclet.ll | 5 +- llvm/test/Transforms/ObjCARC/contract-marker.ll | 4 +- llvm/test/Transforms/ObjCARC/contract-testcases.ll | 4 +- llvm/test/tools/llvm-readobj/elf-versioninfo.test | 40 +- llvm/test/tools/yaml2obj/verneed-section.yaml | 40 +- llvm/test/tools/yaml2obj/versym-section.yaml | 26 +- llvm/tools/llvm-c-test/object.c | 52 +- llvm/tools/llvm-exegesis/lib/BenchmarkResult.cpp | 32 +- llvm/tools/llvm-exegesis/lib/BenchmarkResult.h | 5 +- llvm/tools/llvm-objdump/llvm-objdump.cpp | 10 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 1 + llvm/utils/kate/llvm-tablegen.xml | 2 + pstl/include/pstl/internal/glue_algorithm_defs.h | 1 + pstl/include/pstl/internal/glue_algorithm_impl.h | 2 + pstl/include/pstl/internal/glue_memory_impl.h | 3 + pstl/include/pstl/internal/glue_numeric_defs.h | 2 + pstl/include/pstl/internal/glue_numeric_impl.h | 1 + .../header_inclusion_order_algorithm_0.pass.cpp | 24 + .../header_inclusion_order_algorithm_1.pass.cpp | 24 + .../pstl/header_inclusion_order_memory_0.pass.cpp | 24 + .../pstl/header_inclusion_order_memory_1.pass.cpp | 24 + .../pstl/header_inclusion_order_numeric_0.pass.cpp | 24 + .../pstl/header_inclusion_order_numeric_1.pass.cpp | 24 + 220 files changed, 9937 insertions(+), 1900 deletions(-) create mode 100644 clang/test/CodeGen/unreachable-ret.c copy lld/test/ELF/linkerscript/{comdat-gc.s => debuginfo-gc.s} (79%) create mode 100644 lldb/packages/Python/lldbsuite/test/lang/objc/foundation/TestOb [...] create mode 100644 lldb/packages/Python/lldbsuite/test/lang/objc/foundation/TestOb [...] create mode 100644 lldb/packages/Python/lldbsuite/test/lang/objc/foundation/TestOb [...] create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-icmp.mir create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/ret-vec-promote.ll create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/select-vector-icmp.mir create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/select-vector-shift.mir create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/vec-s16-param.ll create mode 100644 llvm/test/CodeGen/ARM/GlobalISel/select-fp-const.mir create mode 100644 llvm/test/CodeGen/Thumb/consthoist-physical-addr.ll create mode 100644 llvm/test/DebugInfo/MIR/X86/clobbered-fragments.mir create mode 100644 llvm/test/TableGen/listsplat.td create mode 100644 llvm/test/Transforms/LoopVectorize/vplan-stress-test-no-explict-vf.ll create mode 100644 pstl/test/pstl/header_inclusion_order_algorithm_0.pass.cpp create mode 100644 pstl/test/pstl/header_inclusion_order_algorithm_1.pass.cpp create mode 100644 pstl/test/pstl/header_inclusion_order_memory_0.pass.cpp create mode 100644 pstl/test/pstl/header_inclusion_order_memory_1.pass.cpp create mode 100644 pstl/test/pstl/header_inclusion_order_numeric_0.pass.cpp create mode 100644 pstl/test/pstl/header_inclusion_order_numeric_1.pass.cpp