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unknown user pushed a change to branch alistair/rv32.wip in repository glibc.
at db7aefbcd9 WIP
This branch includes the following new commits:
new 31ea914e35 Convert all Python scripts to Python 3 new 0e0923421a tst-clone3: Use __NR_futex_time64 if we don't have __NR_futex new ae2c129da6 time: Add a timeval with a long tv_sec and tv_usec new fdd1d6beb1 linux: Use 32-bit time_t for itimerval new f386eed222 linux: Use 32-bit time_t for rusage new ccab240ae7 RISC-V: Use 64-bit time_t and off_t for RV32 and RV64 new 6f742c3500 RISC-V: Define __NR_* as __NR_*_time64/64 for 32-bit new bee73a553a RISC-V: Add support for 32-bit vDSO calls new a5cdbeedd8 RISC-V: Add socket-constants.h for RV32 new 240af3037c RISC-V: Support dynamic loader for the 32-bit new 53f7f06b5d RISC-V: Add path of library directories for the 32-bit new a6757d74fc RISC-V: Add arch-syscall.h for RV32 new 609083ec1b RISC-V: The ABI implementation for the 32-bit new 8caa8e941f RISC-V: Hard float support for 32-bit new 2cb7d3dd4a RISC-V: Add ABI lists new 1501294ef3 RISC-V: Add the RV32 libm-test-ulps new 8a49560fb7 RISC-V: Fix llrint and llround missing exceptions on RV32 new 9597962cd3 RISC-V: Build Infastructure for 32-bit new 282d31227c riscv32: Specify the arch_minimum_kernel as 5.4 new 1b654745b3 RISC-V: Add rv32 path to RTLDLIST in ldd new edc15015fc Documentation for the RISC-V 32-bit port new 6729f9c29e Add RISC-V 32-bit target to build-many-glibcs.py new 78dcaf2ea7 COVER: RISC-V glibc port for the 32-bit new db7aefbcd9 WIP
The 24 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.