This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 in repository toolchain/ci/gcc.
from c8929840407 x86: correct bmi2_umul<mode><dwi>3_1's MEM_P() uses adds 3595231d9f5 i386: Remove constraints when used with constant integer pr [...] adds 43201f2c217 PR target/70321: Split double word equality/inequality afte [...] adds 2a12adfa8bd Make the default rtx_costs of MULT/DIV variants consistent. adds f1652e3343b PR rtl-optimization/101617: Use neg/sbb in ix86_expand_int_movcc. adds 871dbb6112e Fortran: improve runtime error message with ALLOCATE and ER [...] adds 1ad584d538d Allow SCmode and DImode to be tieable with TARGET_64BIT on x86_64.
No new revisions were added by this update.
Summary of changes: gcc/config/i386/i386-expand.cc | 84 ++--- gcc/config/i386/i386-features.cc | 101 +++--- gcc/config/i386/i386-features.h | 1 + gcc/config/i386/i386.cc | 12 + gcc/config/i386/i386.md | 164 ++++++--- gcc/config/i386/mmx.md | 20 +- gcc/config/i386/sse.md | 371 +++++++++++---------- gcc/config/i386/subst.md | 10 +- gcc/config/i386/sync.md | 4 +- gcc/fortran/libgfortran.h | 1 + gcc/fortran/trans-stmt.cc | 33 +- gcc/fortran/trans.cc | 4 +- gcc/rtlanal.cc | 7 + gcc/testsuite/gcc.target/i386/pr101617.c | 19 ++ gcc/testsuite/gcc.target/i386/pr105624.c | 2 +- gcc/testsuite/gcc.target/i386/pr70321.c | 10 + gcc/testsuite/gcc.target/i386/sse4_1-stv-1.c | 18 + .../gfortran.dg/allocate_alloc_opt_15.f90 | 49 +++ 18 files changed, 564 insertions(+), 346 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr101617.c create mode 100644 gcc/testsuite/gcc.target/i386/pr70321.c create mode 100644 gcc/testsuite/gcc.target/i386/sse4_1-stv-1.c create mode 100644 gcc/testsuite/gfortran.dg/allocate_alloc_opt_15.f90