This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm in repository toolchain/ci/qemu.
from 824824d122 Merge tag 'pull-block-2022-07-12' of https://gitlab.com/hrei [...] adds 72d680e408 target/mips: introduce decodetree structure for Cavium Octeo [...] adds 5e806fb002 target/mips: implement Octeon-specific BBIT instructions adds dadd071a9c target/mips: implement Octeon-specific arithmetic instructions adds 9a6046a655 target/mips: introduce Cavium Octeon CPU model adds d53a3ed446 target/mips: Create report_fault for semihosting adds 3d748e41c7 target/mips: Drop link syscall from semihosting adds 18639a28bb target/mips: Use semihosting/syscalls.h adds ea4210600d target/mips: Avoid qemu_semihosting_log_out for UHI_plog adds 412411b352 target/mips: Use error_report for UHI_assert adds 938fcd741a semihosting: Remove qemu_semihosting_log_out adds 3bb45bbc6f target/mips: Simplify UHI_argnlen and UHI_argn adds b10ccec100 target/mips: Remove GET_TARGET_STRING and FREE_TARGET_STRING adds 455c62d85f Merge tag 'mips-20220712' of https://github.com/philmd/qemu [...]
No new revisions were added by this update.
Summary of changes: include/semihosting/console.h | 13 -- semihosting/console.c | 9 - target/mips/cpu-defs.c.inc | 28 +++ target/mips/mips-defs.h | 1 + target/mips/tcg/meson.build | 2 + target/mips/tcg/octeon.decode | 41 ++++ target/mips/tcg/octeon_translate.c | 201 +++++++++++++++++++ target/mips/tcg/sysemu/mips-semi.c | 383 +++++++++++++++++-------------------- target/mips/tcg/translate.c | 5 + target/mips/tcg/translate.h | 1 + 10 files changed, 458 insertions(+), 226 deletions(-) create mode 100644 target/mips/tcg/octeon.decode create mode 100644 target/mips/tcg/octeon_translate.c