This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allnoconfig in repository toolchain/ci/llvm-project.
from 22a8f35ce0e [IntrinsicEmitter] Add overloaded types for SVE intrinsics [...] adds 73351971479 [lldb][NFC] Remove unused include in TestLineEntry.cpp adds 03475adcf72 Revert r372366 "Use getTargetConstant for BLENDI, and add a [...] adds 169cb63478a [AMDGPU] Use std::make_tuple to make some toolchains happy again adds 6192ad26223 Move decl completion out of the ASTImporterDelegate and doc [...] adds 8599ffa4b1c [StaticAnalyzer] Use llvm::StringLiteral instead of StringR [...] adds 81aa62addf7 [SystemZ] Add SystemZ as supporting target in help text fo [...] adds 4a13c828f6d [clang-tidy] Fix relative path in header-filter. adds 2a47c77e720 [FastISel] Fix insertion of unconditional branches during FastISel adds 6c127cdb99f [Alignment][NFC] migrate DataLayout internal struct to llvm::Align adds 2d0cd6cac84 [RISCV] Fix static analysis issues adds 4fff87d2eea [Testing] Python 3 requires `print` to use parens adds 4896f7243d6 [SLPVectorizer] add tests for bogus reductions; NFC adds e5d17c511fa [CUDA][HIP] Fix hostness of defaulted constructor Clang doe [...] adds 084801bdc1a Use llvm::StringLiteral instead of StringRef in few places adds 81669d5ead6 [TextAPI] Arch&Platform to Target adds 927699490ae gn build: Merge r372396 adds b71d8d465aa Add a missing space in a MIR parser error message adds be428513cb0 [docs] Remove training whitespaces. NFC adds 26720514958 [ELF] Error if the linked-to section of a SHF_LINK_ORDER se [...] adds c84722ff277 [ARM] Fix CTTZ not generating correct instructions MVE adds d21087af958 [InstCombine] Tests for (a+b)<=a && (a+b)!=0 fold (PR43259) adds 2b5d7e93dd1 [MVT] Add v256i1 to MachineValueType adds af77ca7e6e7 Remove assert from MachineLoop::getLoopPredecessor() adds ae685e7aab7 Unwind: prevent unw_get_proc_info from returning stale data adds f6398fb72c9 [aarch64] add def-pats for dot product adds 1b7b4b467f0 [SelectionDAG][Mips][Sparc] Don't allow SimplifyDemandedBit [...] adds eff88e42f78 [libTooling] Add `ifBound`, `elseBranch` RangeSelector comb [...] adds 330014843ce Doxygenify comments. adds c2bda3e422a [MTE] Handle MTE instructions in AArch64LoadStoreOptimizer. adds 081eebc58fc [NFC][InstCombine] Fixup newly-added tests adds 951cd32f4ba Reland '[analyzer][MallocChecker][NFC] Document and reorgan [...] adds 2d2850ff09b [www] Turn 'Clang 9' boxes green in C++ status pages now Cl [...] adds 7dab840fd4f Fix MSVC "not all control paths return a value" warning. NFCI. adds e065e5f12a7 [NFC][PowerPC] Refactor classifyGlobalReference adds 60a6f31dde4 Fix -Wdocumentation warning. NFCI. adds 96be6f485c7 Fix a documentation error adds c139d1e2810 [Mips] Remove immarg test for intrinsics that no longer hav [...] adds 6a234677f49 Can't pass .dSYM directory to llvm-objdump -dsym= (and erro [...] adds 830909b97a9 Ensure AtomicExpr goes through SEMA checking after TreeTransform adds 949a126438b [docs] Update structure-aware-fuzzing link. adds ce7cfbccc63 [lldb] Process formatters in reverse-chronological order adds 72a3d8597da Revert "[MachinePipeliner] Improve the TargetInstrInfo API [...] adds 216be996d68 [NFC][PowerPC] Consolidate testing of common linkage symbols adds 0ae02fd71a3 Unwind: avoid warning about unused typedef adds 01a3080960e [Docs] Move topics to new categories adds 2e0c95edfe0 [AddressSanitizer] Don't dereference dyn_cast<ConstantInt> [...] adds 63ddbc2fbc3 [PPC] PPCLoopPreIncPrep - silence static analyzer null dere [...] adds eacbe1cccc4 [Docs] Add a custom sidebar to doc pages adds 4a58936716e Fix missed case of switching getConstant to getTargetConsta [...] adds 819c1651f72 [SystemZ] Support z15 processor name adds 48b40834dc5 [SystemZ] Support z15 processor name adds 397a686762e Fix assertion failure when constant evaluation of a switch [...] adds 6c0894b58ac Remove outdated FIXME. adds f118852046a [SampleFDO] Expose an interface to return the size of a sec [...] adds 2f32e5d84d3 [Inliner] Remove incorrect early exit during switch cost co [...] adds e021d690943 dotest.py: bugfix: test filters with -f do not work on Python3 adds 7d6a95cf83f prepare_binding_Python: print readable errors if SWIG fails adds 7ac1039957f [GlobalISel] Defer setting HasCalls on MachineFrameInfo to [...] adds 172e8a7a5de [clang-scan-deps] strip the --serialize-diagnostics argument adds 2f6a52816fc [clang-tidy] Add check for classes missing -hash ⚠️ adds c96d5545f0c gn build: Merge r372445 adds 3e6590c4517 Support for 64-bit PC-relative relocations for X86_64 adds 6541c7988b8 Improve -Wtautological-overlap-compare adds bd7f2354ccb LiveIntervals: Add missing operator!= for segments adds eb6eb694e42 AMDGPU/GlobalISel: Allow selection of scalar min/max adds d98d3ea9fe3 avr targetinfo: remove unneeded dep on MC adds 27a80391718 Revert assertion added by r372394 adds 4c05de8c1d1 Merge and improve code that detects same value in comparisons. adds 77297f0761d Fix bad APInt compare. adds 10793e791f5 [Clang Interpreter] Fixed Bug 43362, build failure on GCC adds 4fa12ac92ce [X86] Add test case to show failure to fold load with getma [...] adds 04682939eb7 [X86] Use sse_load_f32/f64 and timm in patterns for memory [...] adds 88270475515 Stop tracking atexit/__cxa_atexit/pthread_atfork allocation [...] adds 5fe1e55d354 Avoid memory leak in ASan test adds 1b58389428e Add __lsan::ScopedInterceptorDisabler for strerror(3) adds c90fda6abe8 Attempt to fix a windows buildbot failure adds 8a74eca398a [MachinePipeliner] Improve the TargetInstrInfo API analyzeL [...] new 3bb56fa4789 Revert "[SampleFDO] Expose an interface to return the size [...] new fae979bc682 [AArch64][GlobalISel] Make <4 x s32> G_ASHR and G_LSHR legal. new a59a886832b [AArch64][GlobalISel] Selection support for G_ASHR of <2 x s64> new 9c7d599dec9 [AArch64][GlobalISel] Implement selection for G_SHL of <2 x i64>
The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: .../clang-tidy/ClangTidyDiagnosticConsumer.cpp | 4 +- clang-tools-extra/clang-tidy/objc/CMakeLists.txt | 1 + .../clang-tidy/objc/MissingHashCheck.cpp | 62 + .../clang-tidy/objc/MissingHashCheck.h | 35 + .../clang-tidy/objc/ObjCTidyModule.cpp | 3 + clang-tools-extra/docs/ReleaseNotes.rst | 6 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 1 + .../docs/clang-tidy/checks/objc-missing-hash.rst | 16 + .../Inputs/file-filter/subfolder_a/header_a.h | 3 + .../Inputs/file-filter/subfolder_b/header_b.h | 1 + .../Inputs/file-filter/subfolder_c/header_c.h | 1 + clang-tools-extra/test/clang-tidy/file-filter.cpp | 81 +- .../test/clang-tidy/objc-missing-hash.m | 68 ++ clang/docs/ClangCommandLineReference.rst | 2 +- clang/docs/ReleaseNotes.rst | 6 +- clang/include/clang/AST/Expr.h | 5 + clang/include/clang/Driver/Options.td | 2 +- clang/include/clang/Sema/Sema.h | 3 + .../clang/StaticAnalyzer/Core/AnalyzerOptions.h | 13 +- clang/include/clang/Tooling/ArgumentsAdjusters.h | 4 + .../clang/Tooling/Refactoring/RangeSelector.h | 9 + clang/lib/AST/Expr.cpp | 106 ++ clang/lib/AST/ExprConstant.cpp | 31 +- clang/lib/AST/Interp/InterpStack.cpp | 1 + clang/lib/Analysis/CFG.cpp | 77 +- clang/lib/Analysis/ReachableCode.cpp | 2 +- clang/lib/Basic/Targets/SystemZ.cpp | 2 +- clang/lib/Sema/SemaCUDA.cpp | 38 +- clang/lib/Sema/SemaChecking.cpp | 101 +- clang/lib/Sema/SemaExpr.cpp | 31 +- clang/lib/Sema/TreeTransform.h | 13 +- .../lib/StaticAnalyzer/Checkers/MallocChecker.cpp | 1183 ++++++++++++-------- clang/lib/Tooling/ArgumentsAdjusters.cpp | 16 + clang/lib/Tooling/Refactoring/RangeSelector.cpp | 24 + clang/test/AST/atomic-expr.cpp | 19 + clang/test/Analysis/array-struct-region.cpp | 6 + clang/test/Analysis/cfg.cpp | 21 + .../ClangScanDeps/Inputs/strip_diag_serialize.json | 7 + clang/test/ClangScanDeps/strip_diag_serialize.cpp | 11 + .../test/CodeGen/builtins-systemz-vector3-error.c | 2 +- clang/test/CodeGen/builtins-systemz-vector3.c | 2 +- .../test/CodeGen/builtins-systemz-zvector3-error.c | 2 +- clang/test/CodeGen/builtins-systemz-zvector3.c | 4 +- clang/test/CodeGen/systemz-abi-vector.c | 2 + clang/test/CodeGen/systemz-abi.c | 2 + clang/test/CodeGen/target-data.c | 2 + clang/test/Driver/systemz-march.c | 2 + clang/test/Misc/target-invalid-cpu-note.c | 2 +- clang/test/Preprocessor/predefined-arch-macros.c | 3 + clang/test/Sema/warn-overlap.c | 31 + clang/test/Sema/warn-unreachable.c | 2 +- clang/test/SemaCUDA/default-ctor.cu | 43 + clang/test/SemaCXX/compare-cxx2a.cpp | 6 + clang/test/SemaCXX/constant-expression-cxx2a.cpp | 13 + clang/test/SemaCXX/self-comparison.cpp | 82 ++ clang/test/SemaCXX/warn-unreachable.cpp | 5 +- clang/tools/clang-scan-deps/ClangScanDeps.cpp | 2 + clang/unittests/Tooling/RangeSelectorTest.cpp | 54 + clang/www/cxx_dr_status.html | 24 +- clang/www/cxx_status.html | 30 +- clang/www/make_cxx_dr_status | 3 - compiler-rt/lib/asan/asan_interceptors.cpp | 49 +- compiler-rt/lib/asan/asan_interceptors.h | 12 + compiler-rt/lib/lsan/lsan_interceptors.cpp | 54 + .../sanitizer_common_interceptors.inc | 6 + .../sanitizer_platform_interceptors.h | 4 + compiler-rt/test/asan/TestCases/inline.cpp | 1 + libunwind/src/AddressSpace.hpp | 6 +- libunwind/src/UnwindCursor.hpp | 5 +- libunwind/test/libunwind_01.pass.cpp | 21 + lld/ELF/Writer.cpp | 18 +- lld/test/ELF/gc-sections-metadata-err.s | 37 + .../lldb/DataFormatters/FormattersContainer.h | 62 +- lldb/include/lldb/Symbol/ClangASTImporter.h | 54 +- lldb/include/lldb/Symbol/Variable.h | 75 +- lldb/include/lldb/Utility/RegularExpression.h | 4 - .../TestDataFormatterAdv.py | 7 + lldb/scripts/Python/prepare_binding_Python.py | 10 +- lldb/source/Symbol/ClangASTImporter.cpp | 202 ++-- lldb/source/Symbol/Variable.cpp | 15 +- .../Python/module/unittest2/unittest2/loader.py | 2 +- lldb/unittests/Symbol/TestLineEntry.cpp | 1 - llvm/docs/Frontend/PerformanceTips.rst | 254 ++--- llvm/docs/LibFuzzer.rst | 2 +- llvm/docs/ProgrammingDocumentation.rst | 9 - llvm/docs/SubsystemDocumentation.rst | 5 - llvm/docs/UserGuides.rst | 9 - llvm/docs/_templates/indexsidebar.html | 9 +- llvm/docs/conf.py | 11 +- llvm/docs/index.rst | 28 +- llvm/include/llvm/Analysis/LoopInfoImpl.h | 2 - llvm/include/llvm/CodeGen/LiveInterval.h | 4 + llvm/include/llvm/CodeGen/ValueTypes.td | 251 ++--- llvm/include/llvm/IR/BasicBlock.h | 5 + llvm/include/llvm/IR/DataLayout.h | 28 +- llvm/include/llvm/IR/IntrinsicsMips.td | 16 +- llvm/include/llvm/Support/MachineValueType.h | 251 +++-- llvm/include/llvm/TextAPI/MachO/Architecture.h | 4 + llvm/include/llvm/TextAPI/MachO/ArchitectureSet.h | 4 + llvm/include/llvm/TextAPI/MachO/InterfaceFile.h | 144 ++- llvm/include/llvm/TextAPI/MachO/Platform.h | 40 + llvm/include/llvm/TextAPI/MachO/Symbol.h | 26 +- llvm/include/llvm/TextAPI/MachO/Target.h | 66 ++ llvm/lib/Analysis/InlineCost.cpp | 13 - llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 4 +- llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp | 18 + llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 3 - llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 8 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 2 + llvm/lib/CodeGen/ValueTypes.cpp | 2 + llvm/lib/IR/BasicBlock.cpp | 7 + llvm/lib/IR/DataLayout.cpp | 106 +- llvm/lib/Object/RelocationResolver.cpp | 2 + llvm/lib/Object/TapiFile.cpp | 4 +- llvm/lib/Support/Host.cpp | 2 +- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 109 ++ .../Target/AArch64/AArch64InstructionSelector.cpp | 10 +- llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp | 8 +- .../Target/AArch64/AArch64LoadStoreOptimizer.cpp | 130 ++- .../Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp | 18 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 12 +- .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 8 +- llvm/lib/Target/AMDGPU/SOPInstructions.td | 8 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 2 +- llvm/lib/Target/AVR/TargetInfo/LLVMBuild.txt | 4 +- llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 21 +- llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp | 20 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 9 +- llvm/lib/Target/PowerPC/PPCFastISel.cpp | 3 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 10 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 15 +- llvm/lib/Target/PowerPC/PPCLoopPreIncPrep.cpp | 2 +- llvm/lib/Target/PowerPC/PPCSubtarget.cpp | 13 +- llvm/lib/Target/PowerPC/PPCSubtarget.h | 5 +- llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 4 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 2 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 3 +- llvm/lib/Target/Sparc/SparcISelLowering.cpp | 6 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 2 +- llvm/lib/Target/SystemZ/SystemZProcessors.td | 3 +- llvm/lib/Target/SystemZ/SystemZSchedule.td | 2 +- ...temZScheduleArch13.td => SystemZScheduleZ15.td} | 64 +- .../Target/SystemZ/SystemZTargetTransformInfo.cpp | 2 +- llvm/lib/Target/X86/X86InsertPrefetch.cpp | 2 +- llvm/lib/Target/X86/X86InstrAVX512.td | 7 +- llvm/lib/TextAPI/CMakeLists.txt | 2 + llvm/lib/TextAPI/MachO/Architecture.cpp | 4 + llvm/lib/TextAPI/MachO/InterfaceFile.cpp | 80 +- llvm/lib/TextAPI/MachO/Platform.cpp | 62 + llvm/lib/TextAPI/MachO/Symbol.cpp | 9 + llvm/lib/TextAPI/MachO/Target.cpp | 45 + llvm/lib/TextAPI/MachO/TextStub.cpp | 86 +- llvm/lib/TextAPI/MachO/TextStubCommon.cpp | 39 +- llvm/lib/TextAPI/MachO/TextStubCommon.h | 8 +- .../Instrumentation/AddressSanitizer.cpp | 4 +- llvm/test/Analysis/CostModel/SystemZ/fp-cast.ll | 36 +- llvm/test/Analysis/CostModel/SystemZ/intrinsics.ll | 22 +- .../Analysis/CostModel/SystemZ/logic-miscext3.ll | 24 +- .../CodeGen/AArch64/GlobalISel/call-translator.ll | 1 - .../AArch64/GlobalISel/legalize-vector-shift.mir | 78 ++ .../AArch64/GlobalISel/select-vector-shift.mir | 59 + .../AArch64/GlobalISel/tail-call-no-save-fp-lr.ll | 20 + .../AArch64/fast-isel-branch-uncond-debug.ll | 44 + llvm/test/CodeGen/AArch64/ldst-opt-mte.mir | 285 +++++ llvm/test/CodeGen/AArch64/neon-dot-product.ll | 142 +++ llvm/test/CodeGen/AArch64/stgp.ll | 2 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-smax.mir | 15 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-smin.mir | 15 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-umax.mir | 15 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-umin.mir | 15 +- .../GlobalISel/isel-blendi-gettargetconstant.ll | 14 - llvm/test/CodeGen/AMDGPU/loop_header_nopred.mir | 92 ++ .../CodeGen/Hexagon/autohvx/isel-setcc-v256i1.ll | 15 + .../test/CodeGen/MIR/X86/call-site-info-error2.mir | 2 +- .../PowerPC/CompareEliminationSpillIssue.ll | 2 +- llvm/test/CodeGen/PowerPC/csr-split.ll | 2 +- llvm/test/CodeGen/PowerPC/ctrloop-shortLoops.ll | 14 +- llvm/test/CodeGen/PowerPC/elf-common.ll | 45 + llvm/test/CodeGen/PowerPC/expand-isel.ll | 4 +- llvm/test/CodeGen/PowerPC/f128-aggregates.ll | 2 +- llvm/test/CodeGen/PowerPC/ppc64-P9-mod.ll | 16 +- .../CodeGen/PowerPC/ppc64-pre-inc-no-extra-phi.ll | 2 +- llvm/test/CodeGen/PowerPC/pr32140.ll | 8 +- llvm/test/CodeGen/PowerPC/pr36068.ll | 2 +- llvm/test/CodeGen/PowerPC/pr39815.ll | 4 +- llvm/test/CodeGen/PowerPC/sms-simple.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesieqsc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesieqsi.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesieqsll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesieqss.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiequc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiequi.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiequll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiequs.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigesc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigesi.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigesll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigess.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigeuc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigeui.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigeull.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigeus.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigtsc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigtsi.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigtsll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigtss.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigtuc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigtui.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigtus.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesilesc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesilesi.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesilesll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiless.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesileuc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesileui.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesileull.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesileus.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiltsc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiltsi.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiltsll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiltss.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiltuc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiltui.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiltus.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesinesc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesinesi.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesinesll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiness.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesineuc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesineui.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesineull.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesineus.ll | 2 +- llvm/test/CodeGen/PowerPC/testCompareslleqsc.ll | 2 +- llvm/test/CodeGen/PowerPC/testCompareslleqsi.ll | 2 +- llvm/test/CodeGen/PowerPC/testCompareslleqsll.ll | 2 +- llvm/test/CodeGen/PowerPC/testCompareslleqss.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllequc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllequi.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllequll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllequs.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgesc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgesi.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgesll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgess.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgeuc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgeui.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgeull.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgeus.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgtsll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgtuc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgtui.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgtus.ll | 2 +- llvm/test/CodeGen/PowerPC/testCompareslllesc.ll | 2 +- llvm/test/CodeGen/PowerPC/testCompareslllesi.ll | 2 +- llvm/test/CodeGen/PowerPC/testCompareslllesll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllless.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllleuc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllleui.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllleull.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllleus.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllltsll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllltuc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllltui.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllltus.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllnesll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllneull.ll | 2 +- llvm/test/CodeGen/PowerPC/zext-and-cmp.ll | 2 +- llvm/test/CodeGen/SystemZ/cond-move-01.ll | 2 +- llvm/test/CodeGen/SystemZ/cond-move-02.ll | 2 +- llvm/test/CodeGen/SystemZ/cond-move-03.ll | 2 +- llvm/test/CodeGen/SystemZ/cond-move-06.ll | 2 +- llvm/test/CodeGen/SystemZ/cond-move-07.ll | 2 +- llvm/test/CodeGen/SystemZ/cond-move-08.mir | 4 +- llvm/test/CodeGen/SystemZ/ctpop-02.ll | 4 +- llvm/test/CodeGen/SystemZ/not-01.ll | 4 +- llvm/test/CodeGen/SystemZ/vec-bswap-01.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-bswap-02.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-bswap-03.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-bswap-04.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-bswap-05.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-bswap-06.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-bswap-07.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-conv-03.ll | 4 +- llvm/test/CodeGen/SystemZ/vec-eswap-01.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-eswap-02.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-intrinsics-03.ll | 4 +- llvm/test/CodeGen/SystemZ/vec-strict-conv-03.ll | 4 +- llvm/test/CodeGen/Thumb2/mve-cttz.ll | 42 +- llvm/test/CodeGen/X86/avx512-intrinsics.ll | 16 + .../CodeGen/X86/isel-blendi-gettargetconstant.ll | 19 + .../SystemZ/{insns-arch13.txt => insns-z15.txt} | 4 +- .../SystemZ/{insn-bad-arch13.s => insn-bad-z15.s} | 4 +- .../{insn-good-arch13.s => insn-good-z15.s} | 4 +- llvm/test/Reduce/Inputs/remove-instructions.py | 2 +- llvm/test/Transforms/Inline/X86/switch.ll | 160 +++ ...add-of-negative-is-non-zero-and-no-underflow.ll | 35 +- ...egative-or-zero-is-non-zero-and-no-underflow.ll | 166 +++ .../Transforms/SLPVectorizer/X86/bad-reduction.ll | 334 ++++++ llvm/test/Verifier/Mips/intrinsic-immarg.ll | 82 -- llvm/tools/llvm-ifs/llvm-ifs.cpp | 27 +- llvm/tools/llvm-objdump/MachODump.cpp | 31 +- llvm/unittests/IR/BasicBlockTest.cpp | 3 + llvm/unittests/TextAPI/TextStubV1Tests.cpp | 64 +- llvm/unittests/TextAPI/TextStubV2Tests.cpp | 67 +- llvm/unittests/TextAPI/TextStubV3Tests.cpp | 63 +- .../clang-tools-extra/clang-tidy/objc/BUILD.gn | 1 + llvm/utils/gn/secondary/llvm/lib/TextAPI/BUILD.gn | 2 + 308 files changed, 5385 insertions(+), 2116 deletions(-) create mode 100644 clang-tools-extra/clang-tidy/objc/MissingHashCheck.cpp create mode 100644 clang-tools-extra/clang-tidy/objc/MissingHashCheck.h create mode 100644 clang-tools-extra/docs/clang-tidy/checks/objc-missing-hash.rst create mode 100644 clang-tools-extra/test/clang-tidy/Inputs/file-filter/subfolder_ [...] create mode 100644 clang-tools-extra/test/clang-tidy/Inputs/file-filter/subfolder_ [...] create mode 100644 clang-tools-extra/test/clang-tidy/Inputs/file-filter/subfolder_ [...] create mode 100644 clang-tools-extra/test/clang-tidy/objc-missing-hash.m create mode 100644 clang/test/AST/atomic-expr.cpp create mode 100644 clang/test/ClangScanDeps/Inputs/strip_diag_serialize.json create mode 100644 clang/test/ClangScanDeps/strip_diag_serialize.cpp create mode 100644 clang/test/SemaCUDA/default-ctor.cu create mode 100644 lld/test/ELF/gc-sections-metadata-err.s create mode 100644 llvm/include/llvm/TextAPI/MachO/Platform.h create mode 100644 llvm/include/llvm/TextAPI/MachO/Target.h rename llvm/lib/Target/SystemZ/{SystemZScheduleArch13.td => SystemZScheduleZ15.td} (97%) create mode 100644 llvm/lib/TextAPI/MachO/Platform.cpp create mode 100644 llvm/lib/TextAPI/MachO/Target.cpp create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-shift.mir create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/tail-call-no-save-fp-lr.ll create mode 100644 llvm/test/CodeGen/AArch64/fast-isel-branch-uncond-debug.ll create mode 100644 llvm/test/CodeGen/AArch64/ldst-opt-mte.mir delete mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/isel-blendi-gettargetconstant.ll create mode 100644 llvm/test/CodeGen/AMDGPU/loop_header_nopred.mir create mode 100644 llvm/test/CodeGen/Hexagon/autohvx/isel-setcc-v256i1.ll create mode 100644 llvm/test/CodeGen/PowerPC/elf-common.ll create mode 100644 llvm/test/CodeGen/X86/isel-blendi-gettargetconstant.ll rename llvm/test/MC/Disassembler/SystemZ/{insns-arch13.txt => insns-z15.txt} (99%) rename llvm/test/MC/SystemZ/{insn-bad-arch13.s => insn-bad-z15.s} (99%) rename llvm/test/MC/SystemZ/{insn-good-arch13.s => insn-good-z15.s} (99%) create mode 100644 llvm/test/Transforms/Inline/X86/switch.ll create mode 100644 llvm/test/Transforms/InstCombine/result-of-add-of-negative-or-z [...] create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/bad-reduction.ll delete mode 100644 llvm/test/Verifier/Mips/intrinsic-immarg.ll