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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig in repository toolchain/ci/llvm-project.
from 5f184f17800 [llvm-nm] Generalize symbol types 'N', 'n' and '?' adds 4b17772b9ee [PowerPC] Update P9 vector costs for insert/extract element adds 5015aa854dc [ThinLTO] Fix X86/strong_non_prevailing.ll after llvm-nm 'r [...] adds 283bc74054e [llvm-nm] Revert inadvertently committed 'i' change in r359314 adds 8f3da70eed3 [AMDGPU] gfx1010 VOP2 changes adds ad662cf4c18 [X86] Segment registers should have i16 type not i32. adds 354247c08d4 [X86] Sink NoRegister creation for unused Base/Index regist [...] adds edebf12acfe Replace local utility class OnExit with llvm::scope_exit (NFC) adds f30f261dc53 [libc++] Relax libc++-only test on regex_constants adds c0fa4ec01dd [ConstantRange] Add abs() support adds 60f5df948b0 [asan_symbolize] Teach `asan_symbolize.py` to symbolicate u [...] adds efc94feef98 [NFC] Remove ::kForTest from AP64, it does not use it. adds c29db2d83ed Add '_LIBCPP_ASSERT(ready())' to several match_results meth [...] adds aebd3014a59 [NFC][Sanitizer] Change "return type" of INTERCEPT_FUNCTION [...] adds ef54b1dddf4 [DAGCombine] Cleanup visitEXTRACT_SUBVECTOR. NFCI. adds 18bc8724054 Revert "[CMake] Fix the value of `config.target_cflags` for [...] adds 61beff020e0 [AMDGPU] gfx1010 VOP3 and VOP3P implementation adds 1d30f0c93e7 Fix typo in documentation. adds 8d1fb843274 [ScriptInterpreter] Pass the debugger instead of the comman [...] adds 67ab9eb193c [AArch64][GlobalISel] Select G_BSWAP for vectors of s32 and s64 adds 27e01e675c1 [X86][AVX] Fold extract_subvector(broadcast(x)) -> broadcas [...] adds 85dcdae5e36 [sanitizer] NFC: add static_assert to confirm that we use o [...] adds 077c502ddc1 Implement __sanitizer::conditional<B, T, F> adds d0e58300172 [Sanitizer] Fix compliation error in test adds 74967cb4e04 [Sanitizer] Fix test adds 7ab164c4a42 [AsmPrinter] refactor to support %c w/ GlobalAddress' adds 16b90733c75 [ASTImporter] Copy Argument Passing Restrictions setting wh [...] adds 93c05f097a9 [Sanitizer][Windows] Speculative fix for broken build on Windows adds 5ddc6d180cd [OPENMP]Added check for non-random access types for the dep [...] adds c03fe731760 [OPENMP][NVPTX]Correctly handle L2 parallelism in SPMD mode. adds da93dec3305 [MinGW] Don't let template instantiation declarations cover [...] adds 9534e9dbe44 [MinGW] Do dllexport inline methods in template instantiation adds 3820506960e [HIP] Fix visibility of `__constant__` variables. adds 228ccd67548 [MinGW] Always emit local typeinfo adds f20dd1d5a62 [CommandInterpreter] Remove scripting language argument. (NFC) adds b6661490b42 TestZMMRegister: use an integer division as intended adds 18b0c40bc5d [AArch64] Add support for MTE intrinsics This provides intr [...] adds fad0aa1e3a1 Pass explicit C++ version to test adds 5f163c7e2e6 Add to the release notes the fact that UninitializedObject [...] adds 76f64b665bb [GlobalISel][AArch64] Use getConstantVRegValWithLookThrough [...] adds 8504b5f64f4 Revert "[sanitizer] NFC: add static_assert to confirm that [...] adds 3bf116c1a4f [driver][macOS] Link libarclite from the default toolchain [...] adds 2b29b432d20 [ScriptInterpreter] Move ownership into debugger (NFC) adds de3d12f9549 [Driver] Remove unused functions (NFC) adds 353f593976d [clang][driver] Weaken the test from 359353 to appease Wind [...] adds a9fdf375b37 [ORC] Add a 'plugin' interface to ObjectLinkingLayer for ev [...] adds 4f331cb1f31 [AMDGPU] gfx1010 VOPC implementation adds 0f9f021d05a [Driver] Support priority for multilibs adds b58561baa50 [Fuchsia] Support multilib for -fsanitize=address and -fno- [...] adds 1dbd42ab5ba Revert Fix interactions between __builtin_constant_p and co [...] adds c1008e4d3da [NFC][Sanitizer] Remove GetRealFunctionAddress and replace usages adds 76c5b62988f Revert "AMDGPU: Split block for si_end_cf" adds 83c6d10b62a [sanitizer] NFC: add static_assert to confirm that we use r [...] adds ae01981d03e [AArch64] Initialize HasMTE adds 31cfb311c5c Reinstate r359059, reverted in r359361, with a fix to prope [...] adds 063b471ff7f [X86] Use MOVQ for i64 atomic_stores when SSE2 is enabled adds 40dfc3920e0 [FormatEntity] Remove unused format type (NFC) adds 57179860a05 [CommandObject] Use GetDebugger() helper method (NFC) adds 0f21545a3c9 [sanitizer] Calculate SizeClassAllocator32::ByteMap type fr [...] adds b907c442653 [lldb] [lit] Cleanly terminate Register tests adds b82144b6e4b [cmake] Disable a GCC optimization when building LLVM for MIPS adds d77dc9ada20 [MCA] Add field `IsEliminated` to class Instruction. NFCI adds acc1e6d1c61 [X86][AVX] Merge mask select with shuffles across extract_s [...] adds 3879b2cd45e [X86][SSE] Add initial test case for subvector insert/extra [...] adds 0969af6962e [llvm-nm] Support section type 'u': STB_GNU_UNIQUE adds 795c00b21f0 [DJB] Fix variable case after D61178 adds 5cf616530a1 Fix check-prefixes typo
No new revisions were added by this update.
Summary of changes: .../clang-tidy/checks/abseil-time-comparison.rst | 2 +- clang/docs/ReleaseNotes.rst | 3 +- clang/include/clang/Basic/BuiltinsAArch64.def | 8 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 16 +- clang/include/clang/Driver/Multilib.h | 7 +- clang/include/clang/Sema/Sema.h | 1 + clang/lib/AST/ASTImporter.cpp | 3 + clang/lib/AST/ExprConstant.cpp | 18 +- clang/lib/Basic/Targets/AArch64.cpp | 6 + clang/lib/Basic/Targets/AArch64.h | 1 + clang/lib/CodeGen/CGBuiltin.cpp | 91 +- clang/lib/CodeGen/ItaniumCXXABI.cpp | 2 +- clang/lib/CodeGen/TargetInfo.cpp | 3 +- clang/lib/Driver/Multilib.cpp | 20 +- clang/lib/Driver/ToolChains/CommonArgs.cpp | 39 +- clang/lib/Driver/ToolChains/CommonArgs.h | 11 +- clang/lib/Driver/ToolChains/Darwin.cpp | 31 +- clang/lib/Driver/ToolChains/Fuchsia.cpp | 52 +- clang/lib/Driver/ToolChains/Gnu.cpp | 12 +- clang/lib/Headers/arm_acle.h | 10 + clang/lib/Sema/SemaChecking.cpp | 164 ++++ clang/lib/Sema/SemaDeclCXX.cpp | 7 +- clang/lib/Sema/SemaOpenMP.cpp | 129 +-- clang/lib/Sema/SemaTemplateInstantiate.cpp | 6 +- clang/test/CodeGen/arm64-mte.c | 110 +++ clang/test/CodeGen/builtin-constant-p.c | 8 + clang/test/CodeGenCUDA/amdgpu-visibility.cu | 21 + clang/test/CodeGenCXX/mingw-template-dllexport.cpp | 16 +- clang/test/CodeGenCXX/vtable-key-function-ios.cpp | 10 +- .../aarch64-fuchsia/lib/noexcept}/.keep | 0 .../x86_64-fuchsia/lib/noexcept}/.keep | 0 .../test/Driver/arclite-link-external-toolchain.c | 8 + clang/test/Driver/fuchsia.cpp | 21 + clang/test/Import/cxx-record-flags/Inputs/F.cpp | 9 + clang/test/Import/cxx-record-flags/test.cpp | 14 + clang/test/OpenMP/for_loop_messages.cpp | 28 +- clang/test/Preprocessor/aarch64-target-features.c | 3 + clang/test/Sema/builtins-arm64-mte.c | 136 +++ clang/unittests/Driver/MultilibTest.cpp | 24 + compiler-rt/cmake/config-ix.cmake | 26 - compiler-rt/lib/asan/asan_allocator.h | 13 +- compiler-rt/lib/asan/asan_interceptors.h | 8 +- compiler-rt/lib/asan/asan_win.cc | 9 +- compiler-rt/lib/asan/scripts/asan_symbolize.py | 243 ++++++ compiler-rt/lib/interception/interception_linux.cc | 6 - compiler-rt/lib/interception/interception_linux.h | 14 +- .../interception/tests/interception_linux_test.cc | 13 +- compiler-rt/lib/lsan/lsan_allocator.h | 15 +- compiler-rt/lib/msan/msan_allocator.cc | 12 +- compiler-rt/lib/msan/msan_interceptors.cc | 8 +- .../sanitizer_allocator_internal.h | 11 +- .../sanitizer_allocator_primary32.h | 29 +- .../lib/sanitizer_common/sanitizer_type_traits.h | 19 + .../tests/sanitizer_allocator_test.cc | 25 +- .../tests/sanitizer_type_traits_test.cc | 5 + compiler-rt/lib/scudo/scudo_allocator.h | 7 - compiler-rt/lib/tsan/rtl/tsan_interceptors.cc | 24 +- compiler-rt/lib/tsan/rtl/tsan_rtl.h | 13 +- compiler-rt/test/asan/CMakeLists.txt | 11 +- .../Darwin/asan-symbolize-with-module-map.cc | 31 + compiler-rt/test/fuzzer/CMakeLists.txt | 6 +- compiler-rt/test/tsan/CMakeLists.txt | 12 +- compiler-rt/test/ubsan/CMakeLists.txt | 9 +- libcxx/include/regex | 33 +- .../std/re/re.const/re.err/error_type.pass.cpp | 26 +- .../re.results.all/get_allocator.pass.cpp | 2 +- .../re.results/re.results.const/allocator.pass.cpp | 2 +- .../re/re.results/re.results.const/copy.pass.cpp | 2 +- .../re.results.const/copy_assign.pass.cpp | 2 +- .../re.results/re.results.const/default.pass.cpp | 2 +- .../re/re.results/re.results.const/move.pass.cpp | 2 +- .../re.results.const/move_assign.pass.cpp | 2 +- lldb/include/lldb/Core/Debugger.h | 5 + lldb/include/lldb/Core/FormatEntity.h | 4 - lldb/include/lldb/Core/PluginManager.h | 2 +- lldb/include/lldb/Interpreter/CommandInterpreter.h | 11 +- lldb/include/lldb/Interpreter/CommandObject.h | 1 + lldb/include/lldb/Interpreter/ScriptInterpreter.h | 9 +- lldb/include/lldb/lldb-private-interfaces.h | 2 +- .../ExecControl/StopHook/stop-hook-threads.test | 2 +- lldb/lit/Register/x86-64-read.test | 3 + lldb/lit/Register/x86-64-ymm-read.test | 3 + lldb/lit/Register/x86-mm-xmm-read.test | 3 + lldb/lit/Register/x86-ymm-read.test | 3 + .../register/intel_avx/TestZMMRegister.py | 4 +- lldb/source/API/SBBreakpoint.cpp | 2 - lldb/source/API/SBBreakpointLocation.cpp | 2 - lldb/source/API/SBBreakpointName.cpp | 2 - lldb/source/API/SBTypeCategory.cpp | 4 +- lldb/source/Breakpoint/BreakpointOptions.cpp | 3 +- .../Breakpoint/BreakpointResolverScripted.cpp | 5 +- lldb/source/Commands/CommandObjectApropos.cpp | 2 +- lldb/source/Commands/CommandObjectBreakpoint.cpp | 2 +- .../Commands/CommandObjectBreakpointCommand.cpp | 4 +- lldb/source/Commands/CommandObjectCommands.cpp | 34 +- lldb/source/Commands/CommandObjectDisassemble.cpp | 14 +- lldb/source/Commands/CommandObjectExpression.cpp | 3 +- lldb/source/Commands/CommandObjectFrame.cpp | 2 +- lldb/source/Commands/CommandObjectGUI.cpp | 2 +- lldb/source/Commands/CommandObjectLog.cpp | 6 +- lldb/source/Commands/CommandObjectPlatform.cpp | 60 +- lldb/source/Commands/CommandObjectPlugin.cpp | 2 +- lldb/source/Commands/CommandObjectProcess.cpp | 16 +- lldb/source/Commands/CommandObjectSettings.cpp | 45 +- lldb/source/Commands/CommandObjectSource.cpp | 5 +- lldb/source/Commands/CommandObjectTarget.cpp | 45 +- lldb/source/Commands/CommandObjectThread.cpp | 6 +- lldb/source/Commands/CommandObjectType.cpp | 16 +- lldb/source/Commands/CommandObjectWatchpoint.cpp | 16 +- .../Commands/CommandObjectWatchpointCommand.cpp | 13 +- lldb/source/Core/Debugger.cpp | 31 +- lldb/source/Core/FormatEntity.cpp | 184 ++-- lldb/source/Core/Module.cpp | 3 +- lldb/source/Core/PluginManager.cpp | 9 +- lldb/source/DataFormatters/TypeSummary.cpp | 2 +- lldb/source/DataFormatters/TypeSynthetic.cpp | 3 +- lldb/source/Interpreter/CommandInterpreter.cpp | 22 +- lldb/source/Interpreter/CommandObject.cpp | 2 + lldb/source/Interpreter/CommandObjectScript.cpp | 2 +- lldb/source/Interpreter/ScriptInterpreter.cpp | 8 +- .../ExpressionParser/Clang/ClangUserExpression.cpp | 21 +- .../Python/OperatingSystemPython.cpp | 3 +- .../Plugins/Platform/MacOSX/PlatformDarwin.cpp | 2 +- .../Process/gdb-remote/ProcessGDBRemote.cpp | 2 +- .../None/ScriptInterpreterNone.cpp | 13 +- .../ScriptInterpreter/None/ScriptInterpreterNone.h | 5 +- .../Python/ScriptInterpreterPython.cpp | 67 +- .../Python/ScriptInterpreterPython.h | 4 +- .../Python/ScriptInterpreterPythonImpl.h | 5 +- lldb/source/Target/Target.cpp | 11 +- lldb/source/Target/ThreadPlanPython.cpp | 5 - lldb/tools/driver/Driver.cpp | 69 +- lldb/tools/driver/Driver.h | 11 - llvm/cmake/modules/HandleLLVMOptions.cmake | 5 + llvm/include/llvm/CodeGen/AsmPrinter.h | 4 + .../llvm/ExecutionEngine/JITLink/EHFrameSupport.h | 7 +- .../llvm/ExecutionEngine/Orc/ObjectLinkingLayer.h | 91 +- llvm/include/llvm/IR/ConstantRange.h | 4 + llvm/include/llvm/MCA/Instruction.h | 14 +- .../lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp | 19 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 21 +- .../lib/ExecutionEngine/JITLink/EHFrameSupport.cpp | 9 +- .../lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp | 195 +++-- llvm/lib/IR/ConstantRange.cpp | 31 + llvm/lib/MCA/Stages/DispatchStage.cpp | 6 +- llvm/lib/Support/DJB.cpp | 6 +- llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp | 9 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 81 +- llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 52 ++ .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 112 ++- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 58 +- .../AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp | 76 +- .../Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h | 2 + llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 22 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 13 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 11 + llvm/lib/Target/AMDGPU/SIInstrInfo.td | 13 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 1 - llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 127 +-- llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp | 6 - .../Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 4 +- llvm/lib/Target/AMDGPU/VOP1Instructions.td | 1 + llvm/lib/Target/AMDGPU/VOP2Instructions.td | 546 +++++++++--- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 338 +++++--- llvm/lib/Target/AMDGPU/VOP3PInstructions.td | 34 + llvm/lib/Target/AMDGPU/VOPCInstructions.td | 928 +++++++++++++-------- llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 26 +- llvm/lib/Target/ARM/ARMAsmPrinter.h | 1 + llvm/lib/Target/AVR/AVRAsmPrinter.cpp | 5 +- llvm/lib/Target/BPF/BPFAsmPrinter.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp | 4 +- llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp | 2 +- llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp | 30 +- llvm/lib/Target/Mips/MipsAsmPrinter.cpp | 2 +- llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 2 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 46 +- llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 29 + llvm/lib/Target/Sparc/SparcAsmPrinter.cpp | 2 +- llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp | 14 +- .../Target/WebAssembly/WebAssemblyAsmPrinter.cpp | 3 +- llvm/lib/Target/X86/X86AsmPrinter.cpp | 1 + llvm/lib/Target/X86/X86AsmPrinter.h | 2 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 64 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 130 ++- llvm/lib/Target/X86/X86ISelLowering.h | 3 + llvm/lib/Target/X86/X86InstrAVX512.td | 5 + llvm/lib/Target/X86/X86InstrFragmentsSIMD.td | 2 + llvm/lib/Target/X86/X86InstrSSE.td | 6 + llvm/lib/Target/XCore/XCoreAsmPrinter.cpp | 2 +- .../Analysis/CostModel/PowerPC/insert_extract.ll | 48 +- .../CodeGen/AArch64/GlobalISel/select-bswap.mir | 76 +- .../GlobalISel/select-extract-vector-elt.mir | 71 ++ llvm/test/CodeGen/AArch64/arm64-rev.ll | 4 + .../CodeGen/AArch64/inlineasm-output-template.ll | 27 + llvm/test/CodeGen/AMDGPU/collapse-endcf.mir | 150 ++-- .../CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.swap.ll | 2 +- llvm/test/CodeGen/AMDGPU/max-sgprs.ll | 25 + llvm/test/CodeGen/AMDGPU/preserve-hi16.ll | 96 +++ llvm/test/CodeGen/ARM/inlineasm-output-template.ll | 9 + .../{PowerPC => BPF}/inlineasm-output-template.ll | 15 +- .../CodeGen/Hexagon/inlineasm-output-template.ll | 13 +- .../CodeGen/Lanai/inlineasm-output-template.ll | 26 + .../CodeGen/MSP430/inlineasm-output-template.ll | 26 + .../{PowerPC => Mips}/inlineasm-output-template.ll | 15 +- .../CodeGen/NVPTX/inlineasm-output-template.ll | 28 + .../CodeGen/PowerPC/inlineasm-output-template.ll | 13 +- .../CodeGen/SPARC/inlineasm-output-template.ll | 26 + .../inlineasm-output-template.ll | 11 +- .../inlineasm-output-template.ll | 11 +- llvm/test/CodeGen/X86/atomic-fp.ll | 204 +---- llvm/test/CodeGen/X86/atomic-load-store-wide.ll | 56 +- llvm/test/CodeGen/X86/atomic-non-integer.ll | 176 ++-- llvm/test/CodeGen/X86/atomic6432.ll | 31 +- llvm/test/CodeGen/X86/avx512-hadd-hsub.ll | 6 +- .../CodeGen/X86/avx512-shuffles/partial_permute.ll | 241 +++--- .../inline-asm-modifier-c.ll} | 9 +- llvm/test/CodeGen/X86/oddsubvector.ll | 84 ++ llvm/test/CodeGen/X86/vector-fshl-rot-256.ll | 14 +- llvm/test/CodeGen/X86/vector-fshl-rot-512.ll | 16 +- llvm/test/CodeGen/X86/vector-fshr-rot-256.ll | 14 +- llvm/test/CodeGen/X86/vector-fshr-rot-512.ll | 16 +- llvm/test/CodeGen/X86/vector-rotate-256.ll | 12 +- llvm/test/CodeGen/X86/vector-rotate-512.ll | 8 +- .../inlineasm-output-template.ll | 11 +- .../JITLink/X86/MachO_x86-64_ehframe.test | 7 +- llvm/test/MC/AMDGPU/reg-syntax-extra.s | 13 +- llvm/test/MC/AMDGPU/vop2-err.s | 3 - llvm/test/MC/Disassembler/AMDGPU/null-reg.txt | 7 + llvm/test/ThinLTO/X86/strong_non_prevailing.ll | 4 +- llvm/tools/llvm-jitlink/llvm-jitlink.cpp | 28 +- llvm/tools/llvm-nm/llvm-nm.cpp | 4 + llvm/unittests/IR/ConstantRangeTest.cpp | 26 + .../libomptarget/deviceRTLs/nvptx/src/libcall.cu | 2 +- .../libomptarget/deviceRTLs/nvptx/src/omp_data.cu | 2 +- .../deviceRTLs/nvptx/src/omptarget-nvptx.cu | 4 +- .../deviceRTLs/nvptx/src/omptarget-nvptx.h | 3 +- .../libomptarget/deviceRTLs/nvptx/src/parallel.cu | 22 +- openmp/libomptarget/deviceRTLs/nvptx/src/support.h | 2 + .../libomptarget/deviceRTLs/nvptx/src/supporti.h | 8 +- .../nvptx/test/parallel/spmd_parallel_regions.cpp | 33 +- 241 files changed, 5040 insertions(+), 2488 deletions(-) create mode 100644 clang/test/CodeGen/arm64-mte.c create mode 100644 clang/test/CodeGenCUDA/amdgpu-visibility.cu copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => resource_dir_with [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => resource_dir_with [...] create mode 100644 clang/test/Driver/arclite-link-external-toolchain.c create mode 100644 clang/test/Import/cxx-record-flags/Inputs/F.cpp create mode 100644 clang/test/Import/cxx-record-flags/test.cpp create mode 100644 clang/test/Sema/builtins-arm64-mte.c create mode 100644 compiler-rt/test/asan/TestCases/Darwin/asan-symbolize-with-modu [...] create mode 100644 llvm/test/CodeGen/AArch64/inlineasm-output-template.ll create mode 100644 llvm/test/CodeGen/AMDGPU/max-sgprs.ll create mode 100644 llvm/test/CodeGen/AMDGPU/preserve-hi16.ll copy llvm/test/CodeGen/{PowerPC => BPF}/inlineasm-output-template.ll (57%) create mode 100644 llvm/test/CodeGen/Lanai/inlineasm-output-template.ll create mode 100644 llvm/test/CodeGen/MSP430/inlineasm-output-template.ll copy llvm/test/CodeGen/{PowerPC => Mips}/inlineasm-output-template.ll (57%) create mode 100644 llvm/test/CodeGen/NVPTX/inlineasm-output-template.ll create mode 100644 llvm/test/CodeGen/SPARC/inlineasm-output-template.ll copy llvm/test/CodeGen/{PowerPC => SystemZ}/inlineasm-output-template.ll (57%) copy llvm/test/CodeGen/{PowerPC => WebAssembly}/inlineasm-output-template.ll (58%) copy llvm/test/CodeGen/{PowerPC/inlineasm-output-template.ll => X86/inline-asm-mod [...] create mode 100644 llvm/test/CodeGen/X86/oddsubvector.ll copy llvm/test/CodeGen/{PowerPC => XCore}/inlineasm-output-template.ll (58%) create mode 100644 llvm/test/MC/Disassembler/AMDGPU/null-reg.txt