[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig updated (0eaee545eef -> f28e1128d9e)

16 Aug 2019


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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig
in repository toolchain/ci/llvm-project.
from  0eaee545eef [llvm] Migrate llvm::make_unique to std::make_unique
      adds  8460301d58e [Hexagon] Generate vector min/max for HVX
      adds  b2df99cd950 [BUNDLER]Improve the test, NFC.
      adds  1c013ca1f28 [LLVM][Alignment] Fix MSVC potential division by 0 warning  [...]
      adds  8d3a1523dd9 [Support] Base RWMutex on std::shared_timed_mutex (C++14)
      adds  4fb80d56db6 [Driver][Bundler] Improve bundling of object files.
      adds  e7fdf7cb71c Test commit #2.
      adds  bb99437f6d4 [sanitizer_common] Always use posix_spawn on Darwin
      adds  6eebd2bcd7b [X86] Improve cost model for subvector extraction of less t [...]
      adds  7a210d65edc Fix lld on GCC 5.1 after the C++14 move
      adds  213d8a9f138 [NewPM][PassInstrumentation] IR printing support for (Thin)LTO
      adds  626ed22fbe2 [CallGraph] Refine call graph for indirect calls with !call [...]
      adds  c476124bc89 [DebugInfo] Avoid crash from dropped fragments in LiveDebugValues
      adds  11d9e46f8e0 Revert "MemoryBuffer: Add a missing error-check to getOpenF [...]
      adds  1c3a5d78bd9 Fix the test, NFC.
      adds  2e62396c2f3 Link libpthread into LLVMCore.so
      adds  0890f0f3de7 Add LLVMLibC proposal to docs/index.rst.
      adds  2a372ba5340 [X86] Add custom type legalization for bitcasting mmx to v2 [...]
      adds  00782a4b68c [NFC] Added tests for 'select with ctlz to cttz' fold
      adds  2ed4573e8f8 Allow standards-based attributes to have leading and traili [...]
      adds  69ec60d821b Change test to use uint64_t to support compiling for 32-bit [...]
      adds  ce1750d9642 Rename this file from cx2.c to c2x.c; NFC.
      adds  3f2850bc606 [ValueTracking] Look through ptrmask intrinsics during getU [...]
      adds  d202899431e [NFC] Add a couple of dump routines for RegisterPressure he [...]
      adds  1f2b727298d MVT: Add v3i16/v3f16 vectors
      adds  ef4ad1a8b63 Revert [Bugpoint redesign] Added Pass to Remove Global Variables
      adds  8e987702b1e [Hexagon] Fix instruction selection for vselect v4i8
      adds  0c476111317 Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
      adds  82bfd1d2571 [WebAssembly] Correctly handle va_arg of zero-sized structures
      adds  ed399a69e2a [Sema] Implement DR2386 for C++17 structured binding
      adds  deb49a6217d Mark the test as unsupported on darwin, NFC.
      adds  c984dde170b Fix nm on GCC 5.1 after the C++14 move
      adds  d9ebe58be2f gn build: Merge r369018
      adds  1af501c0925 gn build: Merge r369039
      adds  be8a2f75657 [GWP-ASan] Implement stack frame compression.
      adds  9be6d7edb20 [Rewrite][NFC] Add FIXMEs and tests for RemoveLineIfEmpty bug
      adds  79ff20428e3 [MemorySSA] Remove restrictive asserts.
      adds  fdee340beab Remove CMake >= v3.13 target_link_options. Instead, use set [...]
      adds  7049b0ad4d6 Stop-hooks weren't getting called on step-out. Fix that.
      adds  10ce5f88d13 Add missing MIR serialization text for AArch64II::MO_TAGGED.
      adds  9106f8c87e8 [Utils][NFC] Copy bisect usage documents from commit msg in [...]
      adds  2fb4e754c64 Guard fuzzer build behind Clang-only flags.
      adds  563e25f3387 [Support] Re-introduce the RWMutexImpl for macOS < 10.12
      adds  5c38ca35346 [SDAG] Minor code cleanup/standardization of atomic accesso [...]
      adds  67af3fa7caa [AIX] For XL, pick GCC-compatible std & default warning options
      adds  f64dcdea6da Revert "[Support] Re-introduce the RWMutexImpl for macOS < 10.12"
      adds  c26892538e8 [Bugpoint redesign] Output option can now print to STDOUT
      adds  0ffe687eca0 [Bugpoint redesign] Added Pass to Remove Global Variables
      adds  75344955fcd Move isPointerOffset function to ValueTracking (NFC).
      adds  6a29ae4bde9 [clang-doc] Fix bitcode writer for access specifiers
      adds  6d6babf7457 [Support] Re-introduce the RWMutexImpl for macOS < 10.12
      adds  77dc05b945a [clang-doc] Fix use of source-root flag
      adds  27954c36443 [NewPM][PassInstrumentation] Fix test added in r369024.
      adds  4be5d53a332 Re-instate 369051.
      adds  b7bb9fb28f0 [clang-doc] Sort index elements case insensitive
      adds  9b9a3084521 [ARM][LowOverheadLoops] Fix generated code for "revert".
      adds  0ae6006bee0 [GlobalISel] CSEMIRBuilder: Add support for G_GEP
      adds  4660ea953e5 Moved binary off add_llvm_executable. Used add_executable i [...]
      adds  de0ce98abec [DebugLine] Don't try to guess the path style
      adds  78d1323b268 gn build: Merge r369061
      adds  76053297bd7 gn build: Merge r369064
      adds  ba3d595f93a [clang-doc] Serialize inherited attributes and methods
      adds  8c90c1d2d57 [clang-tidy] Migrate objc-forbidden-subclassing to use isDe [...]
      adds  02cbdbdabfc [PowerPC] add testcases for folding frame offset - NFC
      adds  a079a427085 [analyzer] Analysis: Silence checkers
      adds  effc28c1398 Disable stack_trace_compressor_fuzzer.
      adds  ee96499a423 Revert r368987, it caused PR43016.
      adds  a53cce943d1 [clang-tidy] Migrate objc-super-self to use isDerivedFrom 🚛
      adds  a33004aca70 Remove the temporary code. NFC.
      adds  5032c6ea080 [lldb-server] Disable a test on Windows until it can be fixed
      adds  120cffccf8c [X86] Manually reimplement getTargetInsertSubreg in X86DAGT [...]
      adds  75be1a9e582 [ValueTracking] Fix recurrence detection to check both PHI  [...]
      adds  b3c2f5d2ee6 [clangd] Remove Bind, use C++14 lambda captures instead. NFC
      adds  71ae2bf302c [clangd] Added highlighting for non type templates.
      adds  22970d66be7 AssumptionCache: remove old affected values after RAUW.
      adds  8b593480d33 [DebugInfo] Handle complex expressions with spills in LiveD [...]
      adds  1653ebee3f0 [RISCV] Add inline asm constraint A for RISC-V
      adds  59894d46685 [SLPVectorizer] Silence null dereference warning. NFCI.
      adds  7abf863f761 [RISCV] Lower inline asm constraint A for RISC-V
      adds  31a47f98909 Revert "[CallGraph] Refine call graph for indirect calls wi [...]
      adds  d3f774d33cd [RISCV] Allow parsing of bare symbols with offsets
      adds  e13e836480f [ASTImporter] Import ctor initializers after setting flags.
      adds  b9a8ac74f14 Fix typos in LibASTImporter.rst
      adds  12864001a65 [clangd] Simplify code of ClangdLSPServer::onCommand
      adds  8c2c5f5045b [ARM] Don't pretend we know how to generate MVE VLDn
      adds  6a75061e36f [X86] Add test case for future MULFIX DAG combine folds. NFC
      adds  9dddd26e31a [DAGCombiner] Add simple folds for SMULFIX/UMULFIX/SMULFIXSAT
      adds  403e85cbc56 Revert [CodeGen] Do the Simple Early Return in block-placem [...]
      adds  427762f03d7 [clangd] suppress -Wparentheses warning: suggest parenthese [...]
      adds  15fb2a73f9a [x86] add tests for fdiv with variable operands; NFC
      adds  5dcec7ce7ae [x86] fix fdiv test; NFC
      adds  6e1ac424742 [ARM] Correct register for narrowing and widening MVE loads [...]
      adds  6897f993144 [libcxxabi] __cxa_guard_require: test guard byte with != 0  [...]
      adds  9da4989c523 [X86] Remove unused include. NFCI.
      adds  3ccee5f7c40 [AArch64InstrInfo] Stop getInstSizeInBytes returning non-ze [...]
      adds  213edc34922 [X86][SSE] Add shuffled load tests from PR16739
      adds  4c78b788250 [lldb][NFC] Allow for-ranges on StringList
      adds  fa06e95898b [RISCV] Convert registers from unsigned to Register
      adds  1051f4f9bf8 Revert rL369112 : [X86][SSE] Add shuffled load tests from PR16739
      adds  429aa7c1e65 [X86][SSE] Add shuffled load tests from PR16739
      adds  16244fccfe6 [InstCombine] Shift amount reassociation in bittest: trunc- [...]
      adds  b782e61e471 [ARM] MVE sext of a load is free
      adds  5f865ecf06c [TextAPI] Update reader to be supported by lib/Object
      adds  05e9c2ac2e1 [InstCombine] Simplify pow(2.0, itofp(y)) to ldexp(1.0, y)
      adds  2d3ebeb8139 [lld][Hexagon]Support HEX_32 when building shared objects
      adds  f28e1128d9e Relanding r368987 [AArch64] Change location of frame-record [...]
No new revisions were added by this update.
Summary of changes:
 clang-tools-extra/clang-doc/BitcodeReader.cpp      |   43 +
 clang-tools-extra/clang-doc/BitcodeWriter.cpp      |   31 +
 clang-tools-extra/clang-doc/BitcodeWriter.h        |   11 +-
 clang-tools-extra/clang-doc/Representation.cpp     |   30 +-
 clang-tools-extra/clang-doc/Representation.h       |   47 +-
 clang-tools-extra/clang-doc/Serialize.cpp          |  144 +-
 clang-tools-extra/clang-doc/YAMLGenerator.cpp      |   42 +-
 clang-tools-extra/clang-doc/tool/ClangDocMain.cpp  |    8 +-
 clang-tools-extra/clang-tidy/ClangTidy.cpp         |   12 +-
 .../clang-tidy/objc/ForbiddenSubclassingCheck.cpp  |   29 +-
 .../clang-tidy/objc/SuperSelfCheck.cpp             |   47 +-
 clang-tools-extra/clangd/ClangdLSPServer.cpp       |   66 +-
 clang-tools-extra/clangd/Function.h                |   56 -
 clang-tools-extra/clangd/SemanticHighlighting.cpp  |    4 +
 .../clangd/unittests/SemanticHighlightingTests.cpp |   53 +
 clang-tools-extra/clangd/unittests/SyncAPI.cpp     |    8 +-
 .../test/clang-doc/single-file-public.cpp          |    1 +
 .../unittests/clang-doc/BitcodeTest.cpp            |    9 +-
 .../unittests/clang-doc/ClangDocTest.cpp           |   13 +
 .../unittests/clang-doc/ClangDocTest.h             |    1 +
 .../unittests/clang-doc/GeneratorTest.cpp          |   19 +
 .../unittests/clang-doc/HTMLGeneratorTest.cpp      |    6 +-
 .../unittests/clang-doc/MDGeneratorTest.cpp        |    6 +-
 .../unittests/clang-doc/MergeTest.cpp              |    4 +
 .../unittests/clang-doc/SerializeTest.cpp          |   89 +-
 .../unittests/clang-doc/YAMLGeneratorTest.cpp      |   29 +
 clang/docs/LibASTImporter.rst                      |    4 +-
 clang/include/clang/Basic/DiagnosticCommonKinds.td |    2 +-
 clang/include/clang/Rewrite/Core/Rewriter.h        |   11 +
 .../clang/StaticAnalyzer/Core/AnalyzerOptions.def  |   18 +-
 .../clang/StaticAnalyzer/Core/AnalyzerOptions.h    |   41 +-
 clang/lib/AST/ASTImporter.cpp                      |   34 +-
 clang/lib/Basic/Targets/RISCV.cpp                  |    4 +
 clang/lib/CodeGen/TargetInfo.cpp                   |    5 +-
 clang/lib/Frontend/CompilerInvocation.cpp          |   40 +-
 clang/lib/Rewrite/Rewriter.cpp                     |   11 +
 clang/lib/Sema/ParsedAttr.cpp                      |    3 +-
 clang/lib/Sema/SemaDeclCXX.cpp                     |   11 +-
 clang/lib/StaticAnalyzer/Core/AnalyzerOptions.cpp  |   19 -
 clang/lib/StaticAnalyzer/Core/BugReporter.cpp      |   26 +-
 .../StaticAnalyzer/Frontend/CheckerRegistry.cpp    |   22 +-
 clang/test/Analysis/Inputs/ctu-other.cpp           |   11 +
 .../Inputs/ctu-other.cpp.externalDefMap.txt        |    1 +
 clang/test/Analysis/analyzer-config.c              |    3 +-
 clang/test/Analysis/ctu-main.cpp                   |    4 +
 .../silence-checkers-and-packages-core-all.cpp     |   39 +
 ...ence-checkers-and-packages-core-div-by-zero.cpp |   18 +
 clang/test/CXX/dcl.decl/dcl.decomp/p3.cpp          |    2 +-
 clang/test/CXX/drs/dr23xx.cpp                      |   21 +
 clang/test/CodeGen/riscv-inline-asm.c              |    6 +
 clang/test/CodeGen/wasm-varargs.c                  |   76 +-
 clang/test/Driver/clang-offload-bundler.c          |  119 +-
 clang/test/Driver/clang-offload-bundler.c.o        |  Bin 1921 -> 0 bytes
 clang/test/Preprocessor/has_attribute.cpp          |    3 +
 clang/test/Preprocessor/has_c_attribute.c          |    4 +
 clang/test/Sema/{attr-cx2.c => attr-c2x.c}         |    3 +
 clang/test/SemaCXX/attr-cxx0x.cpp                  |    2 +-
 .../clang-offload-bundler/ClangOffloadBundler.cpp  |   37 +-
 clang/tools/scan-build/bin/scan-build              |   18 +-
 clang/unittests/Rewrite/RewriteBufferTest.cpp      |   73 +-
 .../StaticAnalyzer/RegisterCustomCheckersTest.cpp  |    2 +-
 clang/www/index.html                               |    1 +
 compiler-rt/lib/gwp_asan/CMakeLists.txt            |   21 +
 .../lib/gwp_asan/guarded_pool_allocator.cpp        |   44 +-
 compiler-rt/lib/gwp_asan/guarded_pool_allocator.h  |   22 +-
 .../lib/gwp_asan/stack_trace_compressor.cpp        |  111 ++
 compiler-rt/lib/gwp_asan/stack_trace_compressor.h  |   38 +
 .../lib/gwp_asan/stack_trace_compressor_fuzzer.cpp |   49 +
 compiler-rt/lib/gwp_asan/tests/compression.cpp     |  258 ++++
 .../sanitizer_symbolizer_libcdep.cpp               |    3 +-
 libcxxabi/src/cxa_guard_impl.h                     |    2 +-
 lld/ELF/Arch/Hexagon.cpp                           |    7 +
 lld/ELF/LinkerScript.cpp                           |   50 +-
 lld/test/ELF/hexagon-shared.s                      |   25 +-
 lldb/include/lldb/Target/Thread.h                  |   11 +
 lldb/include/lldb/Utility/CompletionRequest.h      |    4 +-
 lldb/include/lldb/Utility/StringList.h             |   12 +-
 .../stop-hooks}/Makefile                           |    0
 .../functionalities/stop-hooks/TestStopHooks.py    |   45 +
 .../test/functionalities/stop-hooks/main.c         |   14 +
 .../Python/lldbsuite/test/lang/c/bitfields/main.c  |    4 +-
 lldb/source/Breakpoint/WatchpointOptions.cpp       |    5 +-
 lldb/source/Commands/CommandObjectApropos.cpp      |    6 +-
 lldb/source/Commands/CommandObjectCommands.cpp     |    6 +-
 lldb/source/Commands/CommandObjectMultiword.cpp    |    4 +-
 lldb/source/Commands/CommandObjectType.cpp         |    8 +-
 .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp   |   29 +-
 lldb/source/Target/StopInfo.cpp                    |    8 +-
 lldb/source/Target/Thread.cpp                      |    5 +
 lldb/source/Utility/Args.cpp                       |    4 +-
 lldb/source/Utility/StringList.cpp                 |    5 +-
 lldb/unittests/Editline/EditlineTest.cpp           |    8 +-
 lldb/unittests/Utility/StringListTest.cpp          |   18 +
 .../unittests/tools/lldb-server/tests/LLGSTest.cpp |    4 +
 llvm/cmake/modules/HandleLLVMOptions.cmake         |   49 +-
 llvm/docs/index.rst                                |    4 +
 llvm/include/llvm/Analysis/AssumptionCache.h       |    4 +-
 llvm/include/llvm/Analysis/ValueTracking.h         |    6 +
 llvm/include/llvm/CodeGen/RegisterPressure.h       |    3 +
 llvm/include/llvm/CodeGen/SelectionDAGNodes.h      |    8 +
 llvm/include/llvm/CodeGen/ValueTypes.td            |  214 +--
 .../llvm/DebugInfo/DWARF/DWARFDataExtractor.h      |   13 -
 llvm/include/llvm/DebugInfo/DWARF/DWARFDebugLine.h |    9 +-
 llvm/include/llvm/IR/InlineAsm.h                   |    1 +
 llvm/include/llvm/IR/PatternMatch.h                |    6 +
 llvm/include/llvm/Support/MachineValueType.h       |  218 +--
 llvm/include/llvm/Support/RWMutex.h                |  321 +++--
 llvm/include/llvm/TextAPI/MachO/TextAPIReader.h    |    5 +-
 llvm/lib/Analysis/AssumptionCache.cpp              |    5 +-
 llvm/lib/Analysis/BasicAliasAnalysis.cpp           |    2 +-
 llvm/lib/Analysis/MemorySSA.cpp                    |    5 +-
 llvm/lib/Analysis/ValueTracking.cpp                |   91 +-
 llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp      |   14 +-
 llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp         |    2 +-
 .../AsmPrinter/DbgEntityHistoryCalculator.cpp      |    6 +-
 llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp         |    4 +-
 llvm/lib/CodeGen/BranchFolding.cpp                 |   12 +-
 llvm/lib/CodeGen/BreakFalseDeps.cpp                |    4 +-
 llvm/lib/CodeGen/CalcSpillWeights.cpp              |    2 +-
 llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp        |    8 +-
 llvm/lib/CodeGen/DeadMachineInstructionElim.cpp    |    6 +-
 llvm/lib/CodeGen/DetectDeadLanes.cpp               |   18 +-
 llvm/lib/CodeGen/EarlyIfConversion.cpp             |    8 +-
 llvm/lib/CodeGen/ExpandPostRAPseudos.cpp           |    6 +-
 llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp            |    3 +-
 llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp     |   14 +-
 llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp       |   21 +-
 llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp  |    4 +-
 llvm/lib/CodeGen/GlobalISel/Localizer.cpp          |    8 +-
 llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp   |    6 +-
 llvm/lib/CodeGen/GlobalISel/Utils.cpp              |   10 +-
 llvm/lib/CodeGen/IfConversion.cpp                  |    4 +-
 llvm/lib/CodeGen/ImplicitNullChecks.cpp            |    8 +-
 llvm/lib/CodeGen/InlineSpiller.cpp                 |    4 +-
 llvm/lib/CodeGen/LiveDebugValues.cpp               |   49 +-
 llvm/lib/CodeGen/LiveDebugVariables.cpp            |    8 +-
 llvm/lib/CodeGen/LiveIntervals.cpp                 |    4 +-
 llvm/lib/CodeGen/LivePhysRegs.cpp                  |   10 +-
 llvm/lib/CodeGen/LiveRangeEdit.cpp                 |    6 +-
 llvm/lib/CodeGen/LiveRangeShrink.cpp               |    2 +-
 llvm/lib/CodeGen/LiveRegMatrix.cpp                 |    2 +-
 llvm/lib/CodeGen/LiveRegUnits.cpp                  |    6 +-
 llvm/lib/CodeGen/LiveVariables.cpp                 |    6 +-
 llvm/lib/CodeGen/MIRCanonicalizerPass.cpp          |    8 +-
 llvm/lib/CodeGen/MachineBasicBlock.cpp             |   10 +-
 llvm/lib/CodeGen/MachineBlockPlacement.cpp         |   37 -
 llvm/lib/CodeGen/MachineCSE.cpp                    |   18 +-
 llvm/lib/CodeGen/MachineCopyPropagation.cpp        |   34 +-
 llvm/lib/CodeGen/MachineInstrBundle.cpp            |    6 +-
 llvm/lib/CodeGen/MachineLICM.cpp                   |   34 +-
 llvm/lib/CodeGen/MachineOperand.cpp                |    2 +-
 llvm/lib/CodeGen/MachinePipeliner.cpp              |   38 +-
 llvm/lib/CodeGen/MachineSSAUpdater.cpp             |    4 +-
 llvm/lib/CodeGen/MachineScheduler.cpp              |    6 +-
 llvm/lib/CodeGen/MachineSink.cpp                   |   18 +-
 llvm/lib/CodeGen/MachineTraceMetrics.cpp           |   10 +-
 llvm/lib/CodeGen/MachineVerifier.cpp               |    4 +-
 llvm/lib/CodeGen/OptimizePHIs.cpp                  |    8 +-
 llvm/lib/CodeGen/PHIElimination.cpp                |    8 +-
 llvm/lib/CodeGen/PeepholeOptimizer.cpp             |   26 +-
 llvm/lib/CodeGen/ProcessImplicitDefs.cpp           |    4 +-
 llvm/lib/CodeGen/RegAllocFast.cpp                  |   30 +-
 llvm/lib/CodeGen/RegAllocGreedy.cpp                |    4 +-
 llvm/lib/CodeGen/RegisterCoalescer.cpp             |   12 +-
 llvm/lib/CodeGen/RegisterPressure.cpp              |   20 +-
 llvm/lib/CodeGen/RegisterScavenging.cpp            |    8 +-
 llvm/lib/CodeGen/RenameIndependentSubregs.cpp      |    2 +-
 llvm/lib/CodeGen/ScheduleDAGInstrs.cpp             |   18 +-
 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp      |   27 +
 llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp     |   12 +-
 .../CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp    |    2 +-
 .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp   |    7 +-
 llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp   |    2 +-
 llvm/lib/CodeGen/ShrinkWrap.cpp                    |    2 +-
 llvm/lib/CodeGen/SplitKit.cpp                      |    4 +-
 llvm/lib/CodeGen/StackMaps.cpp                     |    4 +-
 llvm/lib/CodeGen/TailDuplicator.cpp                |   20 +-
 llvm/lib/CodeGen/TargetInstrInfo.cpp               |   20 +-
 llvm/lib/CodeGen/TargetLoweringBase.cpp            |    3 +-
 llvm/lib/CodeGen/TargetSchedule.cpp                |    2 +-
 llvm/lib/CodeGen/TwoAddressInstructionPass.cpp     |   42 +-
 llvm/lib/CodeGen/UnreachableBlockElim.cpp          |    4 +-
 llvm/lib/CodeGen/ValueTypes.cpp                    |    4 +
 llvm/lib/DebugInfo/DWARF/DWARFDataExtractor.cpp    |   30 -
 llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp        |   30 +-
 llvm/lib/IR/CMakeLists.txt                         |    2 +
 llvm/lib/LTO/LTOBackend.cpp                        |    6 +-
 llvm/lib/Support/MemoryBuffer.cpp                  |    4 +-
 llvm/lib/Support/RWMutex.cpp                       |   58 +-
 llvm/lib/Support/Unix/RWMutex.inc                  |   50 -
 llvm/lib/Support/Windows/RWMutex.inc               |  128 --
 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp   |    2 +-
 llvm/lib/Target/AArch64/AArch64InstrInfo.cpp       |   19 +-
 .../Target/AArch64/AArch64InstructionSelector.cpp  |    4 +-
 llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp        |    2 +-
 llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp      |    5 +
 .../Target/AMDGPU/AMDGPUInstructionSelector.cpp    |   40 +-
 .../Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp |   26 +-
 llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp  |   10 +-
 llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp    |    8 +-
 llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp     |   20 +-
 llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp          |    6 +-
 llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp      |    6 +-
 llvm/lib/Target/AMDGPU/GCNRegPressure.cpp          |    2 +-
 .../lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp |    4 +-
 llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp |   22 +-
 llvm/lib/Target/AMDGPU/R600ISelLowering.cpp        |    2 +-
 llvm/lib/Target/AMDGPU/R600InstrInfo.cpp           |   12 +-
 llvm/lib/Target/AMDGPU/R600MachineScheduler.cpp    |    4 +-
 .../Target/AMDGPU/R600OptimizeVectorRegisters.cpp  |   10 +-
 llvm/lib/Target/AMDGPU/R600Packetizer.cpp          |    4 +-
 llvm/lib/Target/AMDGPU/SIAddIMGInit.cpp            |    4 +-
 llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp         |   24 +-
 llvm/lib/Target/AMDGPU/SIFoldOperands.cpp          |   12 +-
 llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp     |    6 +-
 llvm/lib/Target/AMDGPU/SIFrameLowering.cpp         |   28 +-
 llvm/lib/Target/AMDGPU/SIISelLowering.cpp          |   64 +-
 llvm/lib/Target/AMDGPU/SIInstrInfo.cpp             |  234 ++--
 llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp    |   28 +-
 llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp      |    6 +-
 llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp         |   12 +-
 llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp       |    4 +-
 llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp   |    2 +-
 .../Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp   |    8 +-
 llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp          |    2 +-
 llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp    |    8 +-
 llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp          |   35 +-
 llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp    |   12 +-
 llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp         |   12 +-
 llvm/lib/Target/ARC/ARCISelLowering.cpp            |    2 +-
 llvm/lib/Target/ARC/ARCOptAddrMode.cpp             |   10 +-
 llvm/lib/Target/ARC/ARCRegisterInfo.cpp            |    2 +-
 llvm/lib/Target/ARM/A15SDOptimizer.cpp             |   32 +-
 llvm/lib/Target/ARM/ARMAsmPrinter.cpp              |   50 +-
 llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp           |   84 +-
 llvm/lib/Target/ARM/ARMBaseInstrInfo.h             |    3 +-
 llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp        |   27 +-
 llvm/lib/Target/ARM/ARMCallLowering.cpp            |    2 +-
 llvm/lib/Target/ARM/ARMConstantIslandPass.cpp      |   14 +-
 llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp       |   58 +-
 llvm/lib/Target/ARM/ARMFastISel.cpp                |   16 +-
 llvm/lib/Target/ARM/ARMFrameLowering.cpp           |    6 +-
 llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp            |    4 +-
 llvm/lib/Target/ARM/ARMISelLowering.cpp            |  120 +-
 llvm/lib/Target/ARM/ARMISelLowering.h              |    2 +-
 llvm/lib/Target/ARM/ARMInstrInfo.cpp               |    2 +-
 llvm/lib/Target/ARM/ARMInstructionSelector.cpp     |   32 +-
 llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp      |   32 +-
 llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp        |    6 +-
 llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp     |   15 +
 llvm/lib/Target/ARM/MLxExpansionPass.cpp           |   22 +-
 llvm/lib/Target/ARM/Thumb1FrameLowering.cpp        |    8 +-
 llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp          |    6 +-
 llvm/lib/Target/ARM/Thumb2InstrInfo.cpp            |   27 +-
 llvm/lib/Target/ARM/Thumb2SizeReduction.cpp        |   28 +-
 llvm/lib/Target/ARM/ThumbRegisterInfo.cpp          |    4 +-
 llvm/lib/Target/AVR/AVRAsmPrinter.cpp              |    2 +-
 llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp       |   10 +-
 llvm/lib/Target/AVR/AVRFrameLowering.cpp           |    2 +-
 llvm/lib/Target/AVR/AVRISelLowering.cpp            |   12 +-
 llvm/lib/Target/AVR/AVRRegisterInfo.cpp            |    2 +-
 llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp            |    2 +-
 llvm/lib/Target/BPF/BPFISelLowering.cpp            |   15 +-
 llvm/lib/Target/BPF/BPFInstrInfo.cpp               |    6 +-
 llvm/lib/Target/BPF/BPFMIPeephole.cpp              |   14 +-
 llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp     |    4 +-
 llvm/lib/Target/BPF/BPFRegisterInfo.cpp            |    6 +-
 llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp      |    2 +-
 llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp     |   38 +-
 llvm/lib/Target/Hexagon/HexagonBitTracker.cpp      |    2 +-
 llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp  |    2 +-
 .../lib/Target/Hexagon/HexagonConstPropagation.cpp |   10 +-
 llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp   |   30 +-
 llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp     |   18 +-
 llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp  |    8 +-
 llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp   |   50 +-
 llvm/lib/Target/Hexagon/HexagonGenInsert.cpp       |   10 +-
 llvm/lib/Target/Hexagon/HexagonGenMux.cpp          |    6 +-
 llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp    |    4 +-
 llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp   |   52 +-
 llvm/lib/Target/Hexagon/HexagonISelLowering.cpp    |   37 +-
 llvm/lib/Target/Hexagon/HexagonISelLowering.h      |    7 +-
 llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp |   24 +
 llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp       |  104 +-
 llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp    |    6 +-
 llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp     |   10 +-
 llvm/lib/Target/Hexagon/HexagonPatterns.td         |    8 -
 llvm/lib/Target/Hexagon/HexagonPatternsHVX.td      |   25 +
 llvm/lib/Target/Hexagon/HexagonPeephole.cpp        |   24 +-
 llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp    |    6 +-
 .../Hexagon/HexagonSplitConst32AndConst64.cpp      |    8 +-
 llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp     |   40 +-
 llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp   |    2 +-
 llvm/lib/Target/Hexagon/HexagonSubtarget.cpp       |    2 +-
 llvm/lib/Target/Hexagon/HexagonVExtract.cpp        |   12 +-
 llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp  |   12 +-
 llvm/lib/Target/Hexagon/RDFGraph.cpp               |    8 +-
 llvm/lib/Target/Hexagon/RDFLiveness.cpp            |    4 +-
 llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp          |    2 +-
 llvm/lib/Target/Lanai/LanaiFrameLowering.cpp       |    4 +-
 llvm/lib/Target/Lanai/LanaiISelLowering.cpp        |    2 +-
 llvm/lib/Target/Lanai/LanaiInstrInfo.cpp           |    2 +-
 llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp        |    2 +-
 llvm/lib/Target/MSP430/MSP430ISelLowering.cpp      |   20 +-
 llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp      |    2 +-
 llvm/lib/Target/Mips/MicroMipsSizeReduction.cpp    |   18 +-
 llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp        |    2 +-
 llvm/lib/Target/Mips/Mips16ISelLowering.cpp        |   16 +-
 llvm/lib/Target/Mips/MipsAsmPrinter.cpp            |    6 +-
 llvm/lib/Target/Mips/MipsExpandPseudo.cpp          |   54 +-
 llvm/lib/Target/Mips/MipsFastISel.cpp              |    2 +-
 llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp          |    2 +-
 llvm/lib/Target/Mips/MipsISelLowering.cpp          |  106 +-
 llvm/lib/Target/Mips/MipsInstructionSelector.cpp   |    4 +-
 llvm/lib/Target/Mips/MipsOptimizePICCall.cpp       |    2 +-
 llvm/lib/Target/Mips/MipsSEFrameLowering.cpp       |   48 +-
 llvm/lib/Target/Mips/MipsSEISelLowering.cpp        |  116 +-
 llvm/lib/Target/Mips/MipsSEInstrInfo.cpp           |   20 +-
 llvm/lib/Target/Mips/MipsSERegisterInfo.cpp        |    2 +-
 llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp          |    2 +-
 llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp          |    6 +-
 llvm/lib/Target/PowerPC/PPCBranchSelector.cpp      |    6 +-
 llvm/lib/Target/PowerPC/PPCFastISel.cpp            |   14 +-
 llvm/lib/Target/PowerPC/PPCFrameLowering.cpp       |   10 +-
 llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp        |    6 +-
 llvm/lib/Target/PowerPC/PPCISelLowering.cpp        |   84 +-
 llvm/lib/Target/PowerPC/PPCInstrInfo.cpp           |   54 +-
 llvm/lib/Target/PowerPC/PPCMIPeephole.cpp          |   40 +-
 llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp     |    4 +-
 llvm/lib/Target/PowerPC/PPCQPXLoadSplat.cpp        |    6 +-
 llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp    |    2 +-
 llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp        |   32 +-
 llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp      |    4 +-
 llvm/lib/Target/PowerPC/PPCVSXCopy.cpp             |    4 +-
 llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp        |   12 +-
 llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp      |   26 +-
 llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp |   83 +-
 .../RISCV/Disassembler/RISCVDisassembler.cpp       |   19 +-
 .../RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp      |    3 +-
 .../RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp       |    3 +-
 llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp   |   10 +-
 llvm/lib/Target/RISCV/RISCVFrameLowering.cpp       |   24 +-
 llvm/lib/Target/RISCV/RISCVFrameLowering.h         |    2 +-
 llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp        |    3 +
 llvm/lib/Target/RISCV/RISCVISelLowering.cpp        |   41 +-
 llvm/lib/Target/RISCV/RISCVISelLowering.h          |    3 +
 llvm/lib/Target/RISCV/RISCVInstrInfo.cpp           |    2 +-
 llvm/lib/Target/RISCV/RISCVInstrInfo.h             |    2 +-
 llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp     |    6 +-
 llvm/lib/Target/Sparc/DelaySlotFiller.cpp          |   10 +-
 llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp        |    4 +-
 llvm/lib/Target/Sparc/SparcISelLowering.cpp        |    6 +-
 llvm/lib/Target/Sparc/SparcInstrInfo.cpp           |    4 +-
 llvm/lib/Target/Sparc/SparcRegisterInfo.cpp        |   12 +-
 llvm/lib/Target/SystemZ/SystemZElimCompare.cpp     |    2 +-
 llvm/lib/Target/SystemZ/SystemZExpandPseudo.cpp    |    4 +-
 llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp   |    2 +-
 llvm/lib/Target/SystemZ/SystemZISelLowering.cpp    |   78 +-
 llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp       |   30 +-
 llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp     |    2 +-
 llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp    |   14 +-
 llvm/lib/Target/SystemZ/SystemZShortenInst.cpp     |    4 +-
 llvm/lib/Target/X86/X86AsmPrinter.cpp              |    4 +-
 .../Target/X86/X86AvoidStoreForwardingBlocks.cpp   |    2 +-
 llvm/lib/Target/X86/X86CallFrameOptimization.cpp   |   10 +-
 llvm/lib/Target/X86/X86CallLowering.cpp            |    2 +-
 llvm/lib/Target/X86/X86CmovConversion.cpp          |   14 +-
 llvm/lib/Target/X86/X86DomainReassignment.cpp      |    8 +-
 llvm/lib/Target/X86/X86EvexToVex.cpp               |    2 +-
 llvm/lib/Target/X86/X86ExpandPseudo.cpp            |    4 +-
 llvm/lib/Target/X86/X86FastISel.cpp                |    4 +-
 llvm/lib/Target/X86/X86FixupBWInsts.cpp            |    2 +-
 llvm/lib/Target/X86/X86FixupLEAs.cpp               |   16 +-
 llvm/lib/Target/X86/X86FixupSetCC.cpp              |    4 +-
 llvm/lib/Target/X86/X86FlagsCopyLowering.cpp       |    8 +-
 llvm/lib/Target/X86/X86FloatingPoint.cpp           |    6 +-
 llvm/lib/Target/X86/X86FrameLowering.cpp           |   16 +-
 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp            |    8 +-
 llvm/lib/Target/X86/X86ISelLowering.cpp            |  124 +-
 llvm/lib/Target/X86/X86ISelLowering.h              |    5 +-
 llvm/lib/Target/X86/X86InsertPrefetch.cpp          |    4 +-
 llvm/lib/Target/X86/X86InstrInfo.cpp               |   69 +-
 llvm/lib/Target/X86/X86InstrMMX.td                 |    7 +
 llvm/lib/Target/X86/X86InstructionSelector.cpp     |   96 +-
 llvm/lib/Target/X86/X86MCInstLower.cpp             |   18 +-
 llvm/lib/Target/X86/X86OptimizeLEAs.cpp            |    4 +-
 llvm/lib/Target/X86/X86RegisterInfo.cpp            |    8 +-
 llvm/lib/Target/X86/X86SelectionDAGInfo.cpp        |    2 +-
 .../lib/Target/X86/X86SpeculativeLoadHardening.cpp |   48 +-
 llvm/lib/Target/X86/X86TargetTransformInfo.cpp     |   33 +
 llvm/lib/Target/X86/X86WinAllocaExpander.cpp       |    4 +-
 llvm/lib/Target/XCore/XCoreFrameLowering.cpp       |    4 +-
 .../Target/XCore/XCoreFrameToArgsOffsetElim.cpp    |    2 +-
 llvm/lib/Target/XCore/XCoreISelLowering.cpp        |    4 +-
 llvm/lib/Target/XCore/XCoreRegisterInfo.cpp        |    2 +-
 llvm/lib/TextAPI/MachO/TextStub.cpp                |    8 +-
 .../Transforms/InstCombine/InstCombineCompares.cpp |   75 +-
 llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp     |   88 +-
 llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp     |   54 +-
 llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp    |    1 +
 llvm/test/Analysis/BasicAA/ptrmask.ll              |   29 +
 llvm/test/Analysis/CostModel/ARM/cast.ll           |   12 +-
 .../CostModel/X86/shuffle-extract_subvector.ll     | 1468 ++++++++++++--------
 .../AArch64/GlobalISel/arm64-irtranslator-gep.ll   |   51 +
 .../CodeGen/AArch64/branch-relax-block-size.mir    |   80 ++
 .../CodeGen/ARM/GlobalISel/arm-irtranslator.ll     |    4 +-
 .../ARM/GlobalISel/arm-legalize-load-store.mir     |   16 +-
 llvm/test/CodeGen/Hexagon/autohvx/minmax-128b.ll   |  344 +++++
 llvm/test/CodeGen/Hexagon/autohvx/minmax-64b.ll    |  344 +++++
 .../CodeGen/Hexagon/autohvx/vector-compare-128b.ll |  180 +--
 .../CodeGen/Hexagon/autohvx/vector-compare-64b.ll  |  180 +--
 llvm/test/CodeGen/Hexagon/isel-vselect-v4i8.ll     |    9 +
 llvm/test/CodeGen/PowerPC/block-placement.mir      |   12 +-
 .../CodeGen/PowerPC/fold-frame-offset-using-rr.mir |  114 ++
 llvm/test/CodeGen/RISCV/inline-asm.ll              |   25 +
 .../LowOverheadLoops/end-positive-offset.mir       |    2 +-
 .../Thumb2/LowOverheadLoops/revert-non-loop.mir    |    2 +-
 .../Thumb2/LowOverheadLoops/revert-while.mir       |    4 +-
 llvm/test/CodeGen/Thumb2/mve-stack.ll              |  281 ++++
 llvm/test/CodeGen/X86/3dnow-intrinsics.ll          |   24 +-
 llvm/test/CodeGen/X86/load-partial.ll              |  162 +++
 llvm/test/CodeGen/X86/mmx-arg-passing-x86-64.ll    |    9 +-
 llvm/test/CodeGen/X86/mmx-arith.ll                 |  126 +-
 llvm/test/CodeGen/X86/mmx-cvt.ll                   |   16 +-
 llvm/test/CodeGen/X86/mulfix_combine.ll            |  118 ++
 llvm/test/CodeGen/X86/pr42992.ll                   |   17 +
 llvm/test/CodeGen/X86/promote-vec3.ll              |  116 +-
 llvm/test/CodeGen/X86/recip-fastmath.ll            |  192 +++
 llvm/test/CodeGen/X86/vec_cast.ll                  |   46 +-
 llvm/test/CodeGen/X86/vec_extract-mmx.ll           |   16 +-
 llvm/test/CodeGen/X86/vec_insert-7.ll              |    5 +-
 llvm/test/CodeGen/X86/vector-mulfix-legalize.ll    |  110 +-
 llvm/test/CodeGen/X86/widen_load-2.ll              |   20 +-
 .../MIR/X86/live-debug-values-restore.mir          |  258 +++-
 llvm/test/MC/RISCV/rvi-pseudos.s                   |  129 +-
 llvm/test/Reduce/remove-funcs.ll                   |    5 +-
 llvm/test/Reduce/remove-global-vars.ll             |    3 +-
 llvm/test/TableGen/intrinsic-varargs.td            |    2 +-
 llvm/test/ThinLTO/X86/printer.ll                   |   12 +
 .../InstCombine/phi-known-bits-operand-order.ll    |    4 +-
 llvm/test/Transforms/InstCombine/pow_fp_int.ll     |   63 +
 .../Transforms/InstCombine/select-ctlz-to-cttz.ll  |  249 ++++
 ...reassociation-in-bittest-with-truncation-shl.ll |   80 +-
 .../LoopVectorize/ARM/mve-interleaved-cost.ll      |  416 ++++++
 llvm/tools/llvm-nm/llvm-nm.cpp                     |   16 +-
 llvm/tools/llvm-reduce/TestRunner.cpp              |    2 +-
 llvm/tools/llvm-reduce/deltas/Delta.cpp            |   48 +-
 llvm/tools/llvm-reduce/deltas/Delta.h              |    6 +-
 llvm/tools/llvm-reduce/deltas/ReduceFunctions.cpp  |   12 +-
 llvm/tools/llvm-reduce/deltas/ReduceGlobalVars.cpp |    1 +
 llvm/tools/llvm-reduce/llvm-reduce.cpp             |   25 +-
 llvm/unittests/Support/AlignmentTest.cpp           |   10 +
 llvm/unittests/Support/MemoryBufferTest.cpp        |   51 -
 llvm/unittests/TextAPI/TextStubV1Tests.cpp         |   72 +-
 llvm/unittests/TextAPI/TextStubV2Tests.cpp         |   72 +-
 llvm/unittests/TextAPI/TextStubV3Tests.cpp         |   69 +-
 llvm/utils/TableGen/CodeGenTarget.cpp              |    2 +
 llvm/utils/TableGen/IntrinsicEmitter.cpp           |    4 +-
 llvm/utils/bisect                                  |   14 +-
 llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn  |    2 +-
 .../gn/secondary/llvm/tools/llvm-reduce/BUILD.gn   |    2 +-
 461 files changed, 9116 insertions(+), 4896 deletions(-)
 create mode 100644 clang/test/Analysis/silence-checkers-and-packages-core-all.cpp
 create mode 100644 clang/test/Analysis/silence-checkers-and-packages-core-div-by-zero.cpp
 delete mode 100644 clang/test/Driver/clang-offload-bundler.c.o
 rename clang/test/Sema/{attr-cx2.c => attr-c2x.c} (91%)
 create mode 100644 compiler-rt/lib/gwp_asan/stack_trace_compressor.cpp
 create mode 100644 compiler-rt/lib/gwp_asan/stack_trace_compressor.h
 create mode 100644 compiler-rt/lib/gwp_asan/stack_trace_compressor_fuzzer.cpp
 create mode 100644 compiler-rt/lib/gwp_asan/tests/compression.cpp
 copy lldb/packages/Python/lldbsuite/test/{expression_command/dont_allow_jit => fun [...]
 create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/stop-hooks/ [...]
 create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/stop-hooks/main.c
 delete mode 100644 llvm/lib/Support/Unix/RWMutex.inc
 delete mode 100644 llvm/lib/Support/Windows/RWMutex.inc
 create mode 100644 llvm/test/Analysis/BasicAA/ptrmask.ll
 create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-gep.ll
 create mode 100644 llvm/test/CodeGen/AArch64/branch-relax-block-size.mir
 create mode 100644 llvm/test/CodeGen/Hexagon/autohvx/minmax-128b.ll
 create mode 100644 llvm/test/CodeGen/Hexagon/autohvx/minmax-64b.ll
 create mode 100644 llvm/test/CodeGen/Hexagon/isel-vselect-v4i8.ll
 create mode 100644 llvm/test/CodeGen/PowerPC/fold-frame-offset-using-rr.mir
 create mode 100644 llvm/test/CodeGen/Thumb2/mve-stack.ll
 create mode 100644 llvm/test/CodeGen/X86/mulfix_combine.ll
 create mode 100644 llvm/test/CodeGen/X86/pr42992.ll
 create mode 100644 llvm/test/ThinLTO/X86/printer.ll
 create mode 100644 llvm/test/Transforms/InstCombine/select-ctlz-to-cttz.ll
 create mode 100644 llvm/test/Transforms/LoopVectorize/ARM/mve-interleaved-cost.ll
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[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig updated (0eaee545eef -> f28e1128d9e)