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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig in repository toolchain/ci/llvm-project.

from bbcf1c3496c [ARM] Improve codegen of volatile load/store of i64 adds c5c935ab662 Make more use of MachineInstr::mayLoadOrStore. adds d005df4c165 [llvm-exegesis] Fix pfm counter names for Haswell for older [...] adds dde7b6bcda9 Re-land "Add an -fno-temp-file flag for compilation" adds d38153325f3 [Instcombine] Add select canonicalization tests. NFC adds a59cc5e128f [InstCombine] Canonicalize select immediates adds abc7f6800df [Dsymutil][Debuginfo][NFC] Refactor dsymutil to separate DW [...] adds b94aeabfae1 [gn build] Port abc7f6800df adds 60cb33c9b85 [DebugInfo] Fix verbose printing of rows added via DW_LNE_e [...] adds 23c28c40436 [AArch64][SVE] Add permutation and selection intrinsics adds 89e3bb45026 [ConstantHoisting] Ignore unreachable bb:s when collecting [...] adds 5889e7823de [InstCombine] add/adjust tests for pow->sqrt; NFC adds dcb48f50bdf Revert "[AArch64][SVE] Add permutation and selection intrinsics" adds d3aeac8e20f [PowerPC] Only use PLT annotations if using PIC relocation model adds 86acaa9457d [DDG] Data Dependence Graph - Ordinals adds ba430f50324 [cmake] Add dependency on llvm-dwarfdump to llvm-locstats adds a116f28a0d7 [RISCV] Enable the machine outliner for RISC-V adds 2520bef8653 [Clang FE, SystemZ] Recognize -mrecord-mcount CL option.

No new revisions were added by this update.

Summary of changes: clang/include/clang/Basic/CodeGenOptions.def | 1 + clang/include/clang/Driver/Options.td | 5 + clang/include/clang/Frontend/FrontendOptions.h | 5 +- clang/lib/CodeGen/CodeGenFunction.cpp | 11 + clang/lib/Driver/ToolChains/Clang.cpp | 4 + clang/lib/Frontend/CompilerInstance.cpp | 2 +- clang/lib/Frontend/CompilerInvocation.cpp | 2 + clang/lib/Frontend/FrontendActions.cpp | 2 +- clang/test/CodeGen/mrecord-mcount.c | 26 +++ clang/test/Driver/clang_f_opts.c | 3 + .../include/llvm/Analysis/DependenceGraphBuilder.h | 33 +++ llvm/include/llvm/CodeGen/TargetInstrInfo.h | 4 +- .../llvm/DebugInfo/DWARF/DWARFOptCompileUnit.h} | 13 +- .../llvm/DebugInfo/DWARF/DWARFOptDeclContext.h} | 12 +- llvm/include/llvm/DebugInfo/DWARF/DWARFOptimizer.h | 86 +++++++ llvm/lib/Analysis/DependenceGraphBuilder.cpp | 21 ++ llvm/lib/CodeGen/BranchFolding.cpp | 4 +- llvm/lib/CodeGen/ImplicitNullChecks.cpp | 2 +- llvm/lib/CodeGen/StackColoring.cpp | 2 +- llvm/lib/DebugInfo/DWARF/CMakeLists.txt | 3 + llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp | 2 +- .../DebugInfo/DWARF/DWARFOptCompileUnit.cpp} | 8 +- .../DebugInfo/DWARF/DWARFOptDeclContext.cpp} | 7 +- llvm/lib/DebugInfo/DWARF/DWARFOptimizer.cpp | 15 ++ llvm/lib/DebugInfo/DWARF/LLVMBuild.txt | 2 +- llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 4 +- llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 2 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 4 +- llvm/lib/Target/ARC/ARCOptAddrMode.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp | 6 +- llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp | 2 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 8 +- llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 158 +++++++++++++ llvm/lib/Target/RISCV/RISCVInstrInfo.h | 29 +++ llvm/lib/Target/RISCV/RISCVTargetMachine.cpp | 3 + llvm/lib/Target/X86/X86PfmCounters.td | 16 +- .../InstCombine/InstCombineSimplifyDemanded.cpp | 32 ++- llvm/lib/Transforms/Scalar/ConstantHoisting.cpp | 6 +- llvm/test/Analysis/DDG/basic-a.ll | 96 ++++---- llvm/test/Analysis/DDG/basic-b.ll | 109 ++++----- llvm/test/Analysis/DDG/basic-loopnest.ll | 248 ++++++++++----------- llvm/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll | 14 +- llvm/test/CodeGen/PowerPC/2010-02-12-saveCR.ll | 2 +- llvm/test/CodeGen/PowerPC/available-externally.ll | 3 +- llvm/test/CodeGen/PowerPC/srem-lkk.ll | 2 +- llvm/test/CodeGen/PowerPC/stubs.ll | 2 +- .../PowerPC/umulo-128-legalisation-lowering.ll | 2 +- llvm/test/CodeGen/PowerPC/urem-lkk.ll | 2 +- llvm/test/CodeGen/RISCV/machineoutliner.mir | 132 +++++++++++ .../AArch64/consthoist-unreachable.ll | 64 ++++++ .../X86/pr43903-not-all-uses-rebased.ll | 51 +++++ llvm/test/Transforms/InstCombine/pow-sqrt.ll | 112 +++++++--- .../Transforms/InstCombine/select-imm-canon.ll | 70 ++++++ .../X86/debug-line-dw-lne-end-sequence.s | 56 +++++ llvm/tools/dsymutil/CMakeLists.txt | 2 - llvm/tools/dsymutil/DwarfLinker.cpp | 52 ++--- llvm/tools/dsymutil/DwarfLinker.h | 99 +++++--- llvm/tools/dsymutil/DwarfStreamer.cpp | 2 +- llvm/tools/dsymutil/DwarfStreamer.h | 2 +- .../gn/secondary/llvm/lib/DebugInfo/DWARF/BUILD.gn | 3 + .../gn/secondary/llvm/tools/dsymutil/BUILD.gn | 2 - llvm/utils/llvm-locstats/CMakeLists.txt | 4 + 66 files changed, 1275 insertions(+), 411 deletions(-) create mode 100644 clang/test/CodeGen/mrecord-mcount.c rename llvm/{tools/dsymutil/CompileUnit.h => include/llvm/DebugInfo/DWARF/DWARFOpt [...] rename llvm/{tools/dsymutil/DeclContext.h => include/llvm/DebugInfo/DWARF/DWARFOpt [...] create mode 100644 llvm/include/llvm/DebugInfo/DWARF/DWARFOptimizer.h rename llvm/{tools/dsymutil/CompileUnit.cpp => lib/DebugInfo/DWARF/DWARFOptCompile [...] rename llvm/{tools/dsymutil/DeclContext.cpp => lib/DebugInfo/DWARF/DWARFOptDeclCon [...] create mode 100644 llvm/lib/DebugInfo/DWARF/DWARFOptimizer.cpp create mode 100644 llvm/test/CodeGen/RISCV/machineoutliner.mir create mode 100755 llvm/test/Transforms/ConstantHoisting/AArch64/consthoist-unreac [...] create mode 100644 llvm/test/Transforms/ConstantHoisting/X86/pr43903-not-all-uses- [...] create mode 100644 llvm/test/Transforms/InstCombine/select-imm-canon.ll create mode 100644 llvm/test/tools/llvm-dwarfdump/X86/debug-line-dw-lne-end-sequence.s