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from a50f6abffc3 [ARM][GCC][1/1x]: Patch to support MVE ACLE intrinsics with [...] new 5db0eb95c34 [ARM][GCC][2/1x]: MVE intrinsics with unary operand.
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Summary of changes: gcc/ChangeLog | 49 +++++++++ gcc/config/arm/arm-builtins.c | 36 ++++++ gcc/config/arm/arm_mve.h | 122 +++++++++++++++++++++ gcc/config/arm/arm_mve_builtins.def | 6 + gcc/config/arm/mve.md | 55 +++++++++- gcc/testsuite/ChangeLog | 19 ++++ .../intrinsics/{vrev32q_f16.c => vcvtq_s16_f16.c} | 6 +- .../intrinsics/{vnegq_f32.c => vcvtq_s32_f32.c} | 6 +- .../intrinsics/{vrev32q_f16.c => vcvtq_u16_f16.c} | 6 +- .../intrinsics/{vabsq_f32.c => vcvtq_u32_f32.c} | 6 +- .../gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c | 14 +++ .../gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c | 14 +++ .../gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c | 14 +++ .../gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c | 14 +++ .../gcc.target/arm/mve/intrinsics/vrev64q_s16.c | 22 ++++ .../gcc.target/arm/mve/intrinsics/vrev64q_s32.c | 22 ++++ .../gcc.target/arm/mve/intrinsics/vrev64q_s8.c | 22 ++++ .../gcc.target/arm/mve/intrinsics/vrev64q_u16.c | 22 ++++ .../gcc.target/arm/mve/intrinsics/vrev64q_u32.c | 22 ++++ .../gcc.target/arm/mve/intrinsics/vrev64q_u8.c | 22 ++++ 20 files changed, 485 insertions(+), 14 deletions(-) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrev32q_f16.c => vcvtq_s16_f16.c} (69%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vnegq_f32.c => vcvtq_s32_f32.c} (69%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrev32q_f16.c => vcvtq_u16_f16.c} (68%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vabsq_f32.c => vcvtq_u32_f32.c} (68%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u8.c