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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/llvm-project.

from 83a9321f60d [Coroutines] Remove corresponding phi values when apply sim [...] adds ca3bf289a7f [NFC] Modify the format: Drop the else since we alerady ret [...] adds 95840866b7d [X86] Improve v2i64->v2f32 and v4i64->v4f32 uint_to_fp on a [...] adds 2c053109fa8 [MC] Delete MCFragment::isDummy. NFC adds b9780f4f80b [DAGCombine] Don't check the legality of type when combine [...] adds 806a2b1f3d8 [MC] Reorder MCFragment members to decrease padding adds 2e466950031 [MC] Reorder members of MCFragment's subclasses to decrease [...] adds 8aae6455c07 [mlir][spirv] Update SPIR-V documentation with information [...] adds 19ace449a3d [TargetLowering] Use SETCC input type to call getBooleanCon [...] adds ce67db41853 [Clang] Force rtlib=platform in test to avoid fails with CL [...] adds a7929533300 [Metadata] Add TBAA struct metadata to `AAMDNode` adds c5fb73c5d1b [APFloat] Add recoverable string parsing errors to APFloat adds 103a58c8f2b Add ExternalAAWrapperPass to createLegacyPMAAResults. adds aab72f89b19 [mlir] Update mlir/CMakeLists.txt to install *.def files adds f3f7dc3d299 [APFloat] Fix compilation warnings adds 5173bfcbc48 Add interface emitPrefix for MCCodeEmitter adds 0efc9e5a8cc [ARM][MVE] More MVETailPredication debug messages. NFC. adds 7180d9568df Fix MSVC "not all control paths return a value" warning. NFCI. adds d68904f957a [NFC] Fix trivial typos in comments adds 89b11843254 [test][DebugInfo][NFC] Rename method for clarity adds 6fa6000e3e2 [DAG] DAGCombiner::XformToShuffleWithZero - use APInt::extr [...] adds 5d986a68a59 [CostModel][X86] Add missing scalar i64->f32 uitofp costs adds de735247c8b [X86] Add extra PR43971 test case mentioned in D70267 adds d45aafa2fbc [clang-format] fix conflict between FormatStyle::BWACS_Mult [...] adds d67c4cc2eb4 [mlir][Linalg] Reimplement and extend getStridesAndOffset adds f1c85ecdfcc AMDGPU/GlobalISel: Select more G_EXTRACTs correctly adds bc763c42bbc [lldb] [Process/NetBSD] Remove unused orig_*ax use adds e4464bf3d45 AMDGPU/GlobalISel: Select scalar v2s16 G_BUILD_VECTOR adds b99ef32d041 [ARM,MVE] Generate the right instruction for vmaxnmq_m_f16. adds 4978296cd8e [ARM,MVE] Support -ve offsets in gather-load intrinsics. adds 34817e04fee [ARM,MVE] Fix many signedness errors in MVE intrinsics. adds ea5abf14530 Fix "use of uninitialized variable" static analyzer warning. NFCI. adds 5bcc747393b Fix "use of uninitialized variable" static analyzer warning [...] adds ea2c159f966 [AMDGPU] Fix "use of uninitialized variable" static analyze [...] adds 1d549cff48c [NFC] Fixes -Wrange-loop-analysis warnings adds eec0240f971 Adds -Wrange-loop-analysis to -Wall adds 61b5e727b7c [AIX] Use csect reference for function address constants adds 0eb981b8ce7 [ARM] Use correct TRAP opcode for thumb in FastISel adds f88d52728b9 [ARM] Use the correct opcodes for Thumb2 segmented stack fr [...] adds 3e1f3b164cc [llvm-libc] Fix missing virtual destructor adds 83ec9b51ed2 [AIX] Use csect reference for function address constants adds b3757f3091d [lldb/CMake] Autodetect Python dependency adds 8eba3fbb12f [lldb/Test] Temporarily skip TestFoundationDisassembly on t [...] adds 350da402ef6 [clang-tidy] new check: bugprone-signed-char-misuse adds ba4ca37b814 [gn build] Port 350da402ef6 adds 896b84ac2c7 [llvm-readelf] Print EI_ABIVERSION as decimal instead of he [...] adds 3abc2927cb2 [lldb/Test] Move @skipIfAsan from test class to test methods. adds f6544934b94 Make check-llvm run 50% faster on macOS, 18% faster on Windows. adds bbfebd7b8a6 [CMake] Add $ORIGIN/../../../../lib to rpath if BUILD_SHARE [...] adds 8c8ffd461d1 [lldb/CMake] Only set PYTHON_HOME on Windows adds 0239526cccf [lldb/Docs] Fix capitalization typo. adds 5b24c088171 [libc] Move all tests to a top level `test` directory. adds 7ae3d335467 [lld] Fix trivial typos in comments adds e29a2e6be4e [PowerPC][LoopVectorize] Extend getRegisterClassForType to [...] adds df3f4e0d77e [X86] Fix an 8 bit testb being selected when folding a vola [...] adds 40a80a0a19f Lower TAGPstack with negative offset to SUBG. adds 19433b199d1 [OpenMP] Fix incorrect property of __has_attribute() macro adds 22cec48dacc [x86] add tests for concat self + shuffle; NFC adds b73fea6a7cf [NFC] Test commit, whitespace change adds 02f694b69a8 [NFC] Test commit, revert whitespace change adds 7b518dcb291 [OPENMP50]Support lastprivate conditional updates in inc/de [...] adds ca868002d31 [X86] Rename vec-strict-*-cmp.ll to vec-strict-cmp-*.ll to [...] adds 62f3403bfc1 [LegalizeTypes] Add widening support for STRICT_FSETCC/FSETCCS adds 317cbdad4d1 [lldb/Docs] Describe optional dependencies on build page. adds 6a0564adcfe [X86] Improve v4i32->v4f64 uint_to_fp for AVX1/AVX2 targets. adds 5518a02a83e llc/MIR: Fix setFunctionAttributes for MIR functions adds 14d25052a29 AMDGPU: Use ImmLeaf for inline immediate predicates adds a506efff182 AMDGPU: Use ImmLeaf adds 7f2db2917da AMDGPU: Fix legalizing f16 fpow adds 0b093f02120 GlobalISel: Start adding computeNumSignBits to GISelKnownBits adds 1060b9e23b8 GlobalISel: Correct result type for G_FCMP in lowerFPTOUI adds ee6b8722ffa GlobalISel: Fix unsupported legalize action adds f5329bfc76b [Diagnostic] make Wmisleading-indendation not warn about labels adds 24ee4edee8e [PowerPC][NFC] Rename record instructions to use _rec suffi [...] adds d8fd92eaaa3 [FileCheck] Remove FileCheck prefix in API new 83d690a1498 Don't rely on 'l'(ell) modifiers to indicate a label reference new 71a2a62163c [CMake] Pass symlink dependency to add_llvm_install_targets [...] new 59fadc14eeb [NSArray] Remove a very old and deprecated formatter. new b5e7f95cfbe [msan] Check qsort input. new 08d17cb065d [X86] Move an enum definition into a header to simplify fut [...] new 450073c639d Change the patterns to include the prefix '= ' so we don't [...] new f3de8ab5cce GlobalISel: Implement lower for G_INTRINSIC_ROUND new 26f714ff43e TableGen/GlobalISel: Handle default operands that are used new 4e85ca9562a AMDGPU/GlobalISel: Replace handling of boolean values new d4c9e133244 AMDGPU/GlobalISel: Select G_UADDE/G_USUBE new c6fd16af2be Use FileCheck instead of grep new 6904cd94867 Add Triple::isX86() new 5e0e0e3ff05 [NFC] Fixes -Wrange-loop-analysis warnings new 7ba4595c86b [msan] Fix underflow in qsort interceptor. new 20f005d25f4 [CodeGen][ObjC] Push the properties of a protocol before pu [...]

The 15 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: .../clang-tidy/bugprone/BugproneTidyModule.cpp | 3 + .../clang-tidy/bugprone/CMakeLists.txt | 1 + .../clang-tidy/bugprone/SignedCharMisuseCheck.cpp | 104 +++ .../clang-tidy/bugprone/SignedCharMisuseCheck.h | 44 + .../clang-tidy/readability/MagicNumbersCheck.cpp | 8 +- .../clang-tidy/utils/FixItHintUtils.cpp | 1 + clang-tools-extra/docs/ReleaseNotes.rst | 6 + .../checks/bugprone-signed-char-misuse.rst | 76 ++ clang-tools-extra/docs/clang-tidy/checks/list.rst | 1 + .../bugprone-signed-char-misuse-fsigned-char.cpp | 9 + .../bugprone-signed-char-misuse-funsigned-char.cpp | 17 + .../bugprone-signed-char-misuse-with-option.cpp | 74 ++ .../checkers/bugprone-signed-char-misuse.cpp | 123 +++ clang/include/clang/Basic/DiagnosticGroups.td | 2 +- clang/include/clang/Basic/arm_mve.td | 75 +- clang/include/clang/Basic/arm_mve_defs.td | 5 +- clang/lib/AST/MicrosoftMangle.cpp | 4 +- clang/lib/CodeGen/CGBuiltin.cpp | 3 +- clang/lib/CodeGen/CGExpr.cpp | 3 + clang/lib/CodeGen/CGExprScalar.cpp | 21 +- clang/lib/CodeGen/CGObjCMac.cpp | 6 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 36 +- clang/lib/CodeGen/CGOpenMPRuntime.h | 5 + clang/lib/CodeGen/CGStmtOpenMP.cpp | 6 + clang/lib/Driver/ToolChains/Darwin.cpp | 2 +- clang/lib/Driver/ToolChains/FreeBSD.cpp | 7 +- clang/lib/Format/UnwrappedLineFormatter.cpp | 13 + clang/lib/Frontend/CompilerInvocation.cpp | 2 +- clang/lib/Lex/LiteralSupport.cpp | 8 +- clang/lib/Parse/ParseStmt.cpp | 10 +- clang/lib/Parse/ParseStmtAsm.cpp | 5 +- .../CodeGen/arm-mve-intrinsics/scatter-gather.c | 60 +- clang/test/CodeGen/arm-mve-intrinsics/vabdq.c | 18 +- clang/test/CodeGen/arm-mve-intrinsics/vhaddq.c | 18 +- clang/test/CodeGen/arm-mve-intrinsics/vhsubq.c | 12 +- clang/test/CodeGen/arm-mve-intrinsics/vmaxnmq.c | 8 +- clang/test/CodeGen/arm-mve-intrinsics/vmaxq.c | 18 +- clang/test/CodeGen/arm-mve-intrinsics/vminnmq.c | 8 +- clang/test/CodeGen/arm-mve-intrinsics/vminq.c | 14 +- clang/test/CodeGen/arm-mve-intrinsics/vmulhq.c | 18 +- clang/test/CodeGen/arm-mve-intrinsics/vmullbq.c | 24 +- clang/test/CodeGen/arm-mve-intrinsics/vmulltq.c | 18 +- clang/test/CodeGen/arm-mve-intrinsics/vqaddq.c | 6 +- clang/test/CodeGen/arm-mve-intrinsics/vqsubq.c | 6 +- clang/test/CodeGen/arm-mve-intrinsics/vrhaddq.c | 20 +- clang/test/CodeGen/arm-mve-intrinsics/vrmulhq.c | 18 +- clang/test/CodeGenObjC/encode-test-2.m | 31 +- clang/test/Driver/cross-linux.c | 3 + clang/test/Misc/warning-wall.c | 4 +- clang/test/OpenMP/for_lastprivate_codegen.cpp | 15 +- clang/test/OpenMP/sections_lastprivate_codegen.cpp | 65 +- clang/test/Parser/warn-misleading-indentation.cpp | 7 + clang/test/Sema/arm-mve-immediates.c | 28 +- clang/test/SemaCXX/warn-range-loop-analysis.cpp | 1 + clang/unittests/Format/FormatTest.cpp | 37 +- clang/utils/TableGen/MveEmitter.cpp | 11 +- .../sanitizer_common_interceptors.inc | 18 + compiler-rt/test/msan/qsort.cpp | 12 + libc/CMakeLists.txt | 7 +- libc/config/linux/x86_64/CMakeLists.txt | 10 - libc/docs/source_layout.rst | 10 + libc/src/errno/CMakeLists.txt | 12 - libc/src/string/CMakeLists.txt | 2 - libc/src/string/strcat/CMakeLists.txt | 11 - libc/src/string/strcpy/CMakeLists.txt | 10 - libc/src/sys/mman/CMakeLists.txt | 14 - libc/test/CMakeLists.txt | 4 + libc/{ => test}/config/CMakeLists.txt | 0 libc/test/config/linux/CMakeLists.txt | 4 + libc/test/config/linux/x86_64/CMakeLists.txt | 11 + .../config/linux/x86_64/syscall_test.cpp | 0 libc/test/src/CMakeLists.txt | 3 + libc/{ => test}/src/errno/CMakeLists.txt | 9 +- libc/{ => test}/src/errno/errno_test.cpp | 0 libc/test/src/string/CMakeLists.txt | 23 + .../strcat => test/src/string}/strcat_test.cpp | 0 .../strcpy => test/src/string}/strcpy_test.cpp | 0 libc/{ => test}/src/sys/CMakeLists.txt | 0 libc/test/src/sys/mman/CMakeLists.txt | 14 + libc/{ => test}/src/sys/mman/mmap_test.cpp | 0 libc/utils/HdrGen/CMakeLists.txt | 1 + .../errno_test.cpp => utils/HdrGen/Command.cpp} | 14 +- libc/utils/HdrGen/Command.h | 2 + lld/Common/Filesystem.cpp | 2 +- lld/ELF/Arch/X86.cpp | 2 +- lld/ELF/ICF.cpp | 2 +- lld/ELF/InputFiles.cpp | 2 +- lld/ELF/InputSection.cpp | 2 +- lld/ELF/OutputSections.cpp | 2 +- lld/docs/WebAssembly.rst | 2 +- lld/docs/windows_support.rst | 2 +- lld/include/lld/Core/Atom.h | 2 +- lld/include/lld/Core/Instrumentation.h | 2 +- lld/include/lld/Core/Reference.h | 2 +- lld/include/lld/ReaderWriter/MachOLinkingContext.h | 2 +- lld/lib/Core/Resolver.cpp | 2 +- lld/lib/Driver/DarwinLdDriver.cpp | 8 +- lld/lib/ReaderWriter/MachO/CompactUnwindPass.cpp | 2 +- lld/lib/ReaderWriter/MachO/File.h | 2 +- lld/lib/ReaderWriter/MachO/GOTPass.cpp | 2 +- lld/lib/ReaderWriter/MachO/MachOLinkingContext.cpp | 2 +- .../MachO/MachONormalizedFileBinaryWriter.cpp | 4 +- .../MachO/MachONormalizedFileToAtoms.cpp | 8 +- lld/lib/ReaderWriter/YAML/ReaderWriterYAML.cpp | 4 +- lld/test/ELF/aarch64-movw-tprel.s | 2 +- lld/test/ELF/linkerscript/assert.s | 2 +- lld/test/ELF/mips-n32-rels.s | 2 +- lld/test/ELF/ppc64-bsymbolic-toc-restore.s | 2 +- lld/test/wasm/export-optional-lazy.ll | 2 +- lld/test/wasm/signature-mismatch-unknown.ll | 2 +- lld/wasm/Config.h | 2 +- lld/wasm/InputChunks.h | 4 +- lld/wasm/InputFiles.cpp | 3 +- lld/wasm/SymbolTable.cpp | 11 +- lld/wasm/Symbols.h | 4 +- lldb/cmake/modules/FindPythonInterpAndLibs.cmake | 51 ++ lldb/cmake/modules/LLDBConfig.cmake | 53 +- lldb/docs/resources/build.rst | 38 +- .../cmake/modules/FindPythonInterpAndLibs.cmake | 51 ++ .../TestCallOverriddenMethod.py | 10 +- .../objc/foundation/TestFoundationDisassembly.py | 2 + lldb/source/API/CMakeLists.txt | 8 + lldb/source/Plugins/Language/ObjC/NSArray.cpp | 27 - .../NetBSD/NativeRegisterContextNetBSD_x86_64.cpp | 5 - llvm/bindings/ocaml/llvm/llvm.mli | 2 +- llvm/cmake/modules/AddLLVM.cmake | 17 +- llvm/include/llvm/ADT/APFloat.h | 11 +- llvm/include/llvm/ADT/PointerUnion.h | 2 +- llvm/include/llvm/ADT/Triple.h | 5 + llvm/include/llvm/Analysis/ValueTracking.h | 4 +- llvm/include/llvm/CodeGen/CommandFlags.inc | 82 +- .../include/llvm/CodeGen/GlobalISel/CallLowering.h | 2 +- .../llvm/CodeGen/GlobalISel/GISelKnownBits.h | 4 + .../llvm/CodeGen/GlobalISel/LegalizerHelper.h | 1 + .../llvm/CodeGen/GlobalISel/LegalizerInfo.h | 1 + .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 6 + llvm/include/llvm/CodeGen/MIRParser/MIRParser.h | 14 +- llvm/include/llvm/DebugInfo/GSYM/FunctionInfo.h | 2 +- llvm/include/llvm/DebugInfo/GSYM/GsymCreator.h | 6 +- .../llvm/ExecutionEngine/Orc/OrcABISupport.h | 2 +- llvm/include/llvm/IR/InstrTypes.h | 2 +- llvm/include/llvm/IR/IntrinsicsARM.td | 61 +- llvm/include/llvm/IR/Metadata.h | 28 +- llvm/include/llvm/MC/MCCodeEmitter.h | 6 + llvm/include/llvm/MC/MCFragment.h | 92 +- llvm/include/llvm/Support/Allocator.h | 2 +- .../llvm/Target/GlobalISel/SelectionDAGCompat.td | 1 + llvm/include/llvm/Target/Target.td | 2 +- llvm/include/llvm/Transforms/IPO/Attributor.h | 6 +- llvm/lib/Analysis/AliasAnalysis.cpp | 5 + llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp | 17 +- llvm/lib/Bitcode/Reader/MetadataLoader.cpp | 2 +- llvm/lib/CodeGen/Analysis.cpp | 2 +- .../lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp | 35 +- llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 70 ++ llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 33 +- llvm/lib/CodeGen/LiveDebugVariables.cpp | 2 +- llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 45 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 17 +- .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h | 2 + .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 84 ++ .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 2 +- llvm/lib/CodeGen/TwoAddressInstructionPass.cpp | 2 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp | 2 +- llvm/lib/IR/AutoUpgrade.cpp | 4 +- llvm/lib/IR/Metadata.cpp | 1 + llvm/lib/MC/MCAssembler.cpp | 6 +- llvm/lib/MC/MCExpr.cpp | 2 +- llvm/lib/MC/MCFragment.cpp | 6 +- llvm/lib/MC/MCParser/AsmParser.cpp | 3 +- llvm/lib/MC/MCParser/COFFAsmParser.cpp | 2 +- llvm/lib/ProfileData/GCOV.cpp | 2 +- llvm/lib/Support/APFloat.cpp | 155 ++-- llvm/lib/Support/FileCheck.cpp | 272 +++--- llvm/lib/Support/FileCheckImpl.h | 163 ++-- llvm/lib/Support/StringRef.cpp | 10 +- llvm/lib/Target/AArch64/AArch64CallLowering.cpp | 2 +- .../Target/AArch64/AArch64ExpandPseudoInsts.cpp | 6 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 9 +- llvm/lib/Target/AArch64/AArch64RegisterInfo.td | 2 +- .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 14 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 2 +- .../Target/AMDGPU/AMDGPUGenRegisterBankInfo.def | 110 ++- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 16 + .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 221 ++--- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 12 +- llvm/lib/Target/AMDGPU/AMDGPUInstructions.td | 22 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 33 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 387 ++++++--- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h | 4 + llvm/lib/Target/AMDGPU/AMDGPURegisterBanks.td | 2 - .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 4 +- .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp | 1 + llvm/lib/Target/AMDGPU/R600AsmPrinter.cpp | 2 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 1 + llvm/lib/Target/AMDGPU/SIInstrInfo.h | 4 + llvm/lib/Target/AMDGPU/SIInstrInfo.td | 25 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 52 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 8 - llvm/lib/Target/ARM/ARMCallingConv.cpp | 2 +- llvm/lib/Target/ARM/ARMFastISel.cpp | 8 +- llvm/lib/Target/ARM/ARMFrameLowering.cpp | 6 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 2 +- llvm/lib/Target/ARM/ARMInstrMVE.td | 81 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 4 + llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 2 +- .../lib/Target/ARM/MCTargetDesc/ARMUnwindOpAsm.cpp | 2 +- llvm/lib/Target/ARM/MCTargetDesc/ARMUnwindOpAsm.h | 2 +- llvm/lib/Target/ARM/MVETailPredication.cpp | 157 ++-- llvm/lib/Target/Hexagon/HexagonRegisterInfo.td | 2 +- llvm/lib/Target/Mips/MipsInstrFPU.td | 2 +- llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 88 +- llvm/lib/Target/PowerPC/P9InstrResources.td | 216 ++--- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 22 + llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 77 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 31 +- llvm/lib/Target/PowerPC/PPCISelLowering.h | 923 +++++++++++---------- llvm/lib/Target/PowerPC/PPCInstr64Bit.td | 14 +- llvm/lib/Target/PowerPC/PPCInstrAltivec.td | 70 +- llvm/lib/Target/PowerPC/PPCInstrFormats.td | 38 +- llvm/lib/Target/PowerPC/PPCInstrHTM.td | 16 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 284 ++++--- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 238 +++--- llvm/lib/Target/PowerPC/PPCInstrVSX.td | 20 +- llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 42 +- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 2 +- llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 12 +- llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 39 +- llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 11 + .../Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 222 +++-- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 11 + llvm/lib/Target/X86/X86ISelLowering.cpp | 167 +++- llvm/lib/Target/X86/X86InstrAVX512.td | 2 +- llvm/lib/Target/X86/X86MCInstLower.cpp | 2 + llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 4 + llvm/lib/Transforms/IPO/Attributor.cpp | 6 +- llvm/lib/Transforms/IPO/PartialInlining.cpp | 2 +- llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp | 3 +- llvm/lib/Transforms/Utils/AddDiscriminators.cpp | 2 +- llvm/test/Analysis/CostModel/X86/uitofp.ll | 22 +- llvm/test/CodeGen/AArch64/addg_subg.mir | 37 + .../CodeGen/AMDGPU/GlobalISel/bool-legalization.ll | 105 +++ .../CodeGen/AMDGPU/GlobalISel/inst-select-and.mir | 85 +- .../AMDGPU/GlobalISel/inst-select-anyext.mir | 152 ++-- .../AMDGPU/GlobalISel/inst-select-brcond.mir | 8 +- .../GlobalISel/inst-select-build-vector.v2s16.mir | 239 ++++++ .../CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir | 113 +-- .../AMDGPU/GlobalISel/inst-select-extract.mir | 20 + .../CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.mir | 28 + .../CodeGen/AMDGPU/GlobalISel/inst-select-icmp.mir | 44 +- .../AMDGPU/GlobalISel/inst-select-icmp.s64.mir | 309 +++---- .../AMDGPU/GlobalISel/inst-select-implicit-def.mir | 19 - .../CodeGen/AMDGPU/GlobalISel/inst-select-or.mir | 79 +- .../AMDGPU/GlobalISel/inst-select-phi-invalid.mir | 31 - .../CodeGen/AMDGPU/GlobalISel/inst-select-phi.mir | 36 +- .../AMDGPU/GlobalISel/inst-select-select.mir | 16 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir | 92 +- .../AMDGPU/GlobalISel/inst-select-trunc.mir | 16 + .../AMDGPU/GlobalISel/inst-select-uadde.gfx10.mir | 70 ++ .../AMDGPU/GlobalISel/inst-select-uadde.mir | 89 ++ .../AMDGPU/GlobalISel/inst-select-uaddo.mir | 10 +- .../AMDGPU/GlobalISel/inst-select-usube.gfx10.mir | 70 ++ .../AMDGPU/GlobalISel/inst-select-usube.mir | 89 ++ .../AMDGPU/GlobalISel/inst-select-usubo.mir | 10 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir | 80 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir | 92 +- .../CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir | 57 +- .../AMDGPU/GlobalISel/legalize-intrinsic-round.mir | 802 +++++++++++++++++- .../AMDGPU/GlobalISel/legalize-jump-table.mir | 78 ++ .../AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll | 3 + .../AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll | 3 + .../AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll | 1 + .../AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll | 1 + .../AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll | 6 + .../AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll | 6 + .../GlobalISel/regbankselect-amdgcn.div.fmas.mir | 5 +- .../GlobalISel/regbankselect-amdgcn.kill.mir | 5 +- .../GlobalISel/regbankselect-amdgcn.wqm.vote.mir | 5 +- .../AMDGPU/GlobalISel/regbankselect-and-s1.mir | 519 ++++-------- .../AMDGPU/GlobalISel/regbankselect-anyext.mir | 21 +- .../AMDGPU/GlobalISel/regbankselect-brcond.mir | 30 +- .../AMDGPU/GlobalISel/regbankselect-icmp.mir | 12 +- .../GlobalISel/regbankselect-intrinsic-round.mir | 31 - .../CodeGen/AMDGPU/GlobalISel/regbankselect-or.mir | 38 +- .../AMDGPU/GlobalISel/regbankselect-phi-s1.mir | 628 ++++++++------ .../AMDGPU/GlobalISel/regbankselect-phi.mir | 686 +++++++++------ .../AMDGPU/GlobalISel/regbankselect-sadde.mir | 46 +- .../AMDGPU/GlobalISel/regbankselect-select.mir | 334 +++++--- .../AMDGPU/GlobalISel/regbankselect-sext.mir | 61 +- .../AMDGPU/GlobalISel/regbankselect-smax.mir | 40 +- .../AMDGPU/GlobalISel/regbankselect-smin.mir | 40 +- .../AMDGPU/GlobalISel/regbankselect-ssube.mir | 46 +- .../AMDGPU/GlobalISel/regbankselect-trunc.mir | 4 +- .../AMDGPU/GlobalISel/regbankselect-uadde.mir | 46 +- .../AMDGPU/GlobalISel/regbankselect-uaddo.mir | 3 +- .../AMDGPU/GlobalISel/regbankselect-umax.mir | 40 +- .../AMDGPU/GlobalISel/regbankselect-umin.mir | 40 +- .../AMDGPU/GlobalISel/regbankselect-usube.mir | 46 +- .../AMDGPU/GlobalISel/regbankselect-usubo.mir | 3 +- .../AMDGPU/GlobalISel/regbankselect-xor.mir | 61 +- .../AMDGPU/GlobalISel/regbankselect-zext.mir | 60 +- llvm/test/CodeGen/AMDGPU/fpow.ll | 562 +++++++++++++ .../CodeGen/ARM/load_store_opt_clobber_cpsr.mir | 2 +- .../AMDGPU/llc-target-cpu-attr-from-cmdline-ir.mir | 55 ++ .../AMDGPU/llc-target-cpu-attr-from-cmdline.mir | 23 + .../GlobalISel/legalizer/fptosi_and_fptoui.mir | 108 ++- .../Mips/GlobalISel/llvm-ir/fptosi_and_fptoui.ll | 9 + .../PowerPC/aix-reference-func-addr-const.ll | 32 + llvm/test/CodeGen/PowerPC/block-placement.mir | 2 +- .../convert-rr-to-ri-instrs-out-of-range.mir | 100 +-- .../CodeGen/PowerPC/convert-rr-to-ri-instrs.mir | 170 ++-- llvm/test/CodeGen/PowerPC/fold-rlwinm.mir | 8 +- llvm/test/CodeGen/PowerPC/ifcvt-diamond-ret.mir | 4 +- llvm/test/CodeGen/PowerPC/opt-cmp-inst-cr0-live.ll | 16 +- .../test/CodeGen/PowerPC/opt-sub-inst-cr0-live.mir | 2 +- .../PowerPC/peephole-miscompile-extswsli.mir | 6 +- .../test/CodeGen/PowerPC/rlwinm_rldicl_to_andi.mir | 24 +- llvm/test/CodeGen/PowerPC/sext-vector-inreg.ll | 5 +- .../Thumb2/mve-intrinsics/scatter-gather.ll | 48 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vabdq.ll | 42 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vhaddq.ll | 40 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vhsubq.ll | 30 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vmaxnmq.ll | 16 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vmaxq.ll | 26 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vminnmq.ll | 16 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vminq.ll | 22 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vmulhq.ll | 40 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vmullbq.ll | 40 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vmulltq.ll | 40 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vqaddq.ll | 14 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vqsubq.ll | 14 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vrhaddq.ll | 42 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vrmulhq.ll | 40 +- llvm/test/CodeGen/Thumb2/segmented-stacks.ll | 86 +- .../CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll | 2 +- .../CodeGen/X86/DynamicCalleeSavedRegisters.ll | 2 +- llvm/test/CodeGen/X86/callbr-asm.ll | 30 +- llvm/test/CodeGen/X86/extractelement-load.ll | 45 + llvm/test/CodeGen/X86/lea.ll | 2 +- llvm/test/CodeGen/X86/masked_gather_scatter.ll | 2 +- .../test/CodeGen/X86/select-testb-volatile-load.ll | 33 + llvm/test/CodeGen/X86/swifterror.ll | 2 +- ...vec-strict-128-cmp.ll => vec-strict-cmp-128.ll} | 0 ...vec-strict-256-cmp.ll => vec-strict-cmp-256.ll} | 0 ...vec-strict-512-cmp.ll => vec-strict-cmp-512.ll} | 0 llvm/test/CodeGen/X86/vec-strict-cmp-sub128.ll | 308 +++++++ llvm/test/CodeGen/X86/vec-strict-inttofp-128.ll | 41 +- llvm/test/CodeGen/X86/vec-strict-inttofp-256.ll | 193 ++--- llvm/test/CodeGen/X86/vec_int_to_fp.ll | 799 ++++++++---------- llvm/test/CodeGen/X86/vec_uint_to_fp.ll | 4 +- .../X86/vector-constrained-fp-intrinsics.ll | 134 +-- .../CodeGen/X86/vector-shuffle-combining-avx.ll | 64 ++ llvm/test/LTO/X86/parallel.ll | 2 +- llvm/test/MC/AArch64/arm64-directive_loh.s | 4 +- llvm/test/MC/ARM/misaligned-blx.s | 2 +- llvm/test/TableGen/DefaultOpsGlobalISel.td | 144 ++++ .../test/Transforms/DeadArgElim/naked_functions.ll | 2 +- .../Transforms/LoopVectorize/PowerPC/reg-usage.ll | 15 +- llvm/test/Transforms/SCCP/apint-basictest3.ll | 2 +- llvm/test/Transforms/SLPVectorizer/X86/align.ll | 2 +- llvm/test/Transforms/SROA/tbaa-struct.ll | 2 +- llvm/test/tools/llvm-objcopy/ELF/partitions.test | 6 +- .../llvm-readobj/ELF/file-header-abi-version.test | 6 +- .../tools/llvm-readobj/ELF/gnu-file-headers.test | 6 +- llvm/tools/llc/llc.cpp | 11 +- llvm/tools/llvm-c-test/echo.cpp | 4 +- llvm/tools/llvm-objdump/MachODump.cpp | 2 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 4 +- llvm/unittests/ADT/APFloatTest.cpp | 278 +++---- llvm/unittests/Analysis/VectorFunctionABITest.cpp | 2 +- llvm/unittests/Analysis/VectorUtilsTest.cpp | 2 +- .../unittests/CodeGen/GlobalISel/KnownBitsTest.cpp | 78 ++ .../DebugInfo/DWARF/DWARFDebugLineTest.cpp | 38 +- llvm/unittests/Support/FileCheckTest.cpp | 144 ++-- llvm/unittests/Support/ReverseIterationTest.cpp | 4 +- .../WebAssembly/WebAssemblyExceptionInfoTest.cpp | 2 +- llvm/utils/TableGen/CodeGenTarget.cpp | 4 +- llvm/utils/TableGen/CodeGenTarget.h | 4 +- llvm/utils/TableGen/GlobalISelEmitter.cpp | 44 +- llvm/utils/bugpoint/RemoteRunSafely.sh | 2 +- .../clang-tools-extra/clang-tidy/bugprone/BUILD.gn | 1 + llvm/utils/lit/lit/TestRunner.py | 36 +- mlir/CMakeLists.txt | 1 + mlir/docs/Dialects/SPIR-V.md | 119 ++- mlir/lib/Dialect/Linalg/Utils/Utils.cpp | 2 +- mlir/lib/IR/StandardTypes.cpp | 246 +++--- mlir/test/AffineOps/memref-stride-calculation.mlir | 10 + openmp/runtime/src/kmp_os.h | 2 +- polly/lib/Analysis/ScopGraphPrinter.cpp | 2 +- 391 files changed, 10809 insertions(+), 6301 deletions(-) create mode 100644 clang-tools-extra/clang-tidy/bugprone/SignedCharMisuseCheck.cpp create mode 100644 clang-tools-extra/clang-tidy/bugprone/SignedCharMisuseCheck.h create mode 100644 clang-tools-extra/docs/clang-tidy/checks/bugprone-signed-char-m [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone-signed-char [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone-signed-char [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone-signed-char [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone-signed-char [...] create mode 100644 libc/test/CMakeLists.txt copy libc/{ => test}/config/CMakeLists.txt (100%) create mode 100644 libc/test/config/linux/CMakeLists.txt create mode 100644 libc/test/config/linux/x86_64/CMakeLists.txt rename libc/{ => test}/config/linux/x86_64/syscall_test.cpp (100%) create mode 100644 libc/test/src/CMakeLists.txt copy libc/{ => test}/src/errno/CMakeLists.txt (61%) copy libc/{ => test}/src/errno/errno_test.cpp (100%) create mode 100644 libc/test/src/string/CMakeLists.txt rename libc/{src/string/strcat => test/src/string}/strcat_test.cpp (100%) rename libc/{src/string/strcpy => test/src/string}/strcpy_test.cpp (100%) copy libc/{ => test}/src/sys/CMakeLists.txt (100%) create mode 100644 libc/test/src/sys/mman/CMakeLists.txt rename libc/{ => test}/src/sys/mman/mmap_test.cpp (100%) rename libc/{src/errno/errno_test.cpp => utils/HdrGen/Command.cpp} (52%) create mode 100644 lldb/cmake/modules/FindPythonInterpAndLibs.cmake create mode 100644 lldb/lldb/cmake/modules/FindPythonInterpAndLibs.cmake create mode 100644 llvm/test/CodeGen/AArch64/addg_subg.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector.v2s16.mir delete mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-phi-invalid.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uadde.gfx10.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uadde.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-usube.gfx10.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-usube.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-jump-table.mir delete mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-intrinsic-round.mir create mode 100644 llvm/test/CodeGen/AMDGPU/fpow.ll create mode 100644 llvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline-ir.mir create mode 100644 llvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline.mir create mode 100644 llvm/test/CodeGen/PowerPC/aix-reference-func-addr-const.ll create mode 100644 llvm/test/CodeGen/X86/select-testb-volatile-load.ll rename llvm/test/CodeGen/X86/{vec-strict-128-cmp.ll => vec-strict-cmp-128.ll} (100%) rename llvm/test/CodeGen/X86/{vec-strict-256-cmp.ll => vec-strict-cmp-256.ll} (100%) rename llvm/test/CodeGen/X86/{vec-strict-512-cmp.ll => vec-strict-cmp-512.ll} (100%) create mode 100644 llvm/test/CodeGen/X86/vec-strict-cmp-sub128.ll create mode 100644 llvm/test/TableGen/DefaultOpsGlobalISel.td