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from d71dba7b611 [ARM][GCC][3/2x]: MVE intrinsics with binary operands. new 33203b4c27d [ARM][GCC][4/2x]: MVE intrinsics with binary operands.

The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: gcc/ChangeLog | 868 +++++ gcc/config/arm/arm_mve.h | 3657 +++++++++++++++++++- gcc/config/arm/arm_mve_builtins.def | 120 + gcc/config/arm/constraints.md | 14 +- gcc/config/arm/mve.md | 1205 ++++++- gcc/config/arm/predicates.md | 8 + gcc/testsuite/ChangeLog | 365 ++ .../mve/intrinsics/{vshlq_s16.c => vabdq_s16.c} | 8 +- .../mve/intrinsics/{vshlq_s32.c => vabdq_s32.c} | 8 +- .../arm/mve/intrinsics/{vshlq_s8.c => vabdq_s8.c} | 8 +- .../mve/intrinsics/{vcmpneq_u16.c => vabdq_u16.c} | 12 +- .../mve/intrinsics/{vcmpneq_u32.c => vabdq_u32.c} | 12 +- .../mve/intrinsics/{vcmpneq_u8.c => vabdq_u8.c} | 12 +- .../gcc.target/arm/mve/intrinsics/vaddq_n_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vaddq_n_s32.c | 22 + .../mve/intrinsics/{vclsq_s8.c => vaddq_n_s8.c} | 12 +- .../gcc.target/arm/mve/intrinsics/vaddq_n_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vaddq_n_u32.c | 22 + .../mve/intrinsics/{vclzq_u8.c => vaddq_n_u8.c} | 12 +- .../gcc.target/arm/mve/intrinsics/vaddvaq_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vaddvaq_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vaddvaq_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vaddvaq_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vaddvaq_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vaddvaq_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c | 22 + .../intrinsics/{vaddlvq_p_s32.c => vaddvq_p_s32.c} | 12 +- .../gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c | 22 + .../intrinsics/{vaddlvq_p_u32.c => vaddvq_p_u32.c} | 12 +- .../gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c | 22 + .../mve/intrinsics/{vshlq_s16.c => vandq_s16.c} | 8 +- .../mve/intrinsics/{vshlq_s32.c => vandq_s32.c} | 8 +- .../arm/mve/intrinsics/{vshlq_s8.c => vandq_s8.c} | 8 +- .../mve/intrinsics/{vcmpneq_u16.c => vandq_u16.c} | 12 +- .../mve/intrinsics/{vcmpneq_u32.c => vandq_u32.c} | 12 +- .../mve/intrinsics/{vcmpneq_u8.c => vandq_u8.c} | 12 +- .../mve/intrinsics/{vshlq_s16.c => vbicq_s16.c} | 8 +- .../mve/intrinsics/{vshlq_s32.c => vbicq_s32.c} | 8 +- .../arm/mve/intrinsics/{vshlq_s8.c => vbicq_s8.c} | 8 +- .../mve/intrinsics/{vcmpneq_u16.c => vbicq_u16.c} | 12 +- .../mve/intrinsics/{vcmpneq_u32.c => vbicq_u32.c} | 12 +- .../mve/intrinsics/{vcmpneq_u8.c => vbicq_u8.c} | 12 +- .../intrinsics/{vbrsrq_n_f16.c => vbrsrq_n_s16.c} | 14 +- .../intrinsics/{vbrsrq_n_f32.c => vbrsrq_n_s32.c} | 14 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c | 22 + .../intrinsics/{vbrsrq_n_f16.c => vbrsrq_n_u16.c} | 14 +- .../intrinsics/{vbrsrq_n_f32.c => vbrsrq_n_u32.c} | 14 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c | 22 + .../{vshlq_s16.c => vcaddq_rot270_s16.c} | 8 +- .../{vshlq_s32.c => vcaddq_rot270_s32.c} | 8 +- .../intrinsics/{vshlq_s8.c => vcaddq_rot270_s8.c} | 8 +- .../{vcmpneq_u16.c => vcaddq_rot270_u16.c} | 12 +- .../{vcmpneq_u32.c => vcaddq_rot270_u32.c} | 12 +- .../{vcmpneq_u8.c => vcaddq_rot270_u8.c} | 12 +- .../intrinsics/{vshlq_s16.c => vcaddq_rot90_s16.c} | 8 +- .../intrinsics/{vshlq_s32.c => vcaddq_rot90_s32.c} | 8 +- .../intrinsics/{vshlq_s8.c => vcaddq_rot90_s8.c} | 8 +- .../{vcmpneq_u16.c => vcaddq_rot90_u16.c} | 12 +- .../{vcmpneq_u32.c => vcaddq_rot90_u32.c} | 12 +- .../intrinsics/{vcmpneq_u8.c => vcaddq_rot90_u8.c} | 12 +- .../gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c | 22 + .../mve/intrinsics/{vctp32q.c => vcmpcsq_n_u8.c} | 12 +- .../intrinsics/{vcmpneq_u16.c => vcmpcsq_u16.c} | 8 +- .../intrinsics/{vcmpneq_u32.c => vcmpcsq_u32.c} | 8 +- .../mve/intrinsics/{vcmpneq_u8.c => vcmpcsq_u8.c} | 8 +- .../intrinsics/{vcmpneq_s16.c => vcmpeqq_n_s16.c} | 8 +- .../intrinsics/{vcmpneq_s32.c => vcmpeqq_n_s32.c} | 8 +- .../intrinsics/{vcmpneq_s8.c => vcmpeqq_n_s8.c} | 8 +- .../intrinsics/{vcmpneq_s16.c => vcmpeqq_n_u16.c} | 8 +- .../intrinsics/{vcmpneq_s32.c => vcmpeqq_n_u32.c} | 8 +- .../intrinsics/{vcmpneq_s8.c => vcmpeqq_n_u8.c} | 8 +- .../intrinsics/{vcmpneq_s16.c => vcmpeqq_s16.c} | 4 +- .../intrinsics/{vcmpneq_s32.c => vcmpeqq_s32.c} | 4 +- .../mve/intrinsics/{vcmpneq_s8.c => vcmpeqq_s8.c} | 4 +- .../intrinsics/{vcmpneq_u16.c => vcmpeqq_u16.c} | 4 +- .../intrinsics/{vcmpneq_u32.c => vcmpeqq_u32.c} | 4 +- .../mve/intrinsics/{vcmpneq_u8.c => vcmpeqq_u8.c} | 4 +- .../mve/intrinsics/{vctp32q.c => vcmpgeq_n_s16.c} | 12 +- .../mve/intrinsics/{vctp32q.c => vcmpgeq_n_s32.c} | 12 +- .../mve/intrinsics/{vctp32q.c => vcmpgeq_n_s8.c} | 12 +- .../intrinsics/{vcmpneq_s16.c => vcmpgeq_s16.c} | 8 +- .../intrinsics/{vcmpneq_s32.c => vcmpgeq_s32.c} | 8 +- .../mve/intrinsics/{vcmpneq_s8.c => vcmpgeq_s8.c} | 8 +- .../mve/intrinsics/{vctp32q.c => vcmpgtq_n_s16.c} | 12 +- .../mve/intrinsics/{vctp32q.c => vcmpgtq_n_s32.c} | 12 +- .../mve/intrinsics/{vctp32q.c => vcmpgtq_n_s8.c} | 12 +- .../intrinsics/{vcmpneq_s16.c => vcmpgtq_s16.c} | 8 +- .../intrinsics/{vcmpneq_s32.c => vcmpgtq_s32.c} | 8 +- .../mve/intrinsics/{vcmpneq_s8.c => vcmpgtq_s8.c} | 8 +- .../gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c | 22 + .../mve/intrinsics/{vctp32q.c => vcmphiq_n_u8.c} | 12 +- .../intrinsics/{vcmpneq_u16.c => vcmphiq_u16.c} | 8 +- .../intrinsics/{vcmpneq_u32.c => vcmphiq_u32.c} | 8 +- .../mve/intrinsics/{vcmpneq_u8.c => vcmphiq_u8.c} | 8 +- .../mve/intrinsics/{vctp32q.c => vcmpleq_n_s16.c} | 12 +- .../mve/intrinsics/{vctp32q.c => vcmpleq_n_s32.c} | 12 +- .../mve/intrinsics/{vctp32q.c => vcmpleq_n_s8.c} | 12 +- .../intrinsics/{vcmpneq_s16.c => vcmpleq_s16.c} | 8 +- .../intrinsics/{vcmpneq_s32.c => vcmpleq_s32.c} | 8 +- .../mve/intrinsics/{vcmpneq_s8.c => vcmpleq_s8.c} | 8 +- .../mve/intrinsics/{vctp32q.c => vcmpltq_n_s16.c} | 12 +- .../mve/intrinsics/{vctp32q.c => vcmpltq_n_s32.c} | 12 +- .../mve/intrinsics/{vctp32q.c => vcmpltq_n_s8.c} | 12 +- .../intrinsics/{vcmpneq_s16.c => vcmpltq_s16.c} | 8 +- .../intrinsics/{vcmpneq_s32.c => vcmpltq_s32.c} | 8 +- .../mve/intrinsics/{vcmpneq_s8.c => vcmpltq_s8.c} | 8 +- .../intrinsics/{vcmpneq_s16.c => vcmpneq_n_s16.c} | 6 +- .../intrinsics/{vcmpneq_s32.c => vcmpneq_n_s32.c} | 6 +- .../intrinsics/{vcmpneq_s8.c => vcmpneq_n_s8.c} | 6 +- .../intrinsics/{vcmpneq_s16.c => vcmpneq_n_u16.c} | 6 +- .../intrinsics/{vcmpneq_s32.c => vcmpneq_n_u32.c} | 6 +- .../intrinsics/{vcmpneq_s8.c => vcmpneq_n_u8.c} | 6 +- .../mve/intrinsics/{vshlq_s16.c => veorq_s16.c} | 8 +- .../mve/intrinsics/{vshlq_s32.c => veorq_s32.c} | 8 +- .../arm/mve/intrinsics/{vshlq_s8.c => veorq_s8.c} | 8 +- .../mve/intrinsics/{vcmpneq_u16.c => veorq_u16.c} | 12 +- .../mve/intrinsics/{vcmpneq_u32.c => veorq_u32.c} | 12 +- .../mve/intrinsics/{vcmpneq_u8.c => veorq_u8.c} | 12 +- .../gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c | 22 + .../mve/intrinsics/{vshlq_s16.c => vhaddq_s16.c} | 8 +- .../mve/intrinsics/{vshlq_s32.c => vhaddq_s32.c} | 8 +- .../arm/mve/intrinsics/{vshlq_s8.c => vhaddq_s8.c} | 8 +- .../mve/intrinsics/{vcmpneq_u16.c => vhaddq_u16.c} | 12 +- .../mve/intrinsics/{vcmpneq_u32.c => vhaddq_u32.c} | 12 +- .../mve/intrinsics/{vcmpneq_u8.c => vhaddq_u8.c} | 12 +- .../{vshlq_s16.c => vhcaddq_rot270_s16.c} | 8 +- .../{vshlq_s32.c => vhcaddq_rot270_s32.c} | 8 +- .../intrinsics/{vshlq_s8.c => vhcaddq_rot270_s8.c} | 8 +- .../{vshlq_s16.c => vhcaddq_rot90_s16.c} | 8 +- .../{vshlq_s32.c => vhcaddq_rot90_s32.c} | 8 +- .../intrinsics/{vshlq_s8.c => vhcaddq_rot90_s8.c} | 8 +- .../gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c | 22 + .../mve/intrinsics/{vshlq_s16.c => vhsubq_s16.c} | 8 +- .../mve/intrinsics/{vshlq_s32.c => vhsubq_s32.c} | 8 +- .../arm/mve/intrinsics/{vshlq_s8.c => vhsubq_s8.c} | 8 +- .../mve/intrinsics/{vcmpneq_u16.c => vhsubq_u16.c} | 12 +- .../mve/intrinsics/{vcmpneq_u32.c => vhsubq_u32.c} | 12 +- .../mve/intrinsics/{vcmpneq_u8.c => vhsubq_u8.c} | 12 +- .../mve/intrinsics/{vshlq_u16.c => vmaxaq_s16.c} | 8 +- .../mve/intrinsics/{vshlq_u32.c => vmaxaq_s32.c} | 8 +- .../arm/mve/intrinsics/{vshlq_u8.c => vmaxaq_s8.c} | 8 +- .../gcc.target/arm/mve/intrinsics/vmaxavq_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxavq_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxavq_s8.c | 22 + .../mve/intrinsics/{vshlq_s16.c => vmaxq_s16.c} | 8 +- .../mve/intrinsics/{vshlq_s32.c => vmaxq_s32.c} | 8 +- .../arm/mve/intrinsics/{vshlq_s8.c => vmaxq_s8.c} | 8 +- .../mve/intrinsics/{vcmpneq_u16.c => vmaxq_u16.c} | 12 +- .../mve/intrinsics/{vcmpneq_u32.c => vmaxq_u32.c} | 12 +- .../mve/intrinsics/{vcmpneq_u8.c => vmaxq_u8.c} | 12 +- .../gcc.target/arm/mve/intrinsics/vmaxvq_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxvq_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxvq_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxvq_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxvq_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxvq_u8.c | 22 + .../mve/intrinsics/{vshlq_u16.c => vminaq_s16.c} | 8 +- .../mve/intrinsics/{vshlq_u32.c => vminaq_s32.c} | 8 +- .../arm/mve/intrinsics/{vshlq_u8.c => vminaq_s8.c} | 8 +- .../gcc.target/arm/mve/intrinsics/vminavq_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vminavq_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vminavq_s8.c | 22 + .../mve/intrinsics/{vshlq_s16.c => vminq_s16.c} | 8 +- .../mve/intrinsics/{vshlq_s32.c => vminq_s32.c} | 8 +- .../arm/mve/intrinsics/{vshlq_s8.c => vminq_s8.c} | 8 +- .../mve/intrinsics/{vcmpneq_u16.c => vminq_u16.c} | 12 +- .../mve/intrinsics/{vcmpneq_u32.c => vminq_u32.c} | 12 +- .../mve/intrinsics/{vcmpneq_u8.c => vminq_u8.c} | 12 +- .../gcc.target/arm/mve/intrinsics/vminvq_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vminvq_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vminvq_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vminvq_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vminvq_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vminvq_u8.c | 22 + .../mve/intrinsics/{vshlq_s16.c => vmladavq_s16.c} | 12 +- .../mve/intrinsics/{vshlq_s32.c => vmladavq_s32.c} | 12 +- .../mve/intrinsics/{vshlq_s8.c => vmladavq_s8.c} | 12 +- .../intrinsics/{vcmpneq_u16.c => vmladavq_u16.c} | 12 +- .../intrinsics/{vcmpneq_u32.c => vmladavq_u32.c} | 12 +- .../mve/intrinsics/{vcmpneq_u8.c => vmladavq_u8.c} | 12 +- .../intrinsics/{vcmpneq_s16.c => vmladavxq_s16.c} | 12 +- .../intrinsics/{vcmpneq_s32.c => vmladavxq_s32.c} | 12 +- .../intrinsics/{vcmpneq_s8.c => vmladavxq_s8.c} | 12 +- .../mve/intrinsics/{vshlq_s16.c => vmlsdavq_s16.c} | 12 +- .../mve/intrinsics/{vshlq_s32.c => vmlsdavq_s32.c} | 12 +- .../mve/intrinsics/{vshlq_s8.c => vmlsdavq_s8.c} | 12 +- .../intrinsics/{vcmpneq_s16.c => vmlsdavxq_s16.c} | 12 +- .../intrinsics/{vcmpneq_s32.c => vmlsdavxq_s32.c} | 12 +- .../intrinsics/{vcmpneq_s8.c => vmlsdavxq_s8.c} | 12 +- .../mve/intrinsics/{vshlq_s16.c => vmulhq_s16.c} | 8 +- .../mve/intrinsics/{vshlq_s32.c => vmulhq_s32.c} | 8 +- .../arm/mve/intrinsics/{vshlq_s8.c => vmulhq_s8.c} | 8 +- .../mve/intrinsics/{vcmpneq_u16.c => vmulhq_u16.c} | 12 +- .../mve/intrinsics/{vcmpneq_u32.c => vmulhq_u32.c} | 12 +- .../mve/intrinsics/{vcmpneq_u8.c => vmulhq_u8.c} | 12 +- .../{vcmpneq_s16.c => vmullbq_int_s16.c} | 12 +- .../{vcmpneq_s32.c => vmullbq_int_s32.c} | 12 +- .../intrinsics/{vcmpneq_s8.c => vmullbq_int_s8.c} | 12 +- .../{vcmpneq_u16.c => vmullbq_int_u16.c} | 12 +- .../{vcmpneq_u32.c => vmullbq_int_u32.c} | 12 +- .../intrinsics/{vcmpneq_u8.c => vmullbq_int_u8.c} | 12 +- .../{vcmpneq_s16.c => vmulltq_int_s16.c} | 12 +- .../{vcmpneq_s32.c => vmulltq_int_s32.c} | 12 +- .../intrinsics/{vcmpneq_s8.c => vmulltq_int_s8.c} | 12 +- .../{vcmpneq_u16.c => vmulltq_int_u16.c} | 12 +- .../{vcmpneq_u32.c => vmulltq_int_u32.c} | 12 +- .../intrinsics/{vcmpneq_u8.c => vmulltq_int_u8.c} | 12 +- .../gcc.target/arm/mve/intrinsics/vmulq_n_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmulq_n_s32.c | 22 + .../mve/intrinsics/{vclsq_s8.c => vmulq_n_s8.c} | 12 +- .../gcc.target/arm/mve/intrinsics/vmulq_n_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmulq_n_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmulq_n_u8.c | 22 + .../mve/intrinsics/{vshlq_s16.c => vmulq_s16.c} | 8 +- .../mve/intrinsics/{vshlq_s32.c => vmulq_s32.c} | 8 +- .../arm/mve/intrinsics/{vshlq_s8.c => vmulq_s8.c} | 8 +- .../mve/intrinsics/{vcmpneq_u16.c => vmulq_u16.c} | 12 +- .../mve/intrinsics/{vcmpneq_u32.c => vmulq_u32.c} | 12 +- .../mve/intrinsics/{vcmpneq_u8.c => vmulq_u8.c} | 12 +- .../mve/intrinsics/{vshlq_s16.c => vornq_s16.c} | 8 +- .../mve/intrinsics/{vshlq_s32.c => vornq_s32.c} | 8 +- .../arm/mve/intrinsics/{vshlq_s8.c => vornq_s8.c} | 8 +- .../mve/intrinsics/{vcmpneq_u16.c => vornq_u16.c} | 12 +- .../mve/intrinsics/{vcmpneq_u32.c => vornq_u32.c} | 12 +- .../mve/intrinsics/{vcmpneq_u8.c => vornq_u8.c} | 12 +- .../mve/intrinsics/{vshlq_s16.c => vorrq_s16.c} | 8 +- .../mve/intrinsics/{vshlq_s32.c => vorrq_s32.c} | 8 +- .../arm/mve/intrinsics/{vshlq_s8.c => vorrq_s8.c} | 8 +- .../mve/intrinsics/{vcmpneq_u16.c => vorrq_u16.c} | 12 +- .../mve/intrinsics/{vcmpneq_u32.c => vorrq_u32.c} | 12 +- .../mve/intrinsics/{vcmpneq_u8.c => vorrq_u8.c} | 12 +- .../gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c | 22 + .../mve/intrinsics/{vshlq_s16.c => vqaddq_s16.c} | 8 +- .../mve/intrinsics/{vshlq_s32.c => vqaddq_s32.c} | 8 +- .../arm/mve/intrinsics/{vshlq_s8.c => vqaddq_s8.c} | 8 +- .../mve/intrinsics/{vcmpneq_u16.c => vqaddq_u16.c} | 12 +- .../mve/intrinsics/{vcmpneq_u32.c => vqaddq_u32.c} | 12 +- .../mve/intrinsics/{vcmpneq_u8.c => vqaddq_u8.c} | 12 +- .../gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c | 22 + .../mve/intrinsics/{vshlq_s16.c => vqdmulhq_s16.c} | 8 +- .../mve/intrinsics/{vshlq_s32.c => vqdmulhq_s32.c} | 8 +- .../mve/intrinsics/{vshlq_s8.c => vqdmulhq_s8.c} | 8 +- .../arm/mve/intrinsics/vqrdmulhq_n_s16.c | 22 + .../arm/mve/intrinsics/vqrdmulhq_n_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c | 22 + .../intrinsics/{vshlq_s16.c => vqrdmulhq_s16.c} | 8 +- .../intrinsics/{vshlq_s32.c => vqrdmulhq_s32.c} | 8 +- .../mve/intrinsics/{vshlq_s8.c => vqrdmulhq_s8.c} | 8 +- .../gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c | 22 + .../mve/intrinsics/{vshlq_s16.c => vqrshlq_s16.c} | 8 +- .../mve/intrinsics/{vshlq_s32.c => vqrshlq_s32.c} | 8 +- .../mve/intrinsics/{vshlq_s8.c => vqrshlq_s8.c} | 8 +- .../mve/intrinsics/{vshlq_u16.c => vqrshlq_u16.c} | 8 +- .../mve/intrinsics/{vshlq_u32.c => vqrshlq_u32.c} | 8 +- .../mve/intrinsics/{vshlq_u8.c => vqrshlq_u8.c} | 8 +- .../intrinsics/{vrev64q_s16.c => vqshlq_n_s16.c} | 8 +- .../intrinsics/{vshrq_n_s32.c => vqshlq_n_s32.c} | 8 +- .../mve/intrinsics/{vclsq_s8.c => vqshlq_n_s8.c} | 8 +- .../mve/intrinsics/{vmvnq_u16.c => vqshlq_n_u16.c} | 8 +- .../mve/intrinsics/{vclzq_u32.c => vqshlq_n_u32.c} | 8 +- .../mve/intrinsics/{vmvnq_u8.c => vqshlq_n_u8.c} | 8 +- .../gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c | 22 + .../mve/intrinsics/{vshlq_s16.c => vqshlq_s16.c} | 8 +- .../mve/intrinsics/{vshlq_s32.c => vqshlq_s32.c} | 8 +- .../arm/mve/intrinsics/{vshlq_s8.c => vqshlq_s8.c} | 8 +- .../mve/intrinsics/{vshlq_u16.c => vqshlq_u16.c} | 8 +- .../mve/intrinsics/{vshlq_u32.c => vqshlq_u32.c} | 8 +- .../arm/mve/intrinsics/{vshlq_u8.c => vqshlq_u8.c} | 8 +- .../intrinsics/{vrev64q_s16.c => vqshluq_n_s16.c} | 12 +- .../intrinsics/{vqnegq_s32.c => vqshluq_n_s32.c} | 12 +- .../mve/intrinsics/{vclsq_s8.c => vqshluq_n_s8.c} | 12 +- .../gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c | 22 + .../mve/intrinsics/{vshlq_s16.c => vqsubq_s16.c} | 8 +- .../mve/intrinsics/{vshlq_s32.c => vqsubq_s32.c} | 8 +- .../arm/mve/intrinsics/{vshlq_s8.c => vqsubq_s8.c} | 8 +- .../mve/intrinsics/{vcmpneq_u16.c => vqsubq_u16.c} | 12 +- .../mve/intrinsics/{vcmpneq_u32.c => vqsubq_u32.c} | 12 +- .../mve/intrinsics/{vcmpneq_u8.c => vqsubq_u8.c} | 12 +- .../mve/intrinsics/{vshlq_s16.c => vrhaddq_s16.c} | 8 +- .../mve/intrinsics/{vshlq_s32.c => vrhaddq_s32.c} | 8 +- .../mve/intrinsics/{vshlq_s8.c => vrhaddq_s8.c} | 8 +- .../intrinsics/{vcmpneq_u16.c => vrhaddq_u16.c} | 12 +- .../intrinsics/{vcmpneq_u32.c => vrhaddq_u32.c} | 12 +- .../mve/intrinsics/{vcmpneq_u8.c => vrhaddq_u8.c} | 12 +- .../mve/intrinsics/{vshlq_s16.c => vrmulhq_s16.c} | 8 +- .../mve/intrinsics/{vshlq_s32.c => vrmulhq_s32.c} | 8 +- .../mve/intrinsics/{vshlq_s8.c => vrmulhq_s8.c} | 8 +- .../intrinsics/{vcmpneq_u16.c => vrmulhq_u16.c} | 12 +- .../intrinsics/{vcmpneq_u32.c => vrmulhq_u32.c} | 12 +- .../mve/intrinsics/{vcmpneq_u8.c => vrmulhq_u8.c} | 12 +- .../gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c | 22 + .../mve/intrinsics/{vshlq_s16.c => vrshlq_s16.c} | 8 +- .../mve/intrinsics/{vshlq_s32.c => vrshlq_s32.c} | 8 +- .../arm/mve/intrinsics/{vshlq_s8.c => vrshlq_s8.c} | 8 +- .../mve/intrinsics/{vshlq_u16.c => vrshlq_u16.c} | 8 +- .../mve/intrinsics/{vshlq_u32.c => vrshlq_u32.c} | 8 +- .../arm/mve/intrinsics/{vshlq_u8.c => vrshlq_u8.c} | 8 +- .../intrinsics/{vrev64q_s16.c => vrshrq_n_s16.c} | 8 +- .../intrinsics/{vshrq_n_s32.c => vrshrq_n_s32.c} | 8 +- .../mve/intrinsics/{vclsq_s8.c => vrshrq_n_s8.c} | 8 +- .../mve/intrinsics/{vmvnq_u16.c => vrshrq_n_u16.c} | 8 +- .../mve/intrinsics/{vclzq_u32.c => vrshrq_n_u32.c} | 8 +- .../mve/intrinsics/{vmvnq_u8.c => vrshrq_n_u8.c} | 8 +- .../mve/intrinsics/{vshlq_s16.c => vshlq_n_s16.c} | 8 +- .../mve/intrinsics/{vshlq_s32.c => vshlq_n_s32.c} | 8 +- .../mve/intrinsics/{vshlq_s8.c => vshlq_n_s8.c} | 8 +- .../mve/intrinsics/{vshlq_u16.c => vshlq_n_u16.c} | 8 +- .../mve/intrinsics/{vshlq_u32.c => vshlq_n_u32.c} | 8 +- .../mve/intrinsics/{vshlq_u8.c => vshlq_n_u8.c} | 8 +- .../mve/intrinsics/{vshlq_s16.c => vshlq_r_s16.c} | 8 +- .../mve/intrinsics/{vshlq_s32.c => vshlq_r_s32.c} | 8 +- .../mve/intrinsics/{vshlq_s8.c => vshlq_r_s8.c} | 8 +- .../mve/intrinsics/{vshlq_u16.c => vshlq_r_u16.c} | 8 +- .../mve/intrinsics/{vshlq_u32.c => vshlq_r_u32.c} | 8 +- .../mve/intrinsics/{vshlq_u8.c => vshlq_r_u8.c} | 8 +- .../gcc.target/arm/mve/intrinsics/vsubq_n_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vsubq_n_s32.c | 22 + .../mve/intrinsics/{vclsq_s8.c => vsubq_n_s8.c} | 12 +- .../gcc.target/arm/mve/intrinsics/vsubq_n_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vsubq_n_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vsubq_n_u8.c | 22 + .../mve/intrinsics/{vshlq_s16.c => vsubq_s16.c} | 8 +- .../mve/intrinsics/{vshlq_s32.c => vsubq_s32.c} | 8 +- .../arm/mve/intrinsics/{vshlq_s8.c => vsubq_s8.c} | 8 +- .../mve/intrinsics/{vcmpneq_u16.c => vsubq_u16.c} | 12 +- .../mve/intrinsics/{vcmpneq_u32.c => vsubq_u32.c} | 12 +- .../mve/intrinsics/{vcmpneq_u8.c => vsubq_u8.c} | 12 +- 367 files changed, 9609 insertions(+), 1268 deletions(-) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vabdq_s16.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vabdq_s32.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vabdq_s8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => vabdq_u16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => vabdq_u32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => vabdq_u8.c} (59%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vclsq_s8.c => vaddq_n_s8.c} (50%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vclzq_u8.c => vaddq_n_u8.c} (50%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vaddlvq_p_s32.c => vaddvq_p_s32. [...] create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vaddlvq_p_u32.c => vaddvq_p_u32. [...] create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vandq_s16.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vandq_s32.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vandq_s8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => vandq_u16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => vandq_u32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => vandq_u8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vbicq_s16.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vbicq_s32.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vbicq_s8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => vbicq_u16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => vbicq_u32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => vbicq_u8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbrsrq_n_f16.c => vbrsrq_n_s16.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbrsrq_n_f32.c => vbrsrq_n_s32.c} (50%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbrsrq_n_f16.c => vbrsrq_n_u16.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbrsrq_n_f32.c => vbrsrq_n_u32.c} (50%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vcaddq_rot270_s16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vcaddq_rot270_s32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vcaddq_rot270_s8.c} (62%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => vcaddq_rot270_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => vcaddq_rot270_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => vcaddq_rot270_u8 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vcaddq_rot90_s16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vcaddq_rot90_s32. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vcaddq_rot90_s8.c} (62%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => vcaddq_rot90_u1 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => vcaddq_rot90_u3 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => vcaddq_rot90_u8. [...] create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp32q.c => vcmpcsq_n_u8.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => vcmpcsq_u16.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => vcmpcsq_u32.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => vcmpcsq_u8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s16.c => vcmpeqq_n_s16.c} (73%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s32.c => vcmpeqq_n_s32.c} (73%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s8.c => vcmpeqq_n_s8.c} (73%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s16.c => vcmpeqq_n_u16.c} (72%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s32.c => vcmpeqq_n_u32.c} (72%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s8.c => vcmpeqq_n_u8.c} (73%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s16.c => vcmpeqq_s16.c} (87%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s32.c => vcmpeqq_s32.c} (87%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s8.c => vcmpeqq_s8.c} (87%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => vcmpeqq_u16.c} (87%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => vcmpeqq_u32.c} (87%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => vcmpeqq_u8.c} (87%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp32q.c => vcmpgeq_n_s16.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp32q.c => vcmpgeq_n_s32.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp32q.c => vcmpgeq_n_s8.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s16.c => vcmpgeq_s16.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s32.c => vcmpgeq_s32.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s8.c => vcmpgeq_s8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp32q.c => vcmpgtq_n_s16.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp32q.c => vcmpgtq_n_s32.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp32q.c => vcmpgtq_n_s8.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s16.c => vcmpgtq_s16.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s32.c => vcmpgtq_s32.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s8.c => vcmpgtq_s8.c} (64%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp32q.c => vcmphiq_n_u8.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => vcmphiq_u16.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => vcmphiq_u32.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => vcmphiq_u8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp32q.c => vcmpleq_n_s16.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp32q.c => vcmpleq_n_s32.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp32q.c => vcmpleq_n_s8.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s16.c => vcmpleq_s16.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s32.c => vcmpleq_s32.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s8.c => vcmpleq_s8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp32q.c => vcmpltq_n_s16.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp32q.c => vcmpltq_n_s32.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp32q.c => vcmpltq_n_s8.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s16.c => vcmpltq_s16.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s32.c => vcmpltq_s32.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s8.c => vcmpltq_s8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s16.c => vcmpneq_n_s16.c} (78%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s32.c => vcmpneq_n_s32.c} (78%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s8.c => vcmpneq_n_s8.c} (78%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s16.c => vcmpneq_n_u16.c} (78%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s32.c => vcmpneq_n_u32.c} (78%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s8.c => vcmpneq_n_u8.c} (78%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => veorq_s16.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => veorq_s32.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => veorq_s8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => veorq_u16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => veorq_u32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => veorq_u8.c} (59%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vhaddq_s16.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vhaddq_s32.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vhaddq_s8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => vhaddq_u16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => vhaddq_u32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => vhaddq_u8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vhcaddq_rot270_s1 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vhcaddq_rot270_s3 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vhcaddq_rot270_s8. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vhcaddq_rot90_s16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vhcaddq_rot90_s32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vhcaddq_rot90_s8.c} (61%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vhsubq_s16.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vhsubq_s32.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vhsubq_s8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => vhsubq_u16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => vhsubq_u32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => vhsubq_u8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_u16.c => vmaxaq_s16.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_u32.c => vmaxaq_s32.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_u8.c => vmaxaq_s8.c} (64%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vmaxq_s16.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vmaxq_s32.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vmaxq_s8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => vmaxq_u16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => vmaxq_u32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => vmaxq_u8.c} (59%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_u16.c => vminaq_s16.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_u32.c => vminaq_s32.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_u8.c => vminaq_s8.c} (64%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vminq_s16.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vminq_s32.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vminq_s8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => vminq_u16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => vminq_u32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => vminq_u8.c} (59%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vmladavq_s16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vmladavq_s32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vmladavq_s8.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => vmladavq_u16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => vmladavq_u32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => vmladavq_u8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s16.c => vmladavxq_s16.c} (57%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s32.c => vmladavxq_s32.c} (57%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s8.c => vmladavxq_s8.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vmlsdavq_s16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vmlsdavq_s32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vmlsdavq_s8.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s16.c => vmlsdavxq_s16.c} (57%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s32.c => vmlsdavxq_s32.c} (57%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s8.c => vmlsdavxq_s8.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vmulhq_s16.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vmulhq_s32.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vmulhq_s8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => vmulhq_u16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => vmulhq_u32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => vmulhq_u8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s16.c => vmullbq_int_s16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s32.c => vmullbq_int_s32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s8.c => vmullbq_int_s8.c} (57%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => vmullbq_int_u16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => vmullbq_int_u32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => vmullbq_int_u8.c} (57%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s16.c => vmulltq_int_s16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s32.c => vmulltq_int_s32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_s8.c => vmulltq_int_s8.c} (57%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => vmulltq_int_u16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => vmulltq_int_u32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => vmulltq_int_u8.c} (57%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vclsq_s8.c => vmulq_n_s8.c} (50%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vmulq_s16.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vmulq_s32.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vmulq_s8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => vmulq_u16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => vmulq_u32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => vmulq_u8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vornq_s16.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vornq_s32.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vornq_s8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => vornq_u16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => vornq_u32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => vornq_u8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vorrq_s16.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vorrq_s32.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vorrq_s8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => vorrq_u16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => vorrq_u32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => vorrq_u8.c} (59%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vqaddq_s16.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vqaddq_s32.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vqaddq_s8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => vqaddq_u16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => vqaddq_u32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => vqaddq_u8.c} (59%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vqdmulhq_s16.c} (62%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vqdmulhq_s32.c} (62%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vqdmulhq_s8.c} (62%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vqrdmulhq_s16.c} (61%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vqrdmulhq_s32.c} (61%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vqrdmulhq_s8.c} (62%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vqrshlq_s16.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vqrshlq_s32.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vqrshlq_s8.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_u16.c => vqrshlq_u16.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_u32.c => vqrshlq_u32.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_u8.c => vqrshlq_u8.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrev64q_s16.c => vqshlq_n_s16.c} (60%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshrq_n_s32.c => vqshlq_n_s32.c} (60%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vclsq_s8.c => vqshlq_n_s8.c} (61%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmvnq_u16.c => vqshlq_n_u16.c} (61%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vclzq_u32.c => vqshlq_n_u32.c} (61%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmvnq_u8.c => vqshlq_n_u8.c} (61%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vqshlq_s16.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vqshlq_s32.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vqshlq_s8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_u16.c => vqshlq_u16.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_u32.c => vqshlq_u32.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_u8.c => vqshlq_u8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrev64q_s16.c => vqshluq_n_s16.c} (55%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vqnegq_s32.c => vqshluq_n_s32.c} (55%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vclsq_s8.c => vqshluq_n_s8.c} (55%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vqsubq_s16.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vqsubq_s32.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vqsubq_s8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => vqsubq_u16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => vqsubq_u32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => vqsubq_u8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vrhaddq_s16.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vrhaddq_s32.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vrhaddq_s8.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => vrhaddq_u16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => vrhaddq_u32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => vrhaddq_u8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vrmulhq_s16.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vrmulhq_s32.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vrmulhq_s8.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => vrmulhq_u16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => vrmulhq_u32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => vrmulhq_u8.c} (59%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vrshlq_s16.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vrshlq_s32.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vrshlq_s8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_u16.c => vrshlq_u16.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_u32.c => vrshlq_u32.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_u8.c => vrshlq_u8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrev64q_s16.c => vrshrq_n_s16.c} (60%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshrq_n_s32.c => vrshrq_n_s32.c} (60%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vclsq_s8.c => vrshrq_n_s8.c} (61%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmvnq_u16.c => vrshrq_n_u16.c} (60%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vclzq_u32.c => vrshrq_n_u32.c} (60%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmvnq_u8.c => vrshrq_n_u8.c} (61%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vshlq_n_s16.c} (73%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vshlq_n_s32.c} (73%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vshlq_n_s8.c} (73%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_u16.c => vshlq_n_u16.c} (73%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_u32.c => vshlq_n_u32.c} (73%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_u8.c => vshlq_n_u8.c} (73%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vshlq_r_s16.c} (73%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vshlq_r_s32.c} (73%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vshlq_r_s8.c} (73%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_u16.c => vshlq_r_u16.c} (73%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_u32.c => vshlq_r_u32.c} (73%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_u8.c => vshlq_r_u8.c} (73%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s32.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vclsq_s8.c => vsubq_n_s8.c} (50%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s16.c => vsubq_s16.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s32.c => vsubq_s32.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_s8.c => vsubq_s8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u16.c => vsubq_u16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u32.c => vsubq_u32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_u8.c => vsubq_u8.c} (59%)