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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allnoconfig in repository toolchain/ci/llvm-project.
from 7ae3d335467 [lld] Fix trivial typos in comments adds e29a2e6be4e [PowerPC][LoopVectorize] Extend getRegisterClassForType to [...] adds df3f4e0d77e [X86] Fix an 8 bit testb being selected when folding a vola [...] adds 40a80a0a19f Lower TAGPstack with negative offset to SUBG. adds 19433b199d1 [OpenMP] Fix incorrect property of __has_attribute() macro adds 22cec48dacc [x86] add tests for concat self + shuffle; NFC adds b73fea6a7cf [NFC] Test commit, whitespace change adds 02f694b69a8 [NFC] Test commit, revert whitespace change adds 7b518dcb291 [OPENMP50]Support lastprivate conditional updates in inc/de [...] adds ca868002d31 [X86] Rename vec-strict-*-cmp.ll to vec-strict-cmp-*.ll to [...] adds 62f3403bfc1 [LegalizeTypes] Add widening support for STRICT_FSETCC/FSETCCS adds 317cbdad4d1 [lldb/Docs] Describe optional dependencies on build page. adds 6a0564adcfe [X86] Improve v4i32->v4f64 uint_to_fp for AVX1/AVX2 targets. adds 5518a02a83e llc/MIR: Fix setFunctionAttributes for MIR functions adds 14d25052a29 AMDGPU: Use ImmLeaf for inline immediate predicates adds a506efff182 AMDGPU: Use ImmLeaf adds 7f2db2917da AMDGPU: Fix legalizing f16 fpow adds 0b093f02120 GlobalISel: Start adding computeNumSignBits to GISelKnownBits adds 1060b9e23b8 GlobalISel: Correct result type for G_FCMP in lowerFPTOUI adds ee6b8722ffa GlobalISel: Fix unsupported legalize action adds f5329bfc76b [Diagnostic] make Wmisleading-indendation not warn about labels adds 24ee4edee8e [PowerPC][NFC] Rename record instructions to use _rec suffi [...] adds d8fd92eaaa3 [FileCheck] Remove FileCheck prefix in API adds 83d690a1498 Don't rely on 'l'(ell) modifiers to indicate a label reference adds 71a2a62163c [CMake] Pass symlink dependency to add_llvm_install_targets [...] adds 59fadc14eeb [NSArray] Remove a very old and deprecated formatter. adds b5e7f95cfbe [msan] Check qsort input. adds 08d17cb065d [X86] Move an enum definition into a header to simplify fut [...] adds 450073c639d Change the patterns to include the prefix '= ' so we don't [...] adds f3de8ab5cce GlobalISel: Implement lower for G_INTRINSIC_ROUND adds 26f714ff43e TableGen/GlobalISel: Handle default operands that are used adds 4e85ca9562a AMDGPU/GlobalISel: Replace handling of boolean values adds d4c9e133244 AMDGPU/GlobalISel: Select G_UADDE/G_USUBE adds c6fd16af2be Use FileCheck instead of grep adds 6904cd94867 Add Triple::isX86() adds 5e0e0e3ff05 [NFC] Fixes -Wrange-loop-analysis warnings adds 7ba4595c86b [msan] Fix underflow in qsort interceptor. adds 20f005d25f4 [CodeGen][ObjC] Push the properties of a protocol before pu [...] adds 52afc93c38c AMDGPU/GlobalISel: Legalize G_READCYCLECOUNTER adds 21f7b362095 [WebAssembly] Fix landingpad-only case in Emscripten EH adds e93b1ffc849 AMDGPU: Use default operands for clamp/omod adds 907cefe7214 Always deduce the lengths of contained parameter packs when [...] adds 452f6243c9b AMDGPU: Select llvm.amdgcn.interp.p2.f16 directly adds e8d9d202bc9 AMDGPU: Add run line to int_to_fp tests adds d877229b5b2 [NFC][Test] Add a test to verify the DAGCombine of fma adds e3750cafdb1 [mlir][Linalg] Add a linalg.reshape op adds dc7b84c66c1 AMDGPU/GlobalISel: Fix unused variable warning in release adds aa708763d30 [MC] Add parameter `Address` to MCInstPrinter::printInst adds 3d87d0b9257 [MC] Add parameter `Address` to MCInstrPrinter::printInstruction adds ff554a91790 Let PassBuilder Expose PassInstrumentationCallbacks adds 6598af4a54b [libc] Add __attribute__((always_inline)) to x86_64 syscall [...] adds 4c6a098ad52 [OpenMP] NFC: Fix trivial typos in comments adds 188f72ab20d [libc] Move implementations of strcat and strcpy to the str [...] adds 08de551f4f1 [APFloat] Fix fusedMultiplyAdd when `this` equals to `Addend` adds 9890cc2ef08 [lldb] Fix LLDB build after API change to printInst (D72172) adds 5a9c24b5721 Fix compiler extension example cmake integration adds 63a222e504c [APFloat] Fix out of scope usage of a pointer to local variable adds 4814b68b7ad [SystemZ] Fix python failure in test case adds ab1bcda851d [NFC] Use isX86() instead of getArch() adds d364815351a [lldb][NFC] Take a llvm::Triple in ClangASTContext constructor adds 051c4d5b7bc [LLD][ELF][AArch64] Do not use thunk for undefined weak symbol. adds 216796f234c [DebugInfo] Fix infinite loop caused by reading past debug_ [...] adds bd1dc6a3eb8 Fix "use of uninitialized variable" static analyzer warning [...] adds bcb47bbd721 Fix "use of uninitialized variable" static analyzer warning [...] adds c758e469231 Fix Wdocumentation warnings. NFCI. adds 27e6b171e0b [RISCV][Docs] Add RISC-V asm template argument modifiers adds c69ae835d0e [clangd] Add path mappings functionality adds cf4b9164ffd [gn build] Port c69ae835d0e adds 14cd4a5b324 [SystemZ] Extend fp-strict-alias test case adds 65fdb34219f [lldb][NFC] Use static_cast instead of reinterpret_cast whe [...] adds 6ff1ea3244c Fix "use of uninitialized variable" static analyzer warning. NFCI. adds 60e0120c913 [ARM] Improve codegen of volatile load/store of i64 adds 3b417b7cf73 Fix "pointer is null" static analyzer warning. NFCI. adds c0365aaaa4f [X86] Standardize shuffle match/lowering function names. NFC. adds e34801c8e6d [ARM][MVE] VPT Blocks: findVCMPToFoldIntoVPS adds a000f2e53f5 [clangd] Introduce bulletlists adds 3f2e3dc44b4 [OPENMP]Do not diagnose references to non-integral types fo [...] adds 58e2e92a57f [DAGCombiner] reduce shuffle of concat of same vector adds 3c7f740f284 [TypePromotion] Use SetVectors instead of PtrSets adds e334a3a60f1 [docs] NFC: Fix typos in documents adds a428386d4a8 AMDGPU/GlobalISel: Partially fix llvm.amdgcn.kill pattern import adds f26ed6e47cb llc: Change behavior of -mcpu with existing attribute adds e130eef5881 OpaquePtr: print byval types containing anonymous types correctly. adds 9150d6bd738 AMDGPU/GlobalISel: Select llvm.amdgcn.wqm.vote adds e699c03c9be AMDGPU/GlobalISel: Fix import of s_abs_i32 pattern adds f8962571f70 [InstCombine] try to pull 'not' of select into compare operands adds 9daa44c9935 Remove extraneous spaces adds 78b30a54c97 AMDGPU/GlobalISel: Fix readfirstlane pattern import adds ee811808a9a [ARM][MVE] Renamed VPT Block tests and files to something m [...] adds 9f2d8b5c0cd [HIP] Add option --gpu-max-threads-per-block=n adds a3832f33d93 [AIX][XCOFF]Implement mergeable const adds 247a6032549 [LifetimeAnalysis] Do not forbid void deref type in gsl::Po [...] adds 46ac6a4dcd9 [analyzer] Update help text to reflect sarif support adds 0e912e22b63 [X86] Pull out repeated SrcVT.getVectorNumElements() call. NFCI. adds 55de6fc0b66 [ARM] Regenerate bfi.ll test cases adds 57835d01984 [lldb] Initialize some bitfields in FuncUnwinders.cpp adds 751d4dae328 [clangd] Assert that the testcases in LocateSymbol.All have [...] adds 16f47cf607c [clangd] Heuristically resolve dependent call through smart [...]
No new revisions were added by this update.
Summary of changes: clang-tools-extra/clangd/CMakeLists.txt | 1 + clang-tools-extra/clangd/FindTarget.cpp | 72 +- clang-tools-extra/clangd/FormattedString.cpp | 43 + clang-tools-extra/clangd/FormattedString.h | 18 +- clang-tools-extra/clangd/PathMapping.cpp | 199 +++++ clang-tools-extra/clangd/PathMapping.h | 67 ++ .../clangd/test/Inputs/path-mappings/server/foo.h | 4 + clang-tools-extra/clangd/test/path-mappings.test | 64 ++ clang-tools-extra/clangd/tool/ClangdMain.cpp | 23 +- clang-tools-extra/clangd/unittests/CMakeLists.txt | 1 + .../clangd/unittests/FormattedStringTests.cpp | 65 ++ .../clangd/unittests/PathMappingTests.cpp | 216 +++++ clang-tools-extra/clangd/unittests/XRefsTests.cpp | 88 +- clang/include/clang/Basic/AttrDocs.td | 4 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 10 +- clang/include/clang/Basic/LangOptions.def | 1 + clang/include/clang/Basic/TargetInfo.h | 8 +- clang/include/clang/Driver/Options.td | 5 +- clang/lib/AST/Comment.cpp | 6 +- clang/lib/AST/Mangle.cpp | 4 +- clang/lib/AST/MicrosoftMangle.cpp | 4 +- clang/lib/CodeGen/CGBuiltin.cpp | 3 +- clang/lib/CodeGen/CGExpr.cpp | 3 + clang/lib/CodeGen/CGExprScalar.cpp | 21 +- clang/lib/CodeGen/CGObjCMac.cpp | 6 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 39 +- clang/lib/CodeGen/CGOpenMPRuntime.h | 5 + clang/lib/CodeGen/CGStmtOpenMP.cpp | 6 + clang/lib/CodeGen/CodeGenFunction.cpp | 5 +- clang/lib/CodeGen/TargetInfo.cpp | 7 +- clang/lib/Driver/ToolChains/Arch/X86.cpp | 3 +- clang/lib/Driver/ToolChains/Clang.cpp | 9 +- clang/lib/Driver/ToolChains/Darwin.cpp | 12 +- clang/lib/Driver/ToolChains/FreeBSD.cpp | 7 +- clang/lib/Driver/ToolChains/HIP.cpp | 8 + clang/lib/Frontend/CompilerInvocation.cpp | 8 +- clang/lib/Parse/ParseStmt.cpp | 10 +- clang/lib/Parse/ParseStmtAsm.cpp | 5 +- clang/lib/Sema/SemaDeclAttr.cpp | 8 +- clang/lib/Sema/SemaExpr.cpp | 3 +- clang/lib/Sema/SemaOpenMP.cpp | 4 +- clang/lib/Sema/SemaOverload.cpp | 16 + clang/lib/Sema/SemaTemplateDeduction.cpp | 39 +- clang/test/CXX/drs/dr13xx.cpp | 4 +- .../temp.deduct/temp.deduct.type/p5-0x.cpp | 31 + clang/test/CodeGenCUDA/amdgpu-kernel-attrs.cu | 22 +- clang/test/CodeGenObjC/encode-test-2.m | 31 +- clang/test/Driver/hip-options.hip | 10 + clang/test/OpenMP/declare_simd_messages.cpp | 3 +- clang/test/OpenMP/for_lastprivate_codegen.cpp | 15 +- clang/test/OpenMP/sections_lastprivate_codegen.cpp | 65 +- clang/test/Parser/warn-misleading-indentation.cpp | 7 + clang/test/SemaCXX/attr-gsl-owner-pointer.cpp | 6 +- clang/test/SemaTemplate/alias-templates.cpp | 6 +- clang/test/SemaTemplate/deduction.cpp | 4 +- clang/test/SemaTemplate/pack-deduction.cpp | 4 +- .../sanitizer_common_interceptors.inc | 18 + compiler-rt/test/msan/qsort.cpp | 12 + libc/config/linux/x86_64/syscall.h.inc | 24 +- libc/src/string/CMakeLists.txt | 22 +- libc/src/string/{strcat => }/strcat.cpp | 4 +- libc/src/string/{strcat => }/strcat.h | 0 libc/src/string/strcat/CMakeLists.txt | 10 - libc/src/string/{strcpy => }/strcpy.cpp | 2 +- libc/src/string/{strcpy => }/strcpy.h | 0 libc/src/string/strcpy/CMakeLists.txt | 9 - libc/test/src/string/strcat_test.cpp | 2 +- libc/test/src/string/strcpy_test.cpp | 2 +- lld/ELF/Arch/AArch64.cpp | 4 + lld/test/ELF/aarch64-undefined-weak.s | 34 +- lld/test/ELF/arm-undefined-weak.s | 23 +- lldb/docs/resources/build.rst | 36 +- lldb/include/lldb/Host/HostInfoBase.h | 6 +- lldb/include/lldb/Symbol/ClangASTContext.h | 2 +- .../TestCallOverriddenMethod.py | 10 +- lldb/source/API/SBEvent.cpp | 2 +- lldb/source/Core/Debugger.cpp | 4 +- lldb/source/Host/common/HostInfoBase.cpp | 6 +- lldb/source/Host/common/NativeProcessProtocol.cpp | 4 +- lldb/source/Host/macosx/objcxx/Host.mm | 4 +- lldb/source/Host/posix/PipePosix.cpp | 9 +- .../Disassembler/llvm/DisassemblerLLVMC.cpp | 4 +- .../Clang/ASTResultSynthesizer.cpp | 3 +- .../ExpressionParser/Clang/ClangDeclVendor.cpp | 3 +- lldb/source/Plugins/Language/ObjC/NSArray.cpp | 27 - .../ObjC/AppleObjCRuntime/AppleObjCDeclVendor.cpp | 4 +- .../ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp | 2 +- .../AppleObjCTypeEncodingParser.cpp | 4 +- .../GDBRemoteCommunicationServerLLGS.cpp | 2 +- lldb/source/Symbol/ClangASTContext.cpp | 6 +- lldb/source/Symbol/FuncUnwinders.cpp | 2 + lldb/source/Target/Target.cpp | 18 +- lldb/source/Utility/DataExtractor.cpp | 7 +- lldb/source/Utility/Environment.cpp | 4 +- lldb/source/Utility/Scalar.cpp | 14 +- lldb/source/Utility/StreamString.cpp | 2 +- .../source/MacOSX/DarwinLog/DarwinLogCollector.cpp | 7 +- .../tools/debugserver/source/MacOSX/MachProcess.mm | 51 +- .../tools/debugserver/source/MacOSX/MachThread.cpp | 2 +- lldb/unittests/Symbol/TestClangASTContext.cpp | 3 +- llvm/cmake/modules/AddLLVM.cmake | 17 +- llvm/docs/AMDGPUUsage.rst | 2 +- llvm/docs/Atomics.rst | 2 +- llvm/docs/Frontend/PerformanceTips.rst | 2 +- llvm/docs/GlobalISel/GenericOpcode.rst | 2 +- llvm/docs/HowToBuildWithPGO.rst | 2 +- llvm/docs/LangRef.rst | 9 +- llvm/docs/ORCv2.rst | 4 +- llvm/docs/Passes.rst | 2 +- llvm/docs/SourceLevelDebugging.rst | 2 +- llvm/examples/Bye/CMakeLists.txt | 6 + llvm/include/llvm/ADT/APFloat.h | 3 +- llvm/include/llvm/ADT/Triple.h | 5 + llvm/include/llvm/CodeGen/CommandFlags.inc | 82 +- .../llvm/CodeGen/GlobalISel/GISelKnownBits.h | 4 + .../llvm/CodeGen/GlobalISel/LegalizerHelper.h | 1 + .../llvm/CodeGen/GlobalISel/LegalizerInfo.h | 1 + .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 6 + llvm/include/llvm/CodeGen/MIRParser/MIRParser.h | 14 +- llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h | 12 +- llvm/include/llvm/MC/MCInstPrinter.h | 4 +- llvm/include/llvm/MC/MCStreamer.h | 5 +- llvm/include/llvm/Passes/PassBuilder.h | 7 + llvm/lib/Analysis/TargetLibraryInfo.cpp | 6 +- .../lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp | 35 +- llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 70 ++ llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 33 +- llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 45 +- llvm/lib/CodeGen/ReachingDefAnalysis.cpp | 2 - llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 24 + llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h | 2 + .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 84 ++ llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 2 +- llvm/lib/CodeGen/TypePromotion.cpp | 70 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp | 19 +- llvm/lib/IR/AsmWriter.cpp | 47 +- llvm/lib/IR/AutoUpgrade.cpp | 4 +- llvm/lib/MC/MCAsmStreamer.cpp | 4 +- llvm/lib/MC/MCDisassembler/Disassembler.cpp | 3 +- llvm/lib/MC/MCObjectFileInfo.cpp | 5 +- llvm/lib/MC/MCStreamer.cpp | 7 +- llvm/lib/Support/APFloat.cpp | 19 +- llvm/lib/Support/FileCheck.cpp | 272 +++--- llvm/lib/Support/FileCheckImpl.h | 163 ++-- .../Target/AArch64/AArch64ExpandPseudoInsts.cpp | 6 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 9 +- .../AArch64/MCTargetDesc/AArch64InstPrinter.cpp | 15 +- .../AArch64/MCTargetDesc/AArch64InstPrinter.h | 16 +- .../Target/AMDGPU/AMDGPUGenRegisterBankInfo.def | 110 ++- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 16 + .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 195 ++--- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 12 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 36 +- llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 389 ++++++--- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h | 4 + llvm/lib/Target/AMDGPU/AMDGPURegisterBanks.td | 2 - .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 14 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h | 14 +- llvm/lib/Target/AMDGPU/R600InstrInfo.cpp | 2 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 17 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 4 + llvm/lib/Target/AMDGPU/SIInstrInfo.td | 63 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 21 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 8 - llvm/lib/Target/AMDGPU/SOPInstructions.td | 6 +- llvm/lib/Target/AMDGPU/VOP1Instructions.td | 2 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 22 +- .../lib/Target/ARC/MCTargetDesc/ARCInstPrinter.cpp | 7 +- llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.h | 6 +- llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 18 + llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp | 49 ++ llvm/lib/Target/ARM/ARMISelLowering.cpp | 57 +- llvm/lib/Target/ARM/ARMISelLowering.h | 8 +- llvm/lib/Target/ARM/ARMInstrInfo.td | 27 + llvm/lib/Target/ARM/ARMInstrThumb2.td | 9 +- .../lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp | 11 +- llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h | 8 +- llvm/lib/Target/ARM/MVEVPTBlockPass.cpp | 72 +- .../lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp | 7 +- llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.h | 6 +- .../lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp | 7 +- llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.h | 6 +- .../Hexagon/MCTargetDesc/HexagonInstPrinter.cpp | 11 +- .../Hexagon/MCTargetDesc/HexagonInstPrinter.h | 6 +- .../Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp | 7 +- .../Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp | 7 +- .../Target/Lanai/MCTargetDesc/LanaiInstPrinter.h | 6 +- .../MSP430/MCTargetDesc/MSP430InstPrinter.cpp | 7 +- .../Target/MSP430/MCTargetDesc/MSP430InstPrinter.h | 6 +- .../Target/Mips/MCTargetDesc/MipsInstPrinter.cpp | 7 +- .../lib/Target/Mips/MCTargetDesc/MipsInstPrinter.h | 6 +- .../Mips/MCTargetDesc/MipsNaClELFStreamer.cpp | 4 +- .../Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp | 7 +- .../Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h | 6 +- llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 88 +- .../Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp | 8 +- .../Target/PowerPC/MCTargetDesc/PPCInstPrinter.h | 6 +- llvm/lib/Target/PowerPC/P9InstrResources.td | 216 ++--- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 3 +- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 77 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 31 +- llvm/lib/Target/PowerPC/PPCISelLowering.h | 923 +++++++++++---------- llvm/lib/Target/PowerPC/PPCInstr64Bit.td | 14 +- llvm/lib/Target/PowerPC/PPCInstrAltivec.td | 70 +- llvm/lib/Target/PowerPC/PPCInstrFormats.td | 38 +- llvm/lib/Target/PowerPC/PPCInstrHTM.td | 16 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 284 ++++--- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 238 +++--- llvm/lib/Target/PowerPC/PPCInstrVSX.td | 20 +- llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 42 +- llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 12 +- .../Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp | 7 +- .../Target/RISCV/MCTargetDesc/RISCVInstPrinter.h | 8 +- .../Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp | 7 +- .../Target/Sparc/MCTargetDesc/SparcInstPrinter.h | 8 +- .../SystemZ/MCTargetDesc/SystemZInstPrinter.cpp | 8 +- .../SystemZ/MCTargetDesc/SystemZInstPrinter.h | 6 +- .../MCTargetDesc/WebAssemblyInstPrinter.cpp | 7 +- .../MCTargetDesc/WebAssemblyInstPrinter.h | 6 +- .../WebAssemblyLowerEmscriptenEHSjLj.cpp | 2 +- .../Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp | 7 +- .../Target/X86/MCTargetDesc/X86ATTInstPrinter.h | 6 +- llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 39 +- llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 11 + .../X86/MCTargetDesc/X86IntelInstPrinter.cpp | 8 +- .../Target/X86/MCTargetDesc/X86IntelInstPrinter.h | 6 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 11 + llvm/lib/Target/X86/X86ISelLowering.cpp | 96 ++- .../Target/XCore/MCTargetDesc/XCoreInstPrinter.cpp | 7 +- .../Target/XCore/MCTargetDesc/XCoreInstPrinter.h | 6 +- llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp | 3 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 17 + .../Transforms/Instrumentation/MemorySanitizer.cpp | 4 +- llvm/test/Assembler/byval-type-attr.ll | 12 + llvm/test/CodeGen/AArch64/addg_subg.mir | 37 + .../CodeGen/AMDGPU/GlobalISel/bool-legalization.ll | 105 +++ .../CodeGen/AMDGPU/GlobalISel/inst-select-abs.mir | 105 +++ .../inst-select-amdgcn.readfirstlane.mir | 63 ++ .../CodeGen/AMDGPU/GlobalISel/inst-select-and.mir | 85 +- .../AMDGPU/GlobalISel/inst-select-anyext.mir | 152 ++-- .../AMDGPU/GlobalISel/inst-select-brcond.mir | 8 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir | 113 +-- .../CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.mir | 28 + .../CodeGen/AMDGPU/GlobalISel/inst-select-icmp.mir | 44 +- .../AMDGPU/GlobalISel/inst-select-icmp.s64.mir | 309 +++---- .../AMDGPU/GlobalISel/inst-select-implicit-def.mir | 19 - .../CodeGen/AMDGPU/GlobalISel/inst-select-or.mir | 79 +- .../AMDGPU/GlobalISel/inst-select-phi-invalid.mir | 31 - .../CodeGen/AMDGPU/GlobalISel/inst-select-phi.mir | 36 +- .../AMDGPU/GlobalISel/inst-select-select.mir | 16 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir | 92 +- .../AMDGPU/GlobalISel/inst-select-trunc.mir | 16 + .../AMDGPU/GlobalISel/inst-select-uadde.gfx10.mir | 70 ++ .../AMDGPU/GlobalISel/inst-select-uadde.mir | 89 ++ .../AMDGPU/GlobalISel/inst-select-uaddo.mir | 10 +- .../AMDGPU/GlobalISel/inst-select-usube.gfx10.mir | 70 ++ .../AMDGPU/GlobalISel/inst-select-usube.mir | 89 ++ .../AMDGPU/GlobalISel/inst-select-usubo.mir | 10 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir | 80 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir | 92 +- .../CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir | 57 +- .../AMDGPU/GlobalISel/legalize-intrinsic-round.mir | 802 +++++++++++++++++- .../AMDGPU/GlobalISel/legalize-jump-table.mir | 78 ++ .../AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll | 3 + .../AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll | 3 + .../AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll | 1 + .../AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll | 1 + .../AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll | 6 + .../AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll | 6 + .../AMDGPU/GlobalISel/llvm.amdgcn.wqm.vote.ll | 3 + .../CodeGen/AMDGPU/GlobalISel/readcyclecounter.ll | 3 + .../GlobalISel/regbankselect-amdgcn.div.fmas.mir | 5 +- .../GlobalISel/regbankselect-amdgcn.kill.mir | 5 +- .../GlobalISel/regbankselect-amdgcn.wqm.vote.mir | 5 +- .../AMDGPU/GlobalISel/regbankselect-and-s1.mir | 519 ++++-------- .../AMDGPU/GlobalISel/regbankselect-anyext.mir | 21 +- .../AMDGPU/GlobalISel/regbankselect-brcond.mir | 30 +- .../AMDGPU/GlobalISel/regbankselect-icmp.mir | 12 +- .../GlobalISel/regbankselect-intrinsic-round.mir | 31 - .../CodeGen/AMDGPU/GlobalISel/regbankselect-or.mir | 38 +- .../AMDGPU/GlobalISel/regbankselect-phi-s1.mir | 628 ++++++++------ .../AMDGPU/GlobalISel/regbankselect-phi.mir | 686 +++++++++------ .../AMDGPU/GlobalISel/regbankselect-sadde.mir | 46 +- .../AMDGPU/GlobalISel/regbankselect-select.mir | 334 +++++--- .../AMDGPU/GlobalISel/regbankselect-sext.mir | 61 +- .../AMDGPU/GlobalISel/regbankselect-smax.mir | 40 +- .../AMDGPU/GlobalISel/regbankselect-smin.mir | 40 +- .../AMDGPU/GlobalISel/regbankselect-ssube.mir | 46 +- .../AMDGPU/GlobalISel/regbankselect-trunc.mir | 4 +- .../AMDGPU/GlobalISel/regbankselect-uadde.mir | 46 +- .../AMDGPU/GlobalISel/regbankselect-uaddo.mir | 3 +- .../AMDGPU/GlobalISel/regbankselect-umax.mir | 40 +- .../AMDGPU/GlobalISel/regbankselect-umin.mir | 40 +- .../AMDGPU/GlobalISel/regbankselect-usube.mir | 46 +- .../AMDGPU/GlobalISel/regbankselect-usubo.mir | 3 +- .../AMDGPU/GlobalISel/regbankselect-xor.mir | 61 +- .../AMDGPU/GlobalISel/regbankselect-zext.mir | 60 +- llvm/test/CodeGen/AMDGPU/fpow.ll | 562 +++++++++++++ llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.vote.ll | 21 +- .../AMDGPU/memory-legalizer-atomic-insert-end.mir | 11 +- llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll | 69 +- llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll | 97 ++- llvm/test/CodeGen/ARM/O3-pipeline.ll | 1 + llvm/test/CodeGen/ARM/bfi.ll | 101 ++- llvm/test/CodeGen/ARM/i64_volatile_load_store.ll | 180 ++++ .../AMDGPU/llc-target-cpu-attr-from-cmdline-ir.mir | 58 ++ .../AMDGPU/llc-target-cpu-attr-from-cmdline.mir | 23 + .../GlobalISel/legalizer/fptosi_and_fptoui.mir | 108 ++- .../Mips/GlobalISel/llvm-ir/fptosi_and_fptoui.ll | 9 + .../CodeGen/PowerPC/aix-xcoff-mergeable-const.ll | 166 ++++ llvm/test/CodeGen/PowerPC/block-placement.mir | 2 +- .../convert-rr-to-ri-instrs-out-of-range.mir | 100 +-- .../CodeGen/PowerPC/convert-rr-to-ri-instrs.mir | 170 ++-- llvm/test/CodeGen/PowerPC/fma-combine.ll | 143 ++++ llvm/test/CodeGen/PowerPC/fold-rlwinm.mir | 8 +- llvm/test/CodeGen/PowerPC/ifcvt-diamond-ret.mir | 4 +- llvm/test/CodeGen/PowerPC/opt-cmp-inst-cr0-live.ll | 16 +- .../test/CodeGen/PowerPC/opt-sub-inst-cr0-live.mir | 2 +- .../PowerPC/peephole-miscompile-extswsli.mir | 6 +- .../test/CodeGen/PowerPC/rlwinm_rldicl_to_andi.mir | 24 +- llvm/test/CodeGen/SystemZ/Large/spill-02.py | 2 +- llvm/test/CodeGen/SystemZ/fp-strict-alias.ll | 99 ++- ...vpt-block6.mir => mve-vpt-2-blocks-2-preds.mir} | 6 +- ...t-block7.mir => mve-vpt-2-blocks-ctrl-flow.mir} | 6 +- ...ir => mve-vpt-2-blocks-non-consecutive-ins.mir} | 9 +- .../{mve-vpt-block4.mir => mve-vpt-2-blocks.mir} | 7 +- ...pt-block8.mir => mve-vpt-3-blocks-kill-vpr.mir} | 6 +- .../{mve-vpt-block.mir => mve-vpt-block-1-ins.mir} | 6 +- ...{mve-vpt-block2.mir => mve-vpt-block-2-ins.mir} | 7 +- ...{mve-vpt-block3.mir => mve-vpt-block-4-ins.mir} | 7 +- .../CodeGen/Thumb2/mve-vpt-block-fold-vcmp.mir | 128 +++ ...mve-vpt-block.mir => mve-vpt-block-optnone.mir} | 10 +- .../WebAssembly/lower-em-exceptions-lpad-only.ll | 25 + llvm/test/CodeGen/X86/avoid-sfb-overlaps.ll | 9 +- llvm/test/CodeGen/X86/avoid-sfb.ll | 13 +- llvm/test/CodeGen/X86/callbr-asm.ll | 30 +- llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll | 6 +- .../test/CodeGen/X86/select-testb-volatile-load.ll | 33 + ...vec-strict-128-cmp.ll => vec-strict-cmp-128.ll} | 0 ...vec-strict-256-cmp.ll => vec-strict-cmp-256.ll} | 0 ...vec-strict-512-cmp.ll => vec-strict-cmp-512.ll} | 0 llvm/test/CodeGen/X86/vec-strict-cmp-sub128.ll | 308 +++++++ llvm/test/CodeGen/X86/vec-strict-inttofp-256.ll | 43 +- llvm/test/CodeGen/X86/vec_int_to_fp.ll | 109 ++- llvm/test/CodeGen/X86/vec_uint_to_fp.ll | 4 +- .../X86/vector-constrained-fp-intrinsics.ll | 12 +- .../CodeGen/X86/vector-shuffle-combining-avx.ll | 57 ++ llvm/test/DebugInfo/COFF/inlining-files.ll | 2 +- llvm/test/DebugInfo/COFF/inlining-header.ll | 2 +- llvm/test/Other/opt-override-mcpu-mattr.ll | 16 +- llvm/test/TableGen/DefaultOpsGlobalISel.td | 144 ++++ llvm/test/Transforms/InstCombine/not.ll | 19 +- .../Transforms/LoopVectorize/PowerPC/reg-usage.ll | 15 +- .../X86/tail_folding_and_assume_safety.ll | 6 +- .../test/tools/llvm-objdump/AMDGPU/source-lines.ll | 2 +- llvm/tools/llc/llc.cpp | 11 +- llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp | 2 +- llvm/tools/llvm-exegesis/lib/Analysis.cpp | 2 +- llvm/tools/llvm-mca/Views/BottleneckAnalysis.cpp | 2 +- llvm/tools/llvm-mca/Views/InstructionInfoView.cpp | 2 +- llvm/tools/llvm-mca/Views/ResourcePressureView.cpp | 2 +- llvm/tools/llvm-mca/Views/TimelineView.cpp | 4 +- llvm/tools/llvm-mca/llvm-mca.cpp | 2 +- llvm/tools/llvm-objdump/MachODump.cpp | 13 +- llvm/tools/llvm-objdump/llvm-objdump.cpp | 8 +- llvm/unittests/ADT/APFloatTest.cpp | 8 + .../unittests/CodeGen/GlobalISel/KnownBitsTest.cpp | 78 ++ .../DebugInfo/DWARF/DWARFDebugLineTest.cpp | 29 + llvm/unittests/IR/PassBuilderCallbacksTest.cpp | 3 + llvm/unittests/Support/FileCheckTest.cpp | 144 ++-- llvm/unittests/Support/ReverseIterationTest.cpp | 4 +- llvm/utils/TableGen/AsmWriterEmitter.cpp | 15 +- llvm/utils/TableGen/GlobalISelEmitter.cpp | 44 +- .../gn/secondary/clang-tools-extra/clangd/BUILD.gn | 1 + .../clang-tools-extra/clangd/unittests/BUILD.gn | 1 + mlir/include/mlir/Dialect/Linalg/EDSC/Intrinsics.h | 1 + mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td | 52 ++ mlir/include/mlir/IR/AffineExpr.h | 19 +- mlir/include/mlir/IR/StandardTypes.h | 14 + mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 203 ++++- mlir/lib/IR/StandardTypes.cpp | 38 +- mlir/test/Dialect/Linalg/invalid.mlir | 46 + mlir/test/Dialect/Linalg/roundtrip.mlir | 100 ++- openmp/libomptarget/deviceRTLs/common/debug.h | 2 +- openmp/libomptarget/deviceRTLs/common/omptarget.h | 6 +- .../libomptarget/deviceRTLs/common/src/libcall.cu | 4 +- .../deviceRTLs/common/src/omptarget.cu | 2 +- .../libomptarget/deviceRTLs/common/src/parallel.cu | 2 +- openmp/libomptarget/deviceRTLs/common/src/task.cu | 6 +- .../deviceRTLs/nvptx/test/parallel/level.c | 4 +- openmp/libomptarget/plugins/cuda/src/rtl.cpp | 6 +- openmp/libomptarget/src/private.h | 2 +- openmp/runtime/cmake/LibompMicroTests.cmake | 2 +- openmp/runtime/cmake/config-ix.cmake | 2 +- openmp/runtime/src/extractExternal.cpp | 2 +- openmp/runtime/src/i18n/en_US.txt | 2 +- openmp/runtime/src/include/omp_lib.f.var | 2 +- openmp/runtime/src/kmp.h | 10 +- openmp/runtime/src/kmp_affinity.cpp | 4 +- openmp/runtime/src/kmp_atomic.cpp | 2 +- openmp/runtime/src/kmp_dispatch.cpp | 6 +- openmp/runtime/src/kmp_gsupport.cpp | 4 +- openmp/runtime/src/kmp_itt.inl | 4 +- openmp/runtime/src/kmp_lock.h | 2 +- openmp/runtime/src/kmp_os.h | 2 +- openmp/runtime/src/kmp_runtime.cpp | 4 +- openmp/runtime/src/kmp_settings.cpp | 6 +- openmp/runtime/src/kmp_stats.cpp | 2 +- openmp/runtime/src/kmp_taskdeps.cpp | 2 +- openmp/runtime/src/kmp_tasking.cpp | 7 +- openmp/runtime/src/kmp_wrapper_malloc.h | 2 +- .../runtime/src/thirdparty/ittnotify/ittnotify.h | 12 +- .../src/thirdparty/ittnotify/ittnotify_static.cpp | 2 +- .../src/thirdparty/ittnotify/legacy/ittnotify.h | 4 +- openmp/runtime/test/ompt/synchronization/lock.c | 2 +- .../runtime/test/ompt/synchronization/nest_lock.c | 2 +- .../runtime/test/threadprivate/omp_threadprivate.c | 2 +- openmp/runtime/tools/check-depends.pl | 6 +- openmp/runtime/tools/generate-def.pl | 2 +- openmp/runtime/tools/lib/Uname.pm | 2 +- openmp/runtime/tools/lib/tools.pm | 4 +- openmp/runtime/tools/message-converter.pl | 6 +- openmp/tools/archer/tests/races/task-dependency.c | 2 +- 424 files changed, 11135 insertions(+), 5153 deletions(-) create mode 100644 clang-tools-extra/clangd/PathMapping.cpp create mode 100644 clang-tools-extra/clangd/PathMapping.h create mode 100644 clang-tools-extra/clangd/test/Inputs/path-mappings/server/foo.h create mode 100644 clang-tools-extra/clangd/test/path-mappings.test create mode 100644 clang-tools-extra/clangd/unittests/PathMappingTests.cpp create mode 100644 clang/test/Driver/hip-options.hip rename libc/src/string/{strcat => }/strcat.cpp (90%) rename libc/src/string/{strcat => }/strcat.h (100%) delete mode 100644 libc/src/string/strcat/CMakeLists.txt rename libc/src/string/{strcpy => }/strcpy.cpp (94%) rename libc/src/string/{strcpy => }/strcpy.h (100%) delete mode 100644 libc/src/string/strcpy/CMakeLists.txt create mode 100644 llvm/test/CodeGen/AArch64/addg_subg.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-abs.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.readfirs [...] delete mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-phi-invalid.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uadde.gfx10.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uadde.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-usube.gfx10.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-usube.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-jump-table.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.vote.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/readcyclecounter.ll delete mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-intrinsic-round.mir create mode 100644 llvm/test/CodeGen/AMDGPU/fpow.ll create mode 100644 llvm/test/CodeGen/ARM/i64_volatile_load_store.ll create mode 100644 llvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline-ir.mir create mode 100644 llvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline.mir create mode 100644 llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll create mode 100644 llvm/test/CodeGen/PowerPC/fma-combine.ll rename llvm/test/CodeGen/Thumb2/{mve-vpt-block6.mir => mve-vpt-2-blocks-2-preds.mi [...] rename llvm/test/CodeGen/Thumb2/{mve-vpt-block7.mir => mve-vpt-2-blocks-ctrl-flow. [...] rename llvm/test/CodeGen/Thumb2/{mve-vpt-block5.mir => mve-vpt-2-blocks-non-consec [...] rename llvm/test/CodeGen/Thumb2/{mve-vpt-block4.mir => mve-vpt-2-blocks.mir} (94%) rename llvm/test/CodeGen/Thumb2/{mve-vpt-block8.mir => mve-vpt-3-blocks-kill-vpr.m [...] copy llvm/test/CodeGen/Thumb2/{mve-vpt-block.mir => mve-vpt-block-1-ins.mir} (92%) rename llvm/test/CodeGen/Thumb2/{mve-vpt-block2.mir => mve-vpt-block-2-ins.mir} (92%) rename llvm/test/CodeGen/Thumb2/{mve-vpt-block3.mir => mve-vpt-block-4-ins.mir} (93%) create mode 100644 llvm/test/CodeGen/Thumb2/mve-vpt-block-fold-vcmp.mir rename llvm/test/CodeGen/Thumb2/{mve-vpt-block.mir => mve-vpt-block-optnone.mir} (68%) create mode 100644 llvm/test/CodeGen/WebAssembly/lower-em-exceptions-lpad-only.ll create mode 100644 llvm/test/CodeGen/X86/select-testb-volatile-load.ll rename llvm/test/CodeGen/X86/{vec-strict-128-cmp.ll => vec-strict-cmp-128.ll} (100%) rename llvm/test/CodeGen/X86/{vec-strict-256-cmp.ll => vec-strict-cmp-256.ll} (100%) rename llvm/test/CodeGen/X86/{vec-strict-512-cmp.ll => vec-strict-cmp-512.ll} (100%) create mode 100644 llvm/test/CodeGen/X86/vec-strict-cmp-sub128.ll create mode 100644 llvm/test/TableGen/DefaultOpsGlobalISel.td