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from 53208ba3c03 AMDGPU: Fix i16 arithmetic pattern redundancy new 7be5366d0dd [BPF] do compile-once run-everywhere relocation for bitfields
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Summary of changes: include/llvm/IR/IntrinsicsBPF.td | 3 + lib/Target/BPF/BPF.h | 2 +- lib/Target/BPF/BPFAbstractMemberAccess.cpp | 332 ++++++++++++++++++--- lib/Target/BPF/BPFCORE.h | 10 + lib/Target/BPF/BPFTargetMachine.cpp | 2 +- lib/Target/BPF/BTF.h | 29 +- lib/Target/BPF/BTFDebug.cpp | 81 ++--- lib/Target/BPF/BTFDebug.h | 11 +- test/CodeGen/BPF/CORE/intrinsic-array.ll | 5 +- .../BPF/CORE/intrinsic-fieldinfo-byte-size-1.ll | 148 +++++++++ .../BPF/CORE/intrinsic-fieldinfo-byte-size-2.ll | 138 +++++++++ .../BPF/CORE/intrinsic-fieldinfo-byte-size-3.ll | 130 ++++++++ .../BPF/CORE/intrinsic-fieldinfo-existence-1.ll | 162 ++++++++++ .../BPF/CORE/intrinsic-fieldinfo-existence-2.ll | 121 ++++++++ .../BPF/CORE/intrinsic-fieldinfo-existence-3.ll | 129 ++++++++ .../BPF/CORE/intrinsic-fieldinfo-lshift-1.ll | 153 ++++++++++ .../BPF/CORE/intrinsic-fieldinfo-lshift-2.ll | 122 ++++++++ .../BPF/CORE/intrinsic-fieldinfo-rshift-1.ll | 148 +++++++++ .../BPF/CORE/intrinsic-fieldinfo-rshift-2.ll | 121 ++++++++ .../BPF/CORE/intrinsic-fieldinfo-rshift-3.ll | 131 ++++++++ .../BPF/CORE/intrinsic-fieldinfo-signedness-1.ll | 162 ++++++++++ .../BPF/CORE/intrinsic-fieldinfo-signedness-2.ll | 151 ++++++++++ .../BPF/CORE/intrinsic-fieldinfo-signedness-3.ll | 149 +++++++++ test/CodeGen/BPF/CORE/intrinsic-struct.ll | 5 +- test/CodeGen/BPF/CORE/intrinsic-union.ll | 5 +- test/CodeGen/BPF/CORE/offset-reloc-access-str.ll | 6 +- test/CodeGen/BPF/CORE/offset-reloc-basic.ll | 9 +- test/CodeGen/BPF/CORE/offset-reloc-cast-array-1.ll | 6 +- test/CodeGen/BPF/CORE/offset-reloc-cast-array-2.ll | 6 +- .../CodeGen/BPF/CORE/offset-reloc-cast-struct-1.ll | 6 +- .../CodeGen/BPF/CORE/offset-reloc-cast-struct-2.ll | 6 +- .../CodeGen/BPF/CORE/offset-reloc-cast-struct-3.ll | 6 +- test/CodeGen/BPF/CORE/offset-reloc-cast-union-1.ll | 6 +- test/CodeGen/BPF/CORE/offset-reloc-cast-union-2.ll | 6 +- test/CodeGen/BPF/CORE/offset-reloc-end-load.ll | 5 +- test/CodeGen/BPF/CORE/offset-reloc-end-ret.ll | 5 +- test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-1.ll | 189 ++++++++++++ test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2.ll | 246 +++++++++++++++ test/CodeGen/BPF/CORE/offset-reloc-global-1.ll | 5 +- test/CodeGen/BPF/CORE/offset-reloc-global-2.ll | 5 +- test/CodeGen/BPF/CORE/offset-reloc-global-3.ll | 5 +- test/CodeGen/BPF/CORE/offset-reloc-ignore.ll | 2 +- test/CodeGen/BPF/CORE/offset-reloc-middle-chain.ll | 7 +- .../CodeGen/BPF/CORE/offset-reloc-multi-array-1.ll | 5 +- .../CodeGen/BPF/CORE/offset-reloc-multi-array-2.ll | 5 +- test/CodeGen/BPF/CORE/offset-reloc-multilevel.ll | 9 +- test/CodeGen/BPF/CORE/offset-reloc-pointer-1.ll | 5 +- test/CodeGen/BPF/CORE/offset-reloc-pointer-2.ll | 5 +- .../BPF/CORE/offset-reloc-struct-anonymous.ll | 9 +- test/CodeGen/BPF/CORE/offset-reloc-struct-array.ll | 9 +- .../CodeGen/BPF/CORE/offset-reloc-typedef-array.ll | 5 +- .../BPF/CORE/offset-reloc-typedef-struct.ll | 5 +- .../CodeGen/BPF/CORE/offset-reloc-typedef-union.ll | 5 +- test/CodeGen/BPF/CORE/offset-reloc-typedef.ll | 5 +- test/CodeGen/BPF/CORE/offset-reloc-union.ll | 9 +- 55 files changed, 2885 insertions(+), 167 deletions(-) create mode 100644 test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-1.ll create mode 100644 test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-2.ll create mode 100644 test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-3.ll create mode 100644 test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-1.ll create mode 100644 test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-2.ll create mode 100644 test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-3.ll create mode 100644 test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-1.ll create mode 100644 test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-2.ll create mode 100644 test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-1.ll create mode 100644 test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-2.ll create mode 100644 test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-3.ll create mode 100644 test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-1.ll create mode 100644 test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-2.ll create mode 100644 test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-3.ll create mode 100644 test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-1.ll create mode 100644 test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2.ll