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unknown user pushed a change to branch release/2.40/master in repository glibc.

from 523f855581 math: Add optimization barrier to ensure a1 + u.d is not reu [...] new ff10623706 aarch64: Avoid redundant MOVs in AdvSIMD F32 logs new a991a0fc7c AArch64: Add vector logp1 alias for log1p new 354aeaf213 AArch64: Improve codegen in SVE expf & related routines new c4373426e3 AArch64: Improve codegen in SVE F32 logs new 5202401730 AArch64: Improve codegen in users of AdvSIMD log1pf helper new a947a43b95 AArch64: Improve codegen in users of ADVSIMD expm1f helper new 68f2eb20de AArch64: Simplify rounding-multiply pattern in several AdvSI [...] new 9ff7559b27 AArch64: Small optimisation in AdvSIMD erf and erfc new 76c923fe9d AArch64: Remove SVE erf and erfc tables new 4148940836 AArch64: Improve codegen in AdvSIMD pow new ae04f63087 AArch64: Improve codegen in AdvSIMD logs new 2aed9796bf AArch64: Improve codegen in users of ADVSIMD log1p helper new 9170b921fa AArch64: Improve codegen of AdvSIMD logf function family new 41dc9e7c2d AArch64: Improve codegen of AdvSIMD atan(2)(f) new bf2b60a560 AArch64: Improve codegen of AdvSIMD expf family new abfd20ebbd AArch64: Improve codegen in AdvSIMD asinh new 5f45c0f91e AArch64: Improve codegen in SVE tans new ab5ba6c188 AArch64: Improve codegen for SVE logs new aa7c61ea15 AArch64: Improve codegen for SVE log1pf users new d983f14c30 AArch64: Improve codegen in SVE expm1f and users new 0ff6a9ff79 Aarch64: Improve codegen in SVE asinh new 4b0bb84eb7 Aarch64: Improve codegen in SVE exp and users, and update ex [...] new 194185c289 AArch64: Improve codegen for SVE erfcf new 7dc549c5a4 AArch64: Improve codegen for SVE pow new 06fd8ad78f AArch64: Improve codegen for SVE powf

The 25 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: bits/libm-simd-decl-stubs.h | 11 + math/bits/mathcalls.h | 2 +- sysdeps/aarch64/fpu/Makefile | 2 - sysdeps/aarch64/fpu/Versions | 7 + sysdeps/aarch64/fpu/acosh_advsimd.c | 5 +- sysdeps/aarch64/fpu/acoshf_advsimd.c | 34 +- sysdeps/aarch64/fpu/acoshf_sve.c | 21 +- sysdeps/aarch64/fpu/advsimd_f32_protos.h | 1 + sysdeps/aarch64/fpu/asinh_advsimd.c | 174 ++- sysdeps/aarch64/fpu/asinh_sve.c | 111 +- sysdeps/aarch64/fpu/asinhf_advsimd.c | 33 +- sysdeps/aarch64/fpu/asinhf_sve.c | 17 +- sysdeps/aarch64/fpu/atan2_advsimd.c | 110 +- sysdeps/aarch64/fpu/atan2f_advsimd.c | 58 +- sysdeps/aarch64/fpu/atan_advsimd.c | 60 +- sysdeps/aarch64/fpu/atanh_advsimd.c | 26 +- sysdeps/aarch64/fpu/atanhf_advsimd.c | 26 +- sysdeps/aarch64/fpu/atanhf_sve.c | 14 +- sysdeps/aarch64/fpu/bits/math-vector.h | 8 + sysdeps/aarch64/fpu/cos_advsimd.c | 11 +- sysdeps/aarch64/fpu/cosf_advsimd.c | 9 +- sysdeps/aarch64/fpu/cosh_sve.c | 18 +- sysdeps/aarch64/fpu/coshf_advsimd.c | 28 +- sysdeps/aarch64/fpu/coshf_sve.c | 35 +- sysdeps/aarch64/fpu/erf_advsimd.c | 29 +- sysdeps/aarch64/fpu/erf_data.c | 8 +- sysdeps/aarch64/fpu/erf_sve.c | 10 +- sysdeps/aarch64/fpu/erfc_advsimd.c | 17 +- sysdeps/aarch64/fpu/erfc_data.c | 8 +- sysdeps/aarch64/fpu/erfc_sve.c | 2 +- sysdeps/aarch64/fpu/erfcf_advsimd.c | 8 +- sysdeps/aarch64/fpu/erfcf_data.c | 8 +- sysdeps/aarch64/fpu/erfcf_sve.c | 14 +- sysdeps/aarch64/fpu/erff_advsimd.c | 8 +- sysdeps/aarch64/fpu/erff_data.c | 8 +- sysdeps/aarch64/fpu/erff_sve.c | 13 +- sysdeps/aarch64/fpu/exp10_sve.c | 25 +- sysdeps/aarch64/fpu/exp10f_advsimd.c | 60 +- sysdeps/aarch64/fpu/exp10f_sve.c | 83 +- sysdeps/aarch64/fpu/exp2_sve.c | 26 +- sysdeps/aarch64/fpu/exp2f_advsimd.c | 54 +- sysdeps/aarch64/fpu/exp2f_sve.c | 70 +- sysdeps/aarch64/fpu/exp_sve.c | 36 +- sysdeps/aarch64/fpu/expf_advsimd.c | 56 +- sysdeps/aarch64/fpu/expf_sve.c | 62 +- sysdeps/aarch64/fpu/expm1f_advsimd.c | 62 +- sysdeps/aarch64/fpu/expm1f_sve.c | 31 +- sysdeps/aarch64/fpu/log10_advsimd.c | 79 +- sysdeps/aarch64/fpu/log10_sve.c | 47 +- sysdeps/aarch64/fpu/log10f_advsimd.c | 65 +- sysdeps/aarch64/fpu/log10f_sve.c | 41 +- sysdeps/aarch64/fpu/log1p_advsimd.c | 107 +- sysdeps/aarch64/fpu/log1p_sve.c | 2 + sysdeps/aarch64/fpu/log1pf_advsimd.c | 124 +- sysdeps/aarch64/fpu/log1pf_sve.c | 70 +- sysdeps/aarch64/fpu/log2_advsimd.c | 73 +- sysdeps/aarch64/fpu/log2_sve.c | 43 +- sysdeps/aarch64/fpu/log2f_advsimd.c | 67 +- sysdeps/aarch64/fpu/log2f_sve.c | 37 +- sysdeps/aarch64/fpu/log_advsimd.c | 94 +- sysdeps/aarch64/fpu/log_sve.c | 69 +- sysdeps/aarch64/fpu/logf_advsimd.c | 71 +- sysdeps/aarch64/fpu/logf_sve.c | 38 +- sysdeps/aarch64/fpu/pow_advsimd.c | 115 +- sysdeps/aarch64/fpu/pow_sve.c | 245 ++-- sysdeps/aarch64/fpu/powf_sve.c | 117 +- sysdeps/aarch64/fpu/sin_advsimd.c | 16 +- sysdeps/aarch64/fpu/sinf_advsimd.c | 22 +- sysdeps/aarch64/fpu/sinhf_advsimd.c | 23 +- sysdeps/aarch64/fpu/sinhf_sve.c | 2 +- sysdeps/aarch64/fpu/sv_erf_data.c | 1570 ----------------------- sysdeps/aarch64/fpu/sv_erff_data.c | 1058 --------------- sysdeps/aarch64/fpu/sv_expf_inline.h | 37 +- sysdeps/aarch64/fpu/sv_expm1f_inline.h | 28 +- sysdeps/aarch64/fpu/sv_log1pf_inline.h | 97 +- sysdeps/aarch64/fpu/tan_sve.c | 91 +- sysdeps/aarch64/fpu/tanf_sve.c | 18 +- sysdeps/aarch64/fpu/tanhf_advsimd.c | 21 +- sysdeps/aarch64/fpu/tanhf_sve.c | 28 +- sysdeps/aarch64/fpu/v_expf_inline.h | 49 +- sysdeps/aarch64/fpu/v_expm1f_inline.h | 43 +- sysdeps/aarch64/fpu/v_log1p_inline.h | 84 +- sysdeps/aarch64/fpu/v_log1pf_inline.h | 71 +- sysdeps/aarch64/fpu/vecmath_config.h | 28 +- sysdeps/aarch64/libm-test-ulps | 2 +- sysdeps/unix/sysv/linux/aarch64/libmvec.abilist | 5 + 86 files changed, 2043 insertions(+), 4273 deletions(-) delete mode 100644 sysdeps/aarch64/fpu/sv_erf_data.c delete mode 100644 sysdeps/aarch64/fpu/sv_erff_data.c