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from 3c9c52a1c0f [to-be-committed,RISC-V] Improve some shift-add sequences new a6114c2a691 RISC-V: Implement -m{,no}fence-tso

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Summary of changes: gcc/config/riscv/riscv.opt | 4 ++++ gcc/config/riscv/sync-rvwmo.md | 2 +- gcc/doc/invoke.texi | 8 ++++++++ 3 files changed, 13 insertions(+), 1 deletion(-)