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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/llvm-release-aarch64-spec2k6-O2_LTO in repository toolchain/ci/llvm-project.

from 28a6713e107 [ManagedStatic] Fix build errors with clang-tblgen in Debug [...] adds be4501f6e48 [InstCombine] prevent infinite loop with sub/abs of constan [...] adds 1a25347f574 [Driver] Support -fsanitize=shadow-call-stack on aarch64_be adds f9da0a7f36f [Driver] Support -fsanitize=shadow-call-stack and cfi-icall [...] adds 34f7e00333a Move RDF from Hexagon to Codegen adds fe73b9416de [X86][NFC] Generalize the naming of "Retpoline Thunks" and [...] adds a09ebfdafb9 [X86] Refactor X86IndirectThunks.cpp to Accommodate Mitigat [...] adds 071acfdd469 [X86] Add Indirect Thunk Support to X86 to mitigate Load Va [...] adds 6a4589599d7 [X86] Add RET-hardening Support to mitigate Load Value Inje [...] adds e3ba468fc3c [X86] Add a Pass that builds a Condensed CFG for Load Value [...] adds 2530f4e0ce4 [X86] Add Support for Load Hardening to Mitigate Load Value [...] adds 5bc4d476f34 Revert "[X86] Add Support for Load Hardening to Mitigate Lo [...] adds d758416a915 Revert "[X86] Add a Pass that builds a Condensed CFG for Lo [...] adds ac40e7a02ef [X86] Fix to X86LoadValueInjectionRetHardeningPass for poss [...] adds 1d8639336d9 [X86] Add tests to clang Driver to ensure that SLH/Retpolin [...] adds 363720c2b0f [X86] Add a Pass that builds a Condensed CFG for Load Value [...] adds 8aa8abae349 [X86] Add Support for Load Hardening to Mitigate Load Value [...] adds 72bff7855d8 [X86] Add an Unoptimized Load Value Injection (LVI) Load Ha [...] adds d24d5c8e308 fixed broken test after cherry pick adds 9bf7ca2c92a [RISCV] Fix sysroot tests without GCC on RISC-V hosts with GCC adds f8e49af4f1a [LegalizeTypes][RISCV] Correctly sign-extend comparison for [...] adds 71c14cd5aee [RISCV] Fix passing two floating-point values in complex se [...] adds 249fef00d92 [RISCV64] Emit correct lib call for fp(float/double) to ui/si adds 5fa1f1e9f44 [RISCV-V] Provide muldi3 builtin assembly implementation adds 43ca67c05d2 [RISCV] Fix incorrect FP base CFI offset for variable argum [...] adds 04b0a4e22e3 Provide anchor for compiler extensions adds 69fb858731e [AArch64] Fix mismatch in prologue and epilogue for funclet [...] adds a110c3fc8cd [AArch64] Change AArch64 Windows EH UnwindHelp object to be [...] adds b294e611271 [PPCAsmPrinter] support 'L' output template for memory operands adds 76ceebb0d96 [DAGCombine] Check the uses of negated floating constant an [...] adds 77d76b71d7d [libc++] Fix recursive instantiation in std::array.

No new revisions were added by this update.

Summary of changes: clang/docs/ClangCommandLineReference.rst | 4 + clang/include/clang/Driver/Options.td | 8 + clang/lib/CodeGen/TargetInfo.cpp | 3 +- clang/lib/Driver/SanitizerArgs.cpp | 3 +- clang/lib/Driver/ToolChain.cpp | 9 +- clang/lib/Driver/ToolChains/Arch/X86.cpp | 23 + clang/test/CodeGen/riscv64-lp64-abi.c | 21 + clang/test/CodeGen/riscv64-lp64f-lp64d-abi.c | 29 + clang/test/Driver/fsanitize.c | 5 + clang/test/Driver/riscv32-toolchain-extra.c | 1 + clang/test/Driver/riscv64-toolchain-extra.c | 1 + clang/test/Driver/x86-target-features.c | 24 + .../builtins/riscv/{mulsi3.S => int_mul_impl.inc} | 14 +- compiler-rt/lib/builtins/riscv/muldi3.S | 11 + compiler-rt/lib/builtins/riscv/mulsi3.S | 23 +- libcxx/include/array | 2 +- .../Hexagon => include/llvm/CodeGen}/RDFGraph.h | 0 .../Hexagon => include/llvm/CodeGen}/RDFLiveness.h | 0 .../llvm/CodeGen}/RDFRegisters.h | 0 llvm/lib/CodeGen/CMakeLists.txt | 3 + llvm/lib/{Target/Hexagon => CodeGen}/RDFGraph.cpp | 10 +- .../{Target/Hexagon => CodeGen}/RDFLiveness.cpp | 6 +- .../{Target/Hexagon => CodeGen}/RDFRegisters.cpp | 2 +- .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 14 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 26 +- llvm/lib/Extensions/Extensions.cpp | 15 + llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 101 ++- llvm/lib/Target/Hexagon/CMakeLists.txt | 3 - llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp | 6 +- llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp | 6 +- llvm/lib/Target/Hexagon/RDFCopy.cpp | 6 +- llvm/lib/Target/Hexagon/RDFCopy.h | 6 +- llvm/lib/Target/Hexagon/RDFDeadCode.cpp | 4 +- llvm/lib/Target/Hexagon/RDFDeadCode.h | 4 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 7 +- llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 4 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 34 + llvm/lib/Target/X86/CMakeLists.txt | 4 +- llvm/lib/Target/X86/ImmutableGraph.h | 446 ++++++++++ llvm/lib/Target/X86/X86.h | 8 +- llvm/lib/Target/X86/X86.td | 16 + llvm/lib/Target/X86/X86FastISel.cpp | 4 +- llvm/lib/Target/X86/X86FrameLowering.cpp | 10 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 81 +- llvm/lib/Target/X86/X86ISelLowering.h | 4 +- llvm/lib/Target/X86/X86IndirectThunks.cpp | 364 +++++++++ llvm/lib/Target/X86/X86InstrCompiler.td | 16 +- llvm/lib/Target/X86/X86InstrControl.td | 22 +- llvm/lib/Target/X86/X86InstrInfo.td | 4 +- .../X86/X86LoadValueInjectionLoadHardening.cpp | 900 +++++++++++++++++++++ .../X86/X86LoadValueInjectionRetHardening.cpp | 143 ++++ llvm/lib/Target/X86/X86MCInstLower.cpp | 8 +- llvm/lib/Target/X86/X86RetpolineThunks.cpp | 286 ------- llvm/lib/Target/X86/X86Subtarget.h | 27 +- llvm/lib/Target/X86/X86TargetMachine.cpp | 9 +- .../Transforms/InstCombine/InstCombineAddSub.cpp | 2 +- .../CodeGen/AArch64/funclet-match-add-sub-stack.ll | 62 ++ llvm/test/CodeGen/AArch64/seh-finally.ll | 24 +- llvm/test/CodeGen/AArch64/wineh-try-catch-cbz.ll | 7 +- .../CodeGen/AArch64/wineh-try-catch-realign.ll | 2 +- llvm/test/CodeGen/AArch64/wineh-try-catch.ll | 14 +- .../CodeGen/AArch64/wineh-unwindhelp-via-fp.ll | 69 ++ llvm/test/CodeGen/PowerPC/fma-combine.ll | 101 +++ .../CodeGen/PowerPC/inlineasm-output-template.ll | 13 +- llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll | 10 + llvm/test/CodeGen/RISCV/rv64i-single-softfloat.ll | 124 ++- llvm/test/CodeGen/RISCV/vararg.ll | 8 +- llvm/test/CodeGen/X86/O0-pipeline.ll | 5 +- llvm/test/CodeGen/X86/O3-pipeline.ll | 8 +- .../test/CodeGen/X86/lvi-hardening-gadget-graph.ll | 129 +++ llvm/test/CodeGen/X86/lvi-hardening-indirectbr.ll | 281 +++++++ llvm/test/CodeGen/X86/lvi-hardening-loads.ll | 144 ++++ llvm/test/CodeGen/X86/lvi-hardening-ret.ll | 72 ++ llvm/test/Transforms/InstCombine/abs-1.ll | 18 + 75 files changed, 3368 insertions(+), 517 deletions(-) copy compiler-rt/lib/builtins/riscv/{mulsi3.S => int_mul_impl.inc} (61%) create mode 100644 compiler-rt/lib/builtins/riscv/muldi3.S rename llvm/{lib/Target/Hexagon => include/llvm/CodeGen}/RDFGraph.h (100%) rename llvm/{lib/Target/Hexagon => include/llvm/CodeGen}/RDFLiveness.h (100%) rename llvm/{lib/Target/Hexagon => include/llvm/CodeGen}/RDFRegisters.h (100%) rename llvm/lib/{Target/Hexagon => CodeGen}/RDFGraph.cpp (99%) rename llvm/lib/{Target/Hexagon => CodeGen}/RDFLiveness.cpp (99%) rename llvm/lib/{Target/Hexagon => CodeGen}/RDFRegisters.cpp (99%) create mode 100644 llvm/lib/Target/X86/ImmutableGraph.h create mode 100644 llvm/lib/Target/X86/X86IndirectThunks.cpp create mode 100644 llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp create mode 100644 llvm/lib/Target/X86/X86LoadValueInjectionRetHardening.cpp delete mode 100644 llvm/lib/Target/X86/X86RetpolineThunks.cpp create mode 100644 llvm/test/CodeGen/AArch64/funclet-match-add-sub-stack.ll create mode 100644 llvm/test/CodeGen/AArch64/wineh-unwindhelp-via-fp.ll create mode 100644 llvm/test/CodeGen/X86/lvi-hardening-gadget-graph.ll create mode 100644 llvm/test/CodeGen/X86/lvi-hardening-indirectbr.ll create mode 100644 llvm/test/CodeGen/X86/lvi-hardening-loads.ll create mode 100644 llvm/test/CodeGen/X86/lvi-hardening-ret.ll