This is an automated email from the git hooks/post-receive script.

unknown user pushed a change to branch master in repository gcc.

from a6b8833f34a Fix amdgcn issue with '0' constraints new fb9c849560f Check mask argument's type when vectorising conditional functions new 69ffead97a2 Require equal shift amounts for IFN_DIV_POW2

The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: gcc/ChangeLog | 13 ++++++++ gcc/testsuite/ChangeLog | 11 +++++++ gcc/testsuite/gcc.dg/vect/vect-cond-arith-8.c | 8 +++++ gcc/testsuite/gcc.target/aarch64/sve/asrdiv_1.c | 8 ++--- gcc/testsuite/gcc.target/aarch64/sve/asrdiv_2.c | 19 ++++++++++++ gcc/testsuite/gcc.target/aarch64/sve/asrdiv_3.c | 19 ++++++++++++ gcc/testsuite/gcc.target/aarch64/sve/cond_fmul_5.c | 9 ++++++ gcc/tree-vect-slp.c | 30 +++++++++++++------ gcc/tree-vect-stmts.c | 35 ++++++++++------------ 9 files changed, 120 insertions(+), 32 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/vect/vect-cond-arith-8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/asrdiv_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/asrdiv_3.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fmul_5.c