This is an automated email from the git hooks/post-receive script.

tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-defconfig in repository toolchain/ci/llvm-project.

from 7cefd1b4cd7 [LV] Remove duplicated return stmt (NFC). adds 0980c9c6f15 [X86] Split masked integer vector stores into vXi32/vXi64 v [...] adds e2e38fca64e Entropic: Boosting LibFuzzer Performance adds ccba60a784e [StackColoring] When remapping alloca's move the To alloca [...] adds 81a73fde5ce Fix aux-target diagnostics for certain builtins adds 225f241c844 [lldb/Reproducers] Move connection logic into replay server (NFC) adds 15ee8a3a582 Silence warnings around int/float conversions. adds 520a5702680 [mlir][StandardToSPIRV] Fix signedness issue in bitwidth em [...] adds 5fae613a4fd [LVI] Don't require DominatorTree in LVI (NFC) adds 018e5a96eeb [lldb/Properties] Move OSPluginReportsAllThreads from Targe [...] adds 0d736f467dd [SVE] Add specialized getters to derived vector types adds 59f49f7ee7f [IR] Simplify BasicBlock::removePredecessor. NFCI. adds 6d953693fe6 [PhaseOrdering] make different pass manager runs equivalent; NFC adds 348da7eec3e [PhaseOrdering] add tests for x86 horizontal math ops (PR41 [...] adds b2d733c3507 [llvm][docs] Add step by step git to GettingStarted adds 4eb6f4854eb [lld-macho][re-land] Support .subsections_via_symbols adds ce0d8beebcf [lld-macho][re-land] Support X86_64_RELOC_UNSIGNED adds 3181273be73 [WebAssembly] Implement i64x2.mul and remove i8x16.mul adds 8a43d41a407 [WebAssembly] Fix bug in custom shuffle combine adds 67ecd8cbf5f [PGOProfile] make test less brittle; NFC adds 2e6e27583ce [PowerPC][NFC] Cleanup load/store spilling code adds f8e833a5018 [gn build] Add a flag zlib_path to provide the path to zlib [...] adds e42e5e4d0fc [analyzer] Move apiModeling.StdCLibraryFunctionArgs to alpha. adds c7dddaa89ff [lldb/Reproducers] Update GDB remote client tests for passi [...] adds f8cccd126b4 [gn build] Try to unbreak Windows build after f8e833a501. adds 350dadaa8ab Give helpers internal linkage. NFC. adds 74ef6a11478 Fix X86_64 complex-returns for regcall.

No new revisions were added by this update.

Summary of changes: clang/include/clang/Sema/Sema.h | 33 ++- .../clang/StaticAnalyzer/Checkers/Checkers.td | 18 +- clang/lib/CodeGen/TargetInfo.cpp | 13 +- clang/lib/Headers/wasm_simd128.h | 5 - clang/lib/Sema/SemaChecking.cpp | 100 ++++---- .../Checkers/StdLibraryFunctionsChecker.cpp | 15 -- clang/lib/StaticAnalyzer/Core/CallEvent.cpp | 2 +- clang/test/Analysis/analyzer-enabled-checkers.c | 1 - .../std-c-library-functions-arg-constraints.c | 4 +- .../std-c-library-functions-arg-constraints.cpp | 2 +- clang/test/CodeGenCXX/regcall.cpp | 23 +- clang/test/Sema/check-aux-builtins.c | 1 + compiler-rt/lib/fuzzer/FuzzerCorpus.h | 249 ++++++++++++++++++- compiler-rt/lib/fuzzer/FuzzerDriver.cpp | 22 +- compiler-rt/lib/fuzzer/FuzzerFlags.def | 8 + compiler-rt/lib/fuzzer/FuzzerLoop.cpp | 5 + compiler-rt/lib/fuzzer/FuzzerOptions.h | 3 + compiler-rt/lib/fuzzer/tests/FuzzerUnittest.cpp | 65 ++++- lld/MachO/Arch/X86_64.cpp | 5 + lld/MachO/Driver.cpp | 11 +- lld/MachO/InputFiles.cpp | 216 ++++++++++++----- lld/MachO/InputFiles.h | 18 +- lld/MachO/InputSection.cpp | 11 +- lld/MachO/InputSection.h | 9 +- lld/MachO/Target.h | 1 + lld/test/MachO/subsections-section-relocs.s | 47 ++++ lld/test/MachO/subsections-symbol-relocs.s | 55 +++++ lld/test/MachO/x86-64-reloc-unsigned.s | 24 ++ lldb/include/lldb/Target/Process.h | 9 +- lldb/include/lldb/Target/Target.h | 5 - lldb/source/Plugins/Language/ObjC/Cocoa.cpp | 4 +- .../GDBRemoteCommunicationReplayServer.cpp | 25 ++ .../GDBRemoteCommunicationReplayServer.h | 3 + .../Process/gdb-remote/ProcessGDBRemote.cpp | 36 +-- .../Plugins/Process/gdb-remote/ProcessGDBRemote.h | 4 +- lldb/source/Target/Process.cpp | 54 ++++- lldb/source/Target/Target.cpp | 36 +-- lldb/source/Target/TargetProperties.td | 13 +- .../gdb_remote_client/TestGDBRemoteClient.py | 7 +- .../gdb_remote_client/TestGDBRemoteLoad.py | 2 + .../TestJLink6Armv7RegisterDefinition.py | 24 +- .../TestOSPluginStepping.py | 2 +- lldb/unittests/DataFormatter/MockTests.cpp | 8 +- llvm/docs/GettingStarted.rst | 18 ++ llvm/include/llvm/Analysis/LazyValueInfo.h | 20 +- llvm/include/llvm/IR/BasicBlock.h | 8 +- llvm/include/llvm/IR/DerivedTypes.h | 60 +++++ llvm/lib/Analysis/LazyValueInfo.cpp | 73 ++---- llvm/lib/CodeGen/StackColoring.cpp | 5 + llvm/lib/IR/BasicBlock.cpp | 69 ++---- llvm/lib/IR/Instructions.cpp | 8 +- llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 6 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 264 +++++---------------- llvm/lib/Target/PowerPC/PPCInstrInfo.h | 71 +++++- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 3 +- .../Target/WebAssembly/WebAssemblyISelLowering.cpp | 12 +- .../lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 8 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 2 + llvm/lib/Target/X86/X86InstrSSE.td | 18 +- llvm/lib/Target/X86/X86SchedBroadwell.td | 6 +- llvm/lib/Target/X86/X86SchedHaswell.td | 6 +- llvm/lib/Target/X86/X86SchedSandyBridge.td | 6 +- llvm/lib/Target/X86/X86SchedSkylakeClient.td | 6 +- llvm/lib/Target/X86/X86SchedSkylakeServer.td | 6 +- llvm/lib/Target/X86/X86Schedule.td | 14 +- llvm/lib/Target/X86/X86ScheduleAtom.td | 6 +- llvm/lib/Target/X86/X86ScheduleBdVer2.td | 6 +- llvm/lib/Target/X86/X86ScheduleBtVer2.td | 6 +- llvm/lib/Target/X86/X86ScheduleSLM.td | 6 +- llvm/lib/Target/X86/X86ScheduleZnver1.td | 6 +- llvm/lib/Target/X86/X86ScheduleZnver2.td | 6 +- llvm/lib/Transforms/Scalar/JumpThreading.cpp | 50 +--- llvm/lib/Transforms/Utils/AssumeBundleBuilder.cpp | 2 + llvm/lib/Transforms/Utils/LowerSwitch.cpp | 7 - .../Analysis/LazyValueAnalysis/invalidation.ll | 12 - llvm/test/CodeGen/WebAssembly/simd-arith.ll | 14 +- .../CodeGen/WebAssembly/simd-shuffle-bitcast.ll | 11 + llvm/test/CodeGen/WebAssembly/simd-unsupported.ll | 3 +- .../X86/StackColoring-use-between-allocas.mir | 212 +++++++++++++++++ llvm/test/MC/WebAssembly/simd-encodings.s | 6 +- .../Transforms/PGOProfile/cspgo_profile_summary.ll | 4 +- llvm/test/Transforms/PhaseOrdering/X86/addsub.ll | 5 +- .../Transforms/PhaseOrdering/X86/horiz-math.ll | 169 +++++++++++++ llvm/utils/gn/build/libs/zlib/BUILD.gn | 9 +- llvm/utils/gn/build/libs/zlib/enable.gni | 9 +- .../StandardToSPIRV/ConvertStandardToSPIRV.cpp | 55 ++++- mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp | 2 + mlir/lib/Dialect/Affine/IR/AffineOps.cpp | 28 ++- mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 2 + mlir/lib/Dialect/Vector/VectorOps.cpp | 2 +- .../StandardToSPIRV/std-ops-to-spirv.mlir | 44 +++- mlir/test/lib/IR/TestMatchers.cpp | 3 +- mlir/test/lib/Transforms/TestLinalgTransforms.cpp | 4 +- 93 files changed, 1786 insertions(+), 790 deletions(-) create mode 100644 lld/test/MachO/subsections-section-relocs.s create mode 100644 lld/test/MachO/subsections-symbol-relocs.s create mode 100644 lld/test/MachO/x86-64-reloc-unsigned.s create mode 100644 llvm/test/CodeGen/X86/StackColoring-use-between-allocas.mir create mode 100644 llvm/test/Transforms/PhaseOrdering/X86/horiz-math.ll