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from e63d9f9de87 testsuite: Fix asm-hard-reg-error-{4,5}.c for non-LRA targets new 9ff5cadac45 ifcvt: Clarify if_info.original_cost. new 75cad4640c3 RISC-V: Add min/max patterns for ifcvt.

The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: gcc/config/riscv/bitmanip.md | 13 +++++ gcc/config/riscv/iterators.md | 8 +++ gcc/config/riscv/riscv.cc | 3 - gcc/ifcvt.cc | 76 ++++++++++++++----------- gcc/testsuite/gcc.target/riscv/addsieq.c | 11 ++-- gcc/testsuite/gcc.target/riscv/addsifeq.c | 7 ++- gcc/testsuite/gcc.target/riscv/addsifge.c | 7 ++- gcc/testsuite/gcc.target/riscv/addsifgt.c | 7 ++- gcc/testsuite/gcc.target/riscv/addsifle.c | 7 ++- gcc/testsuite/gcc.target/riscv/addsiflt.c | 7 ++- gcc/testsuite/gcc.target/riscv/addsifne.c | 7 ++- gcc/testsuite/gcc.target/riscv/addsige.c | 9 +-- gcc/testsuite/gcc.target/riscv/addsigeu.c | 9 +-- gcc/testsuite/gcc.target/riscv/addsigt.c | 9 +-- gcc/testsuite/gcc.target/riscv/addsigtu.c | 9 +-- gcc/testsuite/gcc.target/riscv/addsile.c | 9 +-- gcc/testsuite/gcc.target/riscv/addsileu.c | 9 +-- gcc/testsuite/gcc.target/riscv/addsilt.c | 9 +-- gcc/testsuite/gcc.target/riscv/addsiltu.c | 9 +-- gcc/testsuite/gcc.target/riscv/zbb-min-max-04.c | 45 +++++++++++++++ 20 files changed, 178 insertions(+), 92 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-min-max-04.c