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unknown user pushed a change to branch users/riscv/binutils-integration-branch in repository binutils-gdb.

from 5639be3e596 RISC-V/t-head: Add CSRs and opcodes of the T-HEAD XUANTIE CPUs new 96875351a4d RISC-V/rvv: Added assembly pseudo and changed assembler mnemonics. new fc93e6c9a74 RISC-V/rvv: Update constraints for widening and narrowing i [...] new 00a8f6437d4 RISC-V/rvv: Separate zvamo from v, and removed the zvlsseg [...] new 9c059f43fe0 RISC-V/rvv: Added zve* and zvl* extensions, and clarify the [...]

The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: bfd/elfxx-riscv.c | 69 +- gas/config/tc-riscv.c | 37 +- gas/testsuite/gas/riscv/extended/march-imply-v.d | 6 + .../gas/riscv/extended/march-imply-zve32f.d | 6 + .../gas/riscv/extended/march-imply-zve32x.d | 6 + .../gas/riscv/extended/march-imply-zve64d.d | 6 + .../gas/riscv/extended/march-imply-zve64f.d | 6 + .../gas/riscv/extended/march-imply-zve64x.d | 6 + .../gas/riscv/extended/march-imply-zvl1024b.d | 6 + .../gas/riscv/extended/march-imply-zvl128b.d | 6 + .../gas/riscv/extended/march-imply-zvl16384b.d | 6 + .../gas/riscv/extended/march-imply-zvl2048b.d | 6 + .../gas/riscv/extended/march-imply-zvl256b.d | 6 + .../gas/riscv/extended/march-imply-zvl32768b.d | 6 + .../gas/riscv/extended/march-imply-zvl4096b.d | 6 + .../gas/riscv/extended/march-imply-zvl512b.d | 6 + .../gas/riscv/extended/march-imply-zvl64b.d | 6 + .../gas/riscv/extended/march-imply-zvl65536b.d | 6 + .../gas/riscv/extended/march-imply-zvl8192b.d | 6 + .../extended/vector-insns-fail-arith-floatp.l | 1 + .../extended/vector-insns-fail-arith-floatp.s | 2 + .../extended/vector-insns-fail-arith-narrow.d | 3 - .../extended/vector-insns-fail-arith-narrow.l | 85 -- .../extended/vector-insns-fail-arith-narrow.s | 100 --- .../riscv/extended/vector-insns-fail-arith-widen.l | 131 --- .../riscv/extended/vector-insns-fail-arith-widen.s | 88 +- .../gas/riscv/extended/vector-insns-fail-zvamo.d | 2 +- .../gas/riscv/extended/vector-insns-fail-zve32x.d | 3 + .../gas/riscv/extended/vector-insns-fail-zve32x.l | 82 ++ .../gas/riscv/extended/vector-insns-fail-zve32x.s | 413 +++++++++ .../gas/riscv/extended/vector-insns-fail-zvl.d | 3 + .../gas/riscv/extended/vector-insns-fail-zvl.l | 2 + .../gas/riscv/extended/vector-insns-vmsgtvx.d | 12 +- gas/testsuite/gas/riscv/extended/vector-insns.d | 38 +- gas/testsuite/gas/riscv/extended/vector-insns.s | 32 +- include/opcode/riscv-opc-extended.h | 28 +- include/opcode/riscv.h | 5 +- opcodes/riscv-opc.c | 965 ++++++++++----------- 38 files changed, 1252 insertions(+), 951 deletions(-) create mode 100644 gas/testsuite/gas/riscv/extended/march-imply-v.d create mode 100644 gas/testsuite/gas/riscv/extended/march-imply-zve32f.d create mode 100644 gas/testsuite/gas/riscv/extended/march-imply-zve32x.d create mode 100644 gas/testsuite/gas/riscv/extended/march-imply-zve64d.d create mode 100644 gas/testsuite/gas/riscv/extended/march-imply-zve64f.d create mode 100644 gas/testsuite/gas/riscv/extended/march-imply-zve64x.d create mode 100644 gas/testsuite/gas/riscv/extended/march-imply-zvl1024b.d create mode 100644 gas/testsuite/gas/riscv/extended/march-imply-zvl128b.d create mode 100644 gas/testsuite/gas/riscv/extended/march-imply-zvl16384b.d create mode 100644 gas/testsuite/gas/riscv/extended/march-imply-zvl2048b.d create mode 100644 gas/testsuite/gas/riscv/extended/march-imply-zvl256b.d create mode 100644 gas/testsuite/gas/riscv/extended/march-imply-zvl32768b.d create mode 100644 gas/testsuite/gas/riscv/extended/march-imply-zvl4096b.d create mode 100644 gas/testsuite/gas/riscv/extended/march-imply-zvl512b.d create mode 100644 gas/testsuite/gas/riscv/extended/march-imply-zvl64b.d create mode 100644 gas/testsuite/gas/riscv/extended/march-imply-zvl65536b.d create mode 100644 gas/testsuite/gas/riscv/extended/march-imply-zvl8192b.d delete mode 100644 gas/testsuite/gas/riscv/extended/vector-insns-fail-arith-narrow.d delete mode 100644 gas/testsuite/gas/riscv/extended/vector-insns-fail-arith-narrow.l delete mode 100644 gas/testsuite/gas/riscv/extended/vector-insns-fail-arith-narrow.s create mode 100644 gas/testsuite/gas/riscv/extended/vector-insns-fail-zve32x.d create mode 100644 gas/testsuite/gas/riscv/extended/vector-insns-fail-zve32x.l create mode 100644 gas/testsuite/gas/riscv/extended/vector-insns-fail-zve32x.s create mode 100644 gas/testsuite/gas/riscv/extended/vector-insns-fail-zvl.d create mode 100644 gas/testsuite/gas/riscv/extended/vector-insns-fail-zvl.l