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from 80e85c627a3 RISC-V: Add test case of unsigned scalar SAT_MUL form 5 for [...] new 45ddf553534 AArch64: Add SME LUTv2 architecture extension new 1d0a5e9fcb8 AArch64: Add SME LUTv2 intrinsics

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Summary of changes: gcc/config/aarch64/aarch64-c.cc | 1 + gcc/config/aarch64/aarch64-option-extensions.def | 2 + gcc/config/aarch64/aarch64-sme.md | 34 ++ gcc/config/aarch64/aarch64-sve-builtins-shapes.cc | 104 +++++- gcc/config/aarch64/aarch64-sve-builtins-shapes.h | 3 + gcc/config/aarch64/aarch64-sve-builtins-sme.cc | 72 ++++ gcc/config/aarch64/aarch64-sve-builtins-sme.def | 6 + gcc/config/aarch64/aarch64-sve-builtins-sme.h | 3 + gcc/config/aarch64/aarch64-sve-builtins.h | 7 +- gcc/config/aarch64/aarch64.h | 7 +- gcc/doc/invoke.texi | 2 + .../aarch64/sme2/acle-asm/svluti4_zt_1.c | 30 ++ .../aarch64/sme2/acle-asm/svwrite_lane_zt_1.c | 204 +++++++++++ .../aarch64/sme2/acle-asm/svwrite_zt_1.c | 96 +++++ .../aarch64/sve/acle/general-c/svluti4_zt_1.c | 86 +++++ .../aarch64/sve/acle/general-c/svwrite_lane_zt_1.c | 406 +++++++++++++++++++++ .../aarch64/sve/acle/general-c/svwrite_zt_1.c | 351 ++++++++++++++++++ 17 files changed, 1409 insertions(+), 5 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/svluti4_zt_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/svwrite_lane_zt_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/svwrite_zt_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/svluti4_zt_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/svwrite_lan [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/svwrite_zt_1.c