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from f788324c724 Handle SLP build operand swapping for ternaries and calls new c8cb537fdbd RISC-V: Adding B ext, fp16 and missing scalar instruction t [...] new 9e9363e23dc RISC-V: Primary vector pipeline model for sifive 7 series new 139c6d1804b RISC-V: Ignore -Oz for most rvv testcase [NFC]

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Summary of changes: gcc/config/riscv/sifive-7.md | 169 ++++++++++++++++++++- gcc/testsuite/gcc.target/riscv/pr120659.c | 5 + .../gcc.target/riscv/rvv/vsetvl/avl_single-21.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/avl_single-26.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/avl_single-36.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/avl_single-39.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/avl_single-41.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vsetvl-22.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-15.c | 4 +- .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-2.c | 4 +- .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-4.c | 4 +- 11 files changed, 182 insertions(+), 16 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/pr120659.c