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from 26cbcfe5fce Fix libgomp.oacc-fortran/atomic_capture-1.f90 new 8165795c155 [ARM][GCC][2/3x]: MVE intrinsics with ternary operands.
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Summary of changes: gcc/ChangeLog | 679 +++++ gcc/config/arm/arm_mve.h | 2966 +++++++++++++++++++- gcc/config/arm/arm_mve_builtins.def | 85 + gcc/config/arm/constraints.md | 10 + gcc/config/arm/mve.md | 1032 ++++++- gcc/config/arm/predicates.md | 8 + gcc/testsuite/ChangeLog | 262 ++ .../intrinsics/{vbicq_m_n_s16.c => vabsq_m_s16.c} | 10 +- .../intrinsics/{vbicq_m_n_s32.c => vabsq_m_s32.c} | 10 +- .../intrinsics/{vbicq_m_n_s16.c => vabsq_m_s8.c} | 14 +- .../gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c | 22 + .../intrinsics/{vbicq_m_n_s16.c => vclsq_m_s16.c} | 10 +- .../intrinsics/{vbicq_m_n_s32.c => vclsq_m_s32.c} | 10 +- .../intrinsics/{vbicq_m_n_s16.c => vclsq_m_s8.c} | 14 +- .../intrinsics/{vbicq_m_n_s16.c => vclzq_m_s16.c} | 10 +- .../intrinsics/{vbicq_m_n_s32.c => vclzq_m_s32.c} | 10 +- .../intrinsics/{vbicq_m_n_s16.c => vclzq_m_s8.c} | 14 +- .../intrinsics/{vbicq_m_n_u16.c => vclzq_m_u16.c} | 10 +- .../intrinsics/{vbicq_m_n_u32.c => vclzq_m_u32.c} | 10 +- .../intrinsics/{vbicq_m_n_s32.c => vclzq_m_u8.c} | 14 +- .../intrinsics/{vctp16q_m.c => vcmpcsq_m_n_u16.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpcsq_m_n_u32.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpcsq_m_n_u8.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpcsq_m_u16.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpcsq_m_u32.c} | 10 +- .../mve/intrinsics/{vctp16q_m.c => vcmpcsq_m_u8.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpeqq_m_n_s16.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpeqq_m_n_s32.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpeqq_m_n_s8.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpeqq_m_n_u16.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpeqq_m_n_u32.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpeqq_m_n_u8.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpeqq_m_s16.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpeqq_m_s32.c} | 10 +- .../mve/intrinsics/{vctp16q_m.c => vcmpeqq_m_s8.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpeqq_m_u16.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpeqq_m_u32.c} | 10 +- .../mve/intrinsics/{vctp16q_m.c => vcmpeqq_m_u8.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpgeq_m_n_s16.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpgeq_m_n_s32.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpgeq_m_n_s8.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpgeq_m_s16.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpgeq_m_s32.c} | 10 +- .../mve/intrinsics/{vctp16q_m.c => vcmpgeq_m_s8.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpgtq_m_n_s16.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpgtq_m_n_s32.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpgtq_m_n_s8.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpgtq_m_s16.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpgtq_m_s32.c} | 10 +- .../mve/intrinsics/{vctp16q_m.c => vcmpgtq_m_s8.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmphiq_m_n_u16.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmphiq_m_n_u32.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmphiq_m_n_u8.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmphiq_m_u16.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmphiq_m_u32.c} | 10 +- .../mve/intrinsics/{vctp16q_m.c => vcmphiq_m_u8.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpleq_m_n_s16.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpleq_m_n_s32.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpleq_m_n_s8.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpleq_m_s16.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpleq_m_s32.c} | 10 +- .../mve/intrinsics/{vctp16q_m.c => vcmpleq_m_s8.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpltq_m_n_s16.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpltq_m_n_s32.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpltq_m_n_s8.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpltq_m_s16.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpltq_m_s32.c} | 10 +- .../mve/intrinsics/{vctp16q_m.c => vcmpltq_m_s8.c} | 10 +- .../gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c | 2 +- .../gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c | 2 +- .../intrinsics/{vctp16q_m.c => vcmpneq_m_n_s16.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpneq_m_n_s32.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpneq_m_n_s8.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpneq_m_n_u16.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpneq_m_n_u32.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpneq_m_n_u8.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpneq_m_s16.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpneq_m_s32.c} | 10 +- .../mve/intrinsics/{vctp16q_m.c => vcmpneq_m_s8.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpneq_m_u16.c} | 10 +- .../intrinsics/{vctp16q_m.c => vcmpneq_m_u32.c} | 10 +- .../mve/intrinsics/{vctp16q_m.c => vcmpneq_m_u8.c} | 10 +- .../{vbicq_m_n_s16.c => vdupq_m_n_s16.c} | 10 +- .../{vbicq_m_n_s32.c => vdupq_m_n_s32.c} | 10 +- .../intrinsics/{vbicq_m_n_s16.c => vdupq_m_n_s8.c} | 14 +- .../{vbicq_m_n_u16.c => vdupq_m_n_u16.c} | 10 +- .../{vbicq_m_n_u32.c => vdupq_m_n_u32.c} | 10 +- .../intrinsics/{vbicq_m_n_s32.c => vdupq_m_n_u8.c} | 14 +- .../intrinsics/{vbicq_m_n_u16.c => vmaxaq_m_s16.c} | 10 +- .../intrinsics/{vbicq_m_n_u32.c => vmaxaq_m_s32.c} | 10 +- .../intrinsics/{vbicq_m_n_s32.c => vmaxaq_m_s8.c} | 14 +- .../gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c | 22 + .../intrinsics/{vbicq_m_n_u16.c => vminaq_m_s16.c} | 10 +- .../intrinsics/{vbicq_m_n_u32.c => vminaq_m_s32.c} | 10 +- .../intrinsics/{vbicq_m_n_s32.c => vminaq_m_s8.c} | 14 +- .../gcc.target/arm/mve/intrinsics/vminavq_p_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vminavq_p_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vminavq_p_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vminvq_p_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vminvq_p_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vminvq_p_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vminvq_p_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vminvq_p_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vminvq_p_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmladavaq_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmladavaq_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmladavaq_s8.c | 22 + .../intrinsics/{vabavq_u16.c => vmladavaq_u16.c} | 8 +- .../intrinsics/{vabavq_u32.c => vmladavaq_u32.c} | 8 +- .../mve/intrinsics/{vabavq_u8.c => vmladavaq_u8.c} | 8 +- .../gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c | 22 + .../arm/mve/intrinsics/vmladavxq_p_s16.c | 22 + .../arm/mve/intrinsics/vmladavxq_p_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c | 22 + .../arm/mve/intrinsics/vmlsdavxq_p_s16.c | 22 + .../arm/mve/intrinsics/vmlsdavxq_p_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c | 22 + .../intrinsics/{vbicq_m_n_s16.c => vmvnq_m_s16.c} | 10 +- .../intrinsics/{vbicq_m_n_s32.c => vmvnq_m_s32.c} | 10 +- .../intrinsics/{vbicq_m_n_s16.c => vmvnq_m_s8.c} | 14 +- .../intrinsics/{vbicq_m_n_u16.c => vmvnq_m_u16.c} | 10 +- .../intrinsics/{vbicq_m_n_u32.c => vmvnq_m_u32.c} | 10 +- .../intrinsics/{vbicq_m_n_s32.c => vmvnq_m_u8.c} | 14 +- .../intrinsics/{vbicq_m_n_s16.c => vnegq_m_s16.c} | 10 +- .../intrinsics/{vbicq_m_n_s32.c => vnegq_m_s32.c} | 10 +- .../intrinsics/{vbicq_m_n_s16.c => vnegq_m_s8.c} | 14 +- .../gcc.target/arm/mve/intrinsics/vpselq_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vpselq_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vpselq_s64.c | 22 + .../gcc.target/arm/mve/intrinsics/vpselq_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vpselq_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vpselq_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vpselq_u64.c | 22 + .../gcc.target/arm/mve/intrinsics/vpselq_u8.c | 22 + .../intrinsics/{vbicq_m_n_s16.c => vqabsq_m_s16.c} | 10 +- .../intrinsics/{vbicq_m_n_s32.c => vqabsq_m_s32.c} | 10 +- .../intrinsics/{vbicq_m_n_s16.c => vqabsq_m_s8.c} | 14 +- .../gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vqdmlahq_n_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vqdmlahq_n_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqdmlahq_n_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c | 22 + .../intrinsics/{vbicq_m_n_s16.c => vqnegq_m_s16.c} | 10 +- .../intrinsics/{vbicq_m_n_s32.c => vqnegq_m_s32.c} | 10 +- .../intrinsics/{vbicq_m_n_s16.c => vqnegq_m_s8.c} | 14 +- .../gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c | 22 + .../arm/mve/intrinsics/vqrdmladhxq_s16.c | 22 + .../arm/mve/intrinsics/vqrdmladhxq_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c | 22 + .../arm/mve/intrinsics/vqrdmlahq_n_s16.c | 22 + .../arm/mve/intrinsics/vqrdmlahq_n_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c | 22 + .../arm/mve/intrinsics/vqrdmlahq_n_u16.c | 22 + .../arm/mve/intrinsics/vqrdmlahq_n_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqrdmlahq_n_u8.c | 22 + .../arm/mve/intrinsics/vqrdmlashq_n_s16.c | 22 + .../arm/mve/intrinsics/vqrdmlashq_n_s32.c | 22 + .../arm/mve/intrinsics/vqrdmlashq_n_s8.c | 22 + .../arm/mve/intrinsics/vqrdmlashq_n_u16.c | 22 + .../arm/mve/intrinsics/vqrdmlashq_n_u32.c | 22 + .../arm/mve/intrinsics/vqrdmlashq_n_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c | 22 + .../arm/mve/intrinsics/vqrdmlsdhxq_s16.c | 22 + .../arm/mve/intrinsics/vqrdmlsdhxq_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c | 22 + .../{vbicq_m_n_s16.c => vqrshlq_m_n_s16.c} | 10 +- .../{vbicq_m_n_s32.c => vqrshlq_m_n_s32.c} | 10 +- .../{vbicq_m_n_s16.c => vqrshlq_m_n_s8.c} | 14 +- .../{vbicq_m_n_u16.c => vqrshlq_m_n_u16.c} | 10 +- .../{vbicq_m_n_u32.c => vqrshlq_m_n_u32.c} | 10 +- .../{vbicq_m_n_s32.c => vqrshlq_m_n_u8.c} | 14 +- .../{vbicq_m_n_s16.c => vqshlq_m_r_s16.c} | 10 +- .../{vbicq_m_n_s32.c => vqshlq_m_r_s32.c} | 10 +- .../{vbicq_m_n_s16.c => vqshlq_m_r_s8.c} | 14 +- .../{vbicq_m_n_u16.c => vqshlq_m_r_u16.c} | 10 +- .../{vbicq_m_n_u32.c => vqshlq_m_r_u32.c} | 10 +- .../{vbicq_m_n_s32.c => vqshlq_m_r_u8.c} | 14 +- .../{vbicq_m_n_s16.c => vrev64q_m_s16.c} | 10 +- .../{vbicq_m_n_s32.c => vrev64q_m_s32.c} | 10 +- .../intrinsics/{vbicq_m_n_s16.c => vrev64q_m_s8.c} | 14 +- .../{vbicq_m_n_u16.c => vrev64q_m_u16.c} | 10 +- .../{vbicq_m_n_u32.c => vrev64q_m_u32.c} | 10 +- .../intrinsics/{vbicq_m_n_s32.c => vrev64q_m_u8.c} | 14 +- .../{vbicq_m_n_s16.c => vrshlq_m_n_s16.c} | 10 +- .../{vbicq_m_n_s32.c => vrshlq_m_n_s32.c} | 10 +- .../{vbicq_m_n_s16.c => vrshlq_m_n_s8.c} | 14 +- .../{vbicq_m_n_u16.c => vrshlq_m_n_u16.c} | 10 +- .../{vbicq_m_n_u32.c => vrshlq_m_n_u32.c} | 10 +- .../{vbicq_m_n_s32.c => vrshlq_m_n_u8.c} | 14 +- .../{vbicq_m_n_s16.c => vshlq_m_r_s16.c} | 10 +- .../{vbicq_m_n_s32.c => vshlq_m_r_s32.c} | 10 +- .../intrinsics/{vbicq_m_n_s16.c => vshlq_m_r_s8.c} | 14 +- .../{vbicq_m_n_u16.c => vshlq_m_r_u16.c} | 10 +- .../{vbicq_m_n_u32.c => vshlq_m_r_u32.c} | 10 +- .../intrinsics/{vbicq_m_n_s32.c => vshlq_m_r_u8.c} | 14 +- .../mve/intrinsics/{veorq_s16.c => vsliq_n_s16.c} | 8 +- .../mve/intrinsics/{veorq_s32.c => vsliq_n_s32.c} | 8 +- .../mve/intrinsics/{vbicq_s8.c => vsliq_n_s8.c} | 8 +- .../mve/intrinsics/{veorq_u16.c => vsliq_n_u16.c} | 8 +- .../mve/intrinsics/{vabdq_u32.c => vsliq_n_u32.c} | 8 +- .../mve/intrinsics/{vabdq_u8.c => vsliq_n_u8.c} | 8 +- .../mve/intrinsics/{veorq_s16.c => vsriq_n_s16.c} | 8 +- .../mve/intrinsics/{veorq_s32.c => vsriq_n_s32.c} | 8 +- .../mve/intrinsics/{vbicq_s8.c => vsriq_n_s8.c} | 8 +- .../mve/intrinsics/{vabdq_u16.c => vsriq_n_u16.c} | 8 +- .../mve/intrinsics/{vabdq_u32.c => vsriq_n_u32.c} | 8 +- .../mve/intrinsics/{vabdq_u8.c => vsriq_n_u8.c} | 8 +- 266 files changed, 8233 insertions(+), 801 deletions(-) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vabsq_m_s16.c} (56%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vabsq_m_s32.c} (56%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vabsq_m_s8.c} (52%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vclsq_m_s16.c} (56%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vclsq_m_s32.c} (56%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vclsq_m_s8.c} (52%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vclzq_m_s16.c} (56%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vclzq_m_s32.c} (56%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vclzq_m_s8.c} (52%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u16.c => vclzq_m_u16.c} (55%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u32.c => vclzq_m_u32.c} (55%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vclzq_m_u8.c} (52%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpcsq_m_n_u16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpcsq_m_n_u32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpcsq_m_n_u8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpcsq_m_u16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpcsq_m_u32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpcsq_m_u8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpeqq_m_n_s16.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpeqq_m_n_s32.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpeqq_m_n_s8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpeqq_m_n_u16.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpeqq_m_n_u32.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpeqq_m_n_u8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpeqq_m_s16.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpeqq_m_s32.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpeqq_m_s8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpeqq_m_u16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpeqq_m_u32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpeqq_m_u8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpgeq_m_n_s16.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpgeq_m_n_s32.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpgeq_m_n_s8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpgeq_m_s16.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpgeq_m_s32.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpgeq_m_s8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpgtq_m_n_s16.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpgtq_m_n_s32.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpgtq_m_n_s8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpgtq_m_s16.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpgtq_m_s32.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpgtq_m_s8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmphiq_m_n_u16.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmphiq_m_n_u32.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmphiq_m_n_u8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmphiq_m_u16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmphiq_m_u32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmphiq_m_u8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpleq_m_n_s16.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpleq_m_n_s32.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpleq_m_n_s8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpleq_m_s16.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpleq_m_s32.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpleq_m_s8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpltq_m_n_s16.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpltq_m_n_s32.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpltq_m_n_s8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpltq_m_s16.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpltq_m_s32.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpltq_m_s8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpneq_m_n_s16.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpneq_m_n_s32.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpneq_m_n_s8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpneq_m_n_u16.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpneq_m_n_u32.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpneq_m_n_u8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpneq_m_s16.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpneq_m_s32.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpneq_m_s8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpneq_m_u16.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpneq_m_u32.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp16q_m.c => vcmpneq_m_u8.c} (59%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vdupq_m_n_s16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vdupq_m_n_s32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vdupq_m_n_s8. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u16.c => vdupq_m_n_u16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u32.c => vdupq_m_n_u32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vdupq_m_n_u8. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u16.c => vmaxaq_m_s16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u32.c => vmaxaq_m_s32. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vmaxaq_m_s8.c} (54%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u16.c => vminaq_m_s16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u32.c => vminaq_m_s32. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vminaq_m_s8.c} (54%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vabavq_u16.c => vmladavaq_u16.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vabavq_u32.c => vmladavaq_u32.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vabavq_u8.c => vmladavaq_u8.c} (63%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vmvnq_m_s16.c} (56%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vmvnq_m_s32.c} (56%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vmvnq_m_s8.c} (52%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u16.c => vmvnq_m_u16.c} (56%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u32.c => vmvnq_m_u32.c} (56%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vmvnq_m_u8.c} (52%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vnegq_m_s16.c} (56%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vnegq_m_s32.c} (56%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vnegq_m_s8.c} (52%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vqabsq_m_s16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vqabsq_m_s32. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vqabsq_m_s8.c} (52%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vqnegq_m_s16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vqnegq_m_s32. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vqnegq_m_s8.c} (52%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vqrshlq_m_n_s [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vqrshlq_m_n_s [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vqrshlq_m_n_s [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u16.c => vqrshlq_m_n_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u32.c => vqrshlq_m_n_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vqrshlq_m_n_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vqshlq_m_r_s1 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vqshlq_m_r_s3 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vqshlq_m_r_s8 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u16.c => vqshlq_m_r_u1 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u32.c => vqshlq_m_r_u3 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vqshlq_m_r_u8 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vrev64q_m_s16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vrev64q_m_s32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vrev64q_m_s8. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u16.c => vrev64q_m_u16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u32.c => vrev64q_m_u32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vrev64q_m_u8. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vrshlq_m_n_s1 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vrshlq_m_n_s3 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vrshlq_m_n_s8 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u16.c => vrshlq_m_n_u1 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u32.c => vrshlq_m_n_u3 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vrshlq_m_n_u8 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vshlq_m_r_s16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vshlq_m_r_s32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vshlq_m_r_s8. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u16.c => vshlq_m_r_u16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u32.c => vshlq_m_r_u32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vshlq_m_r_u8. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{veorq_s16.c => vsliq_n_s16.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{veorq_s32.c => vsliq_n_s32.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_s8.c => vsliq_n_s8.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{veorq_u16.c => vsliq_n_u16.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vabdq_u32.c => vsliq_n_u32.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vabdq_u8.c => vsliq_n_u8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{veorq_s16.c => vsriq_n_s16.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{veorq_s32.c => vsriq_n_s32.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_s8.c => vsriq_n_s8.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vabdq_u16.c => vsriq_n_u16.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vabdq_u32.c => vsriq_n_u32.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vabdq_u8.c => vsriq_n_u8.c} (64%)
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