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from f270fd72f66 Fix non-pointer type compilation error in aix-thread.c new aa8c9d60a6f RISC-V: Remove RV128-only fmv instructions new 9ecdcd1be1e RISC-V: Update zfinx implement with zicsr.

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Summary of changes: bfd/elfxx-riscv.c | 1 + ...csr-insns-pseudo.d => csr-insns-pseudo-zfinx.d} | 2 +- gas/testsuite/gas/riscv/fmv.x.q-rv64-fail.d | 3 +++ gas/testsuite/gas/riscv/fmv.x.q-rv64-fail.l | 3 +++ gas/testsuite/gas/riscv/fmv.x.q-rv64-fail.s | 2 ++ include/opcode/riscv-opc.h | 6 ----- opcodes/riscv-opc.c | 30 ++++++++++------------ 7 files changed, 24 insertions(+), 23 deletions(-) copy gas/testsuite/gas/riscv/{csr-insns-pseudo.d => csr-insns-pseudo-zfinx.d} (98%) create mode 100644 gas/testsuite/gas/riscv/fmv.x.q-rv64-fail.d create mode 100644 gas/testsuite/gas/riscv/fmv.x.q-rv64-fail.l create mode 100644 gas/testsuite/gas/riscv/fmv.x.q-rv64-fail.s