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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allnoconfig in repository toolchain/ci/llvm-project.

from 778e445c58c [LoopVectorize] Add FNeg instruction support adds ec1b4d1f6fb Fix OMP_TARGET_OFFLOAD parsing adds 9bbdde25980 [LV] Remove the redundant using LoopVectorizationPlanner:VPlanPtr adds 7fecdf36cc5 [AMDGPU] Added target-specific attribute amdgpu-max-memory-clause adds b7141207a48 Reapply: IR: add optional type to 'byval' function parameters adds fcb00d4aec7 Reapply: LLVM IR: update Clang tests for byval being a type [...] adds ef95679741e [DAGCombine] Use FoldConstantArithmetic() to perform ((c1-A [...] adds cc9a9cf2378 [DAGCombine] ((A-c1)+c2) -> (A+(c2-c1)) constant-fold adds 9ff3159b4ae [DAGCombine] Use FoldConstantArithmetic() to perform C2-(A+ [...] adds 0a3dbbcdfb5 [DAGCombine] (A+C1)-C2 -> A+(C1-C2) constant-fold adds 691b5e2eccc [DAGCombine] (A-C1)-C2 -> A-(C1+C2) constant-fold adds 7eb8b5b5ddb [DAGCombine] ((c1-A)-c2) -> ((c1-c2)-A) constant-fold adds e0a4da8c0a2 AMDGPU/GlobalISel: Add wave scratch offset argument adds 04a38b924e7 [NFC][InstCombine] Add unary FNeg tests to fmul.ll adds 5f0f4e3ae03 [GWP-ASan] Mutex implementation [2]. adds 0e124b37bd7 [RuntimeDyld] Apply padding and alignment bumps to all sect [...] adds 9b2aeb77b04 Mark test as requiring an ARM target. adds c58130bc844 Write new tests for r362121 adds 1d9ec7a81b7 [DAGCombiner][X86][AArch64][AMDGPU] (x + C) - y -> (x - y [...] adds 05ad5fd213c [DAGCombiner][X86][AArch64][SPARC][SystemZ] y - (x + C) -> [...] adds 63b4741534a [DAGCombine][X86][AArch64][AMDGPU] (x - y) + -1 -> add (x [...] adds 57aa36ff916 [DAGCombine] (x - C) - y -> (x - y) - C fold. Try 3 adds a4e3b50e265 [DAGCombiner][X86][AArch64] (x - C) + y -> (x + y) - C f [...] adds a481b01e958 [c++2a] Fix assertion failure if we would walk over more th [...] adds 5c4c44310a3 [pstl] Remove various warnings in the pstl headers and tests adds 9bd9a03ad04 Attempt to fix 'mutex.h' not found when building mutex_posix. adds 0fe645c0866 [InstCombine] Avoid use after free in DenseMap, when built [...] adds a100042b27f [RuntimeDyld] Update reserveAllocationSpace to account for [...] adds e906f2a370e [CVP] Generalize willNotOverflow(); NFC adds 751be7d51a3 [CVP] Add tests for non-overflowing saturating math; NFC adds 41dc5526a69 [Target] Generalize Process::IsPossibleDynamicValue adds e38a82405b8 [pstl] Use OpenMP pragmas with Clang, which supports them adds 46511d75b5b [DAGCombine] Limit 'hoist add/sub binop w/ constant op' to [...] adds fc3dfd3e35a Fix constexpr __builtin_*_overflow issue when unsigned->sig [...] adds daaecf98c9a [MIR-Canon] Fixing case where MachineFunction is empty. adds 31f19398483 [NFC][ARM] Add a test that potentially causes endless combi [...] adds 6ada11f1346 [Remarks][NFC] Move the serialization to lib/Remarks adds 86e73f51d77 [WebAssembly] Improve feature validation error messages adds 365e5924805 Attempt to fix test failure for armv8. adds e5a7a858f56 [Target] Generalize language-specific behavior in ThreadPla [...] adds 48998d10e08 [Remarks] Fix usage of enum class adds dd3a9caf477 Add enums as global variables in the IR metadata. adds 5e1881f9b23 Update the tests in r362121 / r362141 to allow for Windows- [...] adds f1e300ca1ad Fix test to add missing '|' to regex. adds 760a9ee63c9 Support codesigning bundles and forcing adds d6b74cc859a [X86] Remove code that unnecessarily sets EXTLOAD with src [...] adds 073f3f1609c Fix "fallthrough annotation in unreachable code" warning. adds 375dec5e451 Refactor OpenMP stack management. adds d556095135c Make ConnectionFileDescription work with all sockets adds 18659f84b2c MISched: Fix -misched-regpressure=0 if subreg liveness enabled adds 70dc2200a2d [X86] Remove result type constraints from the extloadv2f32/ [...] adds b2f45ac2995 [clangd] clang-format SymbolCollector.cpp adds 4a585a3edd1 Make CPlusPlusNameParser robust against nullptr StringRefs. adds 2fdd95c1c82 Defer capture initialization for blocks until after we've l [...] adds 0621a8f3536 Defer capture initialization for captured regions until aft [...] adds 9d21f510ee4 Fix -DBUILD_SHARED_LIBS=ON build after rL362160 adds a35c50c9a4d [CMake][Fuchsia] Use libc++ ABI v2 on Darwin as well adds b5a45bb77e0 Defer building 'this' captures until we have left the captu [...] adds 059b823e709 Fix the predefined exponent limit macros for the 16-bit IEE [...] adds dbd3ce92e69 PR39728: When completing a class, complete the destructor first. adds 2ab7af29c6c [CMake] Provide an option to use relative paths in debug info adds 48387ec1872 Revert "[X86] Fix i386 struct and union parameter alignment" adds d2f53af605a Redirect test output to /dev/null adds 2e67d0c842c [X86] Add VP2INTERSECT instructions adds 20b80fc4842 Fix bad go bindings test. adds fc3ed1ec506 re-commit r361928: [PowerPC] [Clang] Port SSE intrinsics to [...] adds 2a901401fe4 [MIR-Canon] Hardening propagateLocalCopies. adds c9e27be5855 Fix off-by-one error. adds 23066033a1b [X86] Correct the ins operand order for MASKPAIR16STORE to [...] adds 30935ef0bcd Fix problem with r362192 adds 0d63cef180c [MIR-Canon] Skip the first N vreg names lazily. adds cc3629d545a [X86] Add VP2INTERSECT instructions adds 8cb076ec6e0 [X86] Add test case for PR42079. NFC adds 73b07284df2 [X86] Add test to show missed opportunity to use masked vcv [...] adds b79cc5f8024 [X86] Remove avx512 isel patterns for fpextend+load. Prefer [...] adds cb0ad5accba [X86] Copy a test case from avx512-cvt.ll to avx512-cvt-wid [...] adds 67d43e07444 [X86] Add test cases for a volatile load shrinking bug invo [...] adds cded5737109 [X86] Add test cases for failure to use 128-bit masked vcvt [...] adds 31d00d80a21 [X86] Remove patterns for X86VSintToFP/X86VUintToFP+loadv4f [...] adds f4a6dd28b6a [MIPS GlobalISel] Lower call for callee that is register adds b457e430f3f [InstructionSimplify] Add missing implementation of llvm::S [...] adds 9058b50fb2d [mips] Move initGlobalBaseReg to MipsFunctionInfo. NFC adds 750d148e8fe [ELF][test] Restore linkerscript/symbol-location.s to test [...] adds 7c1ac8269ac [NFC][Codegen] Add/sub constant-folding: add scalar tests too adds d1d915b8da9 [NFC][InstCombine] Copy add/sub constant-folding tests from [...] adds efcd3c00099 [MIPS GlobalISel] Handle position independent code adds 3cac8d258ac Follow up and fix for rL362064 adds f317debdb80 [MIPS GlobalISel] Add detailed tests for lower call adds 2e870011b62 [AArch64][SVE2] Asm: support SVE2 store instructions adds 087d1337f8a [AArch64][SVE2] Asm: support TBL/TBX instructions adds 0fc3a073985 [AArch64][SVE2] Asm: support WHILE instructions adds 886c4ef35aa [InstCombine] 'add (sub C1, X), C2 --> sub (add C1, C2), X' [...] adds 39390d83170 [InstCombine] 'C-(C2-X) --> X+(C-C2)' constant-fold adds 3f29cfd9154 [ELF] Replace a dead test in getSymVA() with assert() adds 802c9b59d5c ftime-trace: Trace loop passes adds e98baf86312 [ELF] Delete GotEntrySize and GotPltEntrySize adds 10c548b8398 gn build: Merge r362190 adds f23ae7348f4 gn build: Merge r362196 adds 155bd6c3b06 gn build: Merge r362160 adds 60d88e0e905 [llvm-readobj] - Remove excessive `dynamic.test` adds 54182eb7b0d Fix for PR42089, regression from r362119 adds 488c509d457 [clangd] Add missing license for rename.cpp, NFC. adds 66c25def005 [NFC][InstCombine] Add unary FNeg tests to fma.ll adds dc0e6c009b8 [UpdateTestChecks] Add support for -march=r600 to match exi [...] adds 27d6ea9698c [AMDGPU] Regenerate CTLZ tests for an upcoming patch adds db6a1d4f241 [AMDGPU] Regenerate add/sub shrink constant tests for an up [...] adds aea3149e6c7 [NFC][InstCombine] Add unary FNeg tests to fdiv.ll adds 42d6c268b27 Revise test case due to the change from CUDA 10+. adds 18e7bf5c4dc [MachinePipeliner][NFC] Add some debug log and statistics adds 6d2a4712f3a [NFC][InstCombine] Add unary FNeg tests to fcmp.ll adds 7477fcd93a8 [PPC64][test] Delete redundant labels from ppc64-relocs.s adds 24016eb3746 Suppress nothrow/exception spec conflict warning when ES is [...] adds c3a24e93d52 [PPC] Correctly adjust branch probability in PPCReduceCRLogicals adds 8ff009a461a [NFC][InstCombine] Add unary FNeg tests to fabs.ll adds fbbe5230f43 [AMDGPU] Use InliningThresholdMultiplier for inline hint adds a33964b5700 [FormatEntity] Ignore ASCII escape sequences when colors ar [...] adds ac79007205e Revert revert of r362112 with minor SystemZ test file corrections. adds 1e692d1777a [CVP] Simplify non-overflowing saturating add/sub adds c61762797ea Suppress nothrow/Exception spec conflict warning when we do [...] adds 8dda4a16753 [Tests] Add tests for loop predication of loops w/ne latch [...] adds 68fa6ddb9d4 Replace 'default' in an enum-over-a-switch with the missing list. adds 312f3a2bbf4 [MCA] Refactor class BottleneckAnalysis. NFCI adds 3ea6b24f414 [MIR-Canon] Don't do vreg skip for independent instructions [...] adds 0c84dafd6b5 [CMake] Feed BUNDLE_PATH through llvm target wrappers adds 4595f01b062 [analyzer] print() JSONify: ExplodedNode revision new 065bd45da9d [MCA] Remove unused fields from BottleneckAnalysis. NFC

The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: clang-tools-extra/clangd/index/SymbolCollector.cpp | 7 +- clang-tools-extra/clangd/refactor/Rename.cpp | 10 +- .../cmake/modules/CreateClangdXPCFramework.cmake | 5 + clang/cmake/caches/Fuchsia-stage2.cmake | 2 + clang/docs/ClangCommandLineReference.rst | 2 + clang/include/clang/Basic/BuiltinsX86.def | 6 + clang/include/clang/Driver/Options.td | 2 + clang/include/clang/Sema/AnalysisBasedWarnings.h | 2 +- clang/include/clang/Sema/ScopeInfo.h | 39 +- clang/include/clang/Sema/Sema.h | 25 +- clang/lib/AST/ExprConstant.cpp | 9 +- clang/lib/Basic/Targets/X86.cpp | 8 +- clang/lib/Basic/Targets/X86.h | 1 + clang/lib/CodeGen/CGBuiltin.cpp | 42 + clang/lib/CodeGen/CGDebugInfo.cpp | 12 +- clang/lib/CodeGen/CMakeLists.txt | 1 + clang/lib/CodeGen/CodeGenAction.cpp | 3 +- clang/lib/CodeGen/TargetInfo.cpp | 13 +- clang/lib/Frontend/InitPreprocessor.cpp | 6 +- clang/lib/Headers/CMakeLists.txt | 4 + clang/lib/Headers/avx512vlvp2intersectintrin.h | 121 + clang/lib/Headers/avx512vp2intersectintrin.h | 77 + clang/lib/Headers/immintrin.h | 10 + clang/lib/Headers/ppc_wrappers/mm_malloc.h | 48 + clang/lib/Headers/ppc_wrappers/xmmintrin.h | 1838 ++++++ clang/lib/Sema/AnalysisBasedWarnings.cpp | 9 +- clang/lib/Sema/ScopeInfo.cpp | 20 +- clang/lib/Sema/Sema.cpp | 47 +- clang/lib/Sema/SemaDecl.cpp | 4 +- clang/lib/Sema/SemaDeclCXX.cpp | 92 +- clang/lib/Sema/SemaExceptionSpec.cpp | 15 +- clang/lib/Sema/SemaExpr.cpp | 147 +- clang/lib/Sema/SemaExprCXX.cpp | 35 +- clang/lib/Sema/SemaLambda.cpp | 46 +- clang/lib/Sema/SemaOpenMP.cpp | 508 +- clang/lib/Sema/SemaStmt.cpp | 46 +- clang/lib/Sema/SemaType.cpp | 14 +- clang/lib/StaticAnalyzer/Core/ExprEngine.cpp | 6 +- clang/runtime/CMakeLists.txt | 2 +- clang/test/AST/ast-dump-expr-json.cpp | 6 +- clang/test/AST/ast-dump-expr.cpp | 4 +- clang/test/Analysis/blocks.mm | 7 +- clang/test/CodeGen/aapcs-align.cpp | 4 +- clang/test/CodeGen/attr-target-x86.c | 4 +- clang/test/CodeGen/intel-avx512vlvp2intersect.c | 36 + clang/test/CodeGen/intel-avx512vp2intersect.c | 20 + clang/test/CodeGen/ppc-mm-malloc-le.c | 72 + clang/test/CodeGen/ppc-mm-malloc.c | 72 + clang/test/CodeGen/ppc-mmintrin.c | 9 +- clang/test/CodeGen/ppc-xmmintrin.c | 2090 +++++++ clang/test/CodeGen/x86_32-align-linux.c | 25 - clang/test/CodeGen/x86_32-arguments-linux.c | 24 +- clang/test/CodeGenCXX/builtin-source-location.cpp | 4 +- clang/test/CodeGenCXX/debug-info-enum.cpp | 14 + clang/test/CodeGenCXX/wasm-args-returns.cpp | 4 +- .../test/CodeGenCXX/x86_64-arguments-nacl-x32.cpp | 2 +- .../test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl | 16 +- .../kernels-have-spir-cc-by-default.cl | 6 +- clang/test/Driver/armv8.1m.main.s | 11 +- clang/test/Driver/offloading-interoperability.c | 2 +- clang/test/Driver/x86-target-features.c | 5 + clang/test/Headers/float16.c | 6 +- clang/test/Headers/ppc-intrinsics.c | 13 - clang/test/Headers/ppc-mmx-intrinsics.c | 11 + clang/test/Headers/ppc-sse-intrinsics.c | 22 + clang/test/OpenMP/for_lastprivate_codegen.cpp | 5 +- clang/test/Preprocessor/init.c | 6 +- clang/test/Preprocessor/x86_target_features.c | 10 + clang/test/SemaCXX/MicrosoftExtensions.cpp | 9 + clang/test/SemaCXX/builtins-overflow.cpp | 3 + clang/test/SemaCXX/constant-expression-cxx1y.cpp | 16 + clang/test/SemaCXX/constant-expression-cxx2a.cpp | 10 + clang/test/SemaCXX/lambda-expressions.cpp | 6 +- clang/test/SemaCXX/nothrow-vs-exception-specs.cpp | 16 + compiler-rt/lib/gwp_asan/CMakeLists.txt | 8 +- compiler-rt/lib/gwp_asan/mutex.h | 50 + .../lib/gwp_asan/platform_specific/mutex_posix.cpp | 30 + compiler-rt/lib/gwp_asan/tests/CMakeLists.txt | 49 + compiler-rt/lib/gwp_asan/tests/driver.cpp | 14 + compiler-rt/lib/gwp_asan/tests/mutex_test.cpp | 89 + compiler-rt/test/gwp_asan/CMakeLists.txt | 45 + compiler-rt/test/gwp_asan/dummy_test.cc | 4 + compiler-rt/test/gwp_asan/lit.cfg | 31 + compiler-rt/test/gwp_asan/lit.site.cfg.in | 11 + compiler-rt/test/gwp_asan/unit/lit.site.cfg.in | 9 + lld/ELF/Arch/AArch64.cpp | 2 - lld/ELF/Arch/AMDGPU.cpp | 1 - lld/ELF/Arch/ARM.cpp | 2 - lld/ELF/Arch/Hexagon.cpp | 3 +- lld/ELF/Arch/Mips.cpp | 2 - lld/ELF/Arch/PPC64.cpp | 2 - lld/ELF/Arch/SPARCV9.cpp | 1 - lld/ELF/Arch/X86.cpp | 2 - lld/ELF/Arch/X86_64.cpp | 2 - lld/ELF/Symbols.cpp | 20 +- lld/ELF/SyntheticSections.cpp | 18 +- lld/ELF/Target.h | 2 - lld/test/ELF/linkerscript/symbol-location.s | 16 + lld/test/ELF/ppc64-relocs.s | 100 +- lld/test/wasm/shared-memory-no-atomics.yaml | 2 +- lld/test/wasm/target-feature-required.yaml | 6 +- lld/test/wasm/target-feature-used.yaml | 4 +- lld/wasm/Writer.cpp | 52 +- lldb/include/lldb/Core/FormatEntity.h | 2 +- lldb/include/lldb/Host/Socket.h | 3 + lldb/include/lldb/Host/common/TCPSocket.h | 2 + lldb/include/lldb/Host/common/UDPSocket.h | 2 + lldb/include/lldb/Host/posix/DomainSocket.h | 3 + lldb/include/lldb/Target/CPPLanguageRuntime.h | 2 +- lldb/include/lldb/Target/LanguageRuntime.h | 3 + lldb/include/lldb/Target/ObjCLanguageRuntime.h | 3 - lldb/lit/Settings/Inputs/main.c | 2 + lldb/lit/Settings/TestFrameFormatColor.test | 12 + lldb/lit/Settings/TestFrameFormatNoColor.test | 12 + lldb/source/Core/FormatEntity.cpp | 27 +- lldb/source/Host/common/TCPSocket.cpp | 8 + lldb/source/Host/common/UDPSocket.cpp | 8 + .../Host/posix/ConnectionFileDescriptorPosix.cpp | 8 +- lldb/source/Host/posix/DomainSocket.cpp | 28 + .../Language/CPlusPlus/CPlusPlusNameParser.cpp | 2 + .../GDBRemoteCommunicationServerPlatform.cpp | 23 +- lldb/source/Target/Process.cpp | 10 +- lldb/source/Target/ThreadPlanStepThrough.cpp | 26 +- lldb/unittests/Host/SocketTest.cpp | 62 + .../Language/CPlusPlus/CPlusPlusLanguageTest.cpp | 6 + llvm/bindings/go/llvm/ir_test.go | 1 - llvm/cmake/modules/AddLLVM.cmake | 22 +- llvm/cmake/modules/HandleLLVMOptions.cmake | 16 + llvm/cmake/modules/LLVMExternalProjectUtils.cmake | 2 + llvm/docs/LangRef.rst | 5 +- llvm/docs/ReleaseNotes.rst | 5 + llvm/include/llvm/CodeGen/TargetLowering.h | 1 + llvm/include/llvm/IR/Argument.h | 3 + llvm/include/llvm/IR/Attributes.h | 20 + llvm/include/llvm/IR/CallSite.h | 5 + llvm/include/llvm/IR/DiagnosticInfo.h | 13 +- llvm/include/llvm/IR/Function.h | 5 + llvm/include/llvm/IR/InstrTypes.h | 5 + llvm/include/llvm/IR/IntrinsicsX86.td | 28 + llvm/include/llvm/IR/RemarkStreamer.h | 34 +- llvm/include/llvm/Remarks/RemarkSerializer.h | 68 + llvm/include/llvm/Support/BranchProbability.h | 13 + .../llvm/Support/X86DisassemblerDecoderCommon.h | 1 + llvm/lib/Analysis/InstructionSimplify.cpp | 4 + llvm/lib/Analysis/LoopPass.cpp | 3 + llvm/lib/AsmParser/LLParser.cpp | 24 +- llvm/lib/AsmParser/LLParser.h | 1 + llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 50 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 15 +- llvm/lib/Bitcode/Writer/ValueEnumerator.cpp | 6 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 26 +- llvm/lib/CodeGen/GlobalISel/CallLowering.cpp | 5 +- llvm/lib/CodeGen/MIRCanonicalizerPass.cpp | 37 +- llvm/lib/CodeGen/MachinePipeliner.cpp | 83 +- llvm/lib/CodeGen/MachineScheduler.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 95 +- llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 8 +- llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h | 5 + .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 59 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 18 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 1 + .../ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp | 20 +- .../RuntimeDyld/Targets/RuntimeDyldMachOX86_64.h | 2 +- llvm/lib/IR/AttributeImpl.h | 32 +- llvm/lib/IR/Attributes.cpp | 116 +- llvm/lib/IR/DiagnosticInfo.cpp | 137 - llvm/lib/IR/Function.cpp | 5 + llvm/lib/IR/RemarkStreamer.cpp | 78 +- llvm/lib/IR/Verifier.cpp | 5 + llvm/lib/LTO/LLVMBuild.txt | 1 + llvm/lib/LTO/LTO.cpp | 5 +- llvm/lib/Linker/IRMover.cpp | 20 + llvm/lib/Remarks/CMakeLists.txt | 1 + llvm/lib/Remarks/YAMLRemarkSerializer.cpp | 166 + llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 29 + llvm/lib/Target/AArch64/SVEInstrFormats.td | 110 +- llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp | 42 + llvm/lib/Target/AMDGPU/AMDGPUInline.cpp | 3 +- llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp | 4 +- llvm/lib/Target/Mips/MipsCallLowering.cpp | 33 +- llvm/lib/Target/Mips/MipsInstructionSelector.cpp | 65 +- llvm/lib/Target/Mips/MipsMachineFunction.cpp | 96 + llvm/lib/Target/Mips/MipsMachineFunction.h | 5 + llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp | 1 + llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp | 91 +- llvm/lib/Target/Mips/MipsSEISelDAGToDAG.h | 4 - llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp | 41 +- llvm/lib/Target/X86/AsmParser/X86Operand.h | 49 + .../Target/X86/Disassembler/X86Disassembler.cpp | 1 + .../X86/Disassembler/X86DisassemblerDecoder.cpp | 4 + .../X86/Disassembler/X86DisassemblerDecoder.h | 7 + .../X86/MCTargetDesc/X86InstPrinterCommon.cpp | 25 + .../Target/X86/MCTargetDesc/X86InstPrinterCommon.h | 1 + llvm/lib/Target/X86/X86.td | 4 + llvm/lib/Target/X86/X86ISelLowering.cpp | 32 +- llvm/lib/Target/X86/X86ISelLowering.h | 3 + llvm/lib/Target/X86/X86InstrAVX512.td | 94 +- llvm/lib/Target/X86/X86InstrFragmentsSIMD.td | 10 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 8 + llvm/lib/Target/X86/X86InstrInfo.td | 28 + llvm/lib/Target/X86/X86InstrSSE.td | 14 +- llvm/lib/Target/X86/X86MCInstLower.cpp | 71 + llvm/lib/Target/X86/X86RegisterInfo.td | 12 + llvm/lib/Target/X86/X86Subtarget.h | 4 + .../Transforms/InstCombine/InstCombineAddSub.cpp | 16 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 5 +- .../Scalar/CorrelatedValuePropagation.cpp | 35 +- llvm/lib/Transforms/Utils/ValueMapper.cpp | 15 + .../Vectorize/LoopVectorizationPlanner.h | 4 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 7 +- llvm/runtimes/CMakeLists.txt | 2 + llvm/test/Assembler/byval-type-attr.ll | 31 + llvm/test/Assembler/invalid-byval-type1.ll | 4 + llvm/test/Assembler/invalid-byval-type2.ll | 4 + llvm/test/Assembler/invalid-byval-type3.ll | 4 + llvm/test/Bitcode/Inputs/byval-upgrade.bc | Bin 0 -> 1092 bytes llvm/test/Bitcode/attributes-3.3.ll | 2 +- llvm/test/Bitcode/attributes.ll | 2 +- llvm/test/Bitcode/byval-upgrade.test | 7 + llvm/test/Bitcode/compatibility-3.6.ll | 2 +- llvm/test/Bitcode/compatibility-3.7.ll | 2 +- llvm/test/Bitcode/compatibility-3.8.ll | 2 +- llvm/test/Bitcode/compatibility-3.9.ll | 2 +- llvm/test/Bitcode/compatibility-4.0.ll | 2 +- llvm/test/Bitcode/compatibility-5.0.ll | 2 +- llvm/test/Bitcode/compatibility-6.0.ll | 2 +- llvm/test/Bitcode/compatibility.ll | 11 +- llvm/test/Bitcode/highLevelStructure.3.2.ll | 4 +- .../CodeGen/AArch64/addsub-constant-folding.ll | 497 +- llvm/test/CodeGen/AArch64/byval-type.ll | 37 + llvm/test/CodeGen/AArch64/shift-amount-mod.ll | 10 +- llvm/test/CodeGen/AArch64/sink-addsub-of-const.ll | 36 +- llvm/test/CodeGen/AArch64/xor.ll | 18 +- .../irtranslator-amdgpu_kernel-system-sgprs.ll | 10 + llvm/test/CodeGen/AMDGPU/ctlz.ll | 1134 +++- llvm/test/CodeGen/AMDGPU/disable_form_clauses.ll | 65 + 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llvm/test/CodeGen/X86/addsub-constant-folding.ll | 770 ++- llvm/test/CodeGen/X86/avx512-cvt-widen.ll | 125 + llvm/test/CodeGen/X86/avx512-cvt.ll | 125 + .../CodeGen/X86/avx512vlvp2intersect-intrinsics.ll | 593 ++ .../CodeGen/X86/avx512vp2intersect-intrinsics.ll | 240 + llvm/test/CodeGen/X86/combine-add.ll | 4 +- .../CodeGen/X86/inline-asm-avx512f-x-constraint.ll | 3 +- llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll | 83 +- llvm/test/CodeGen/X86/shift-amount-mod.ll | 9 +- llvm/test/CodeGen/X86/sink-addsub-of-const.ll | 64 +- llvm/test/CodeGen/X86/vec_fpext.ll | 46 + llvm/test/CodeGen/X86/vec_int_to_fp-widen.ll | 294 +- llvm/test/CodeGen/X86/vec_int_to_fp.ll | 294 +- llvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll | 20 +- llvm/test/CodeGen/X86/vector-idiv-sdiv-256.ll | 16 +- llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll | 12 +- .../CodeGen/X86/vp2intersect_multiple_pairs.ll | 150 + llvm/test/CodeGen/X86/xor.ll | 62 +- llvm/test/CodeGen/X86/zext-sext.ll | 21 +- llvm/test/DebugInfo/COFF/global-constants.ll | 148 +- .../RuntimeDyld/X86/MachO_x86-64_PIC_relocations.s | 5 +- llvm/test/Linker/Inputs/byval-types-1.ll | 8 + llvm/test/Linker/byval-types.ll | 17 + llvm/test/MC/AArch64/SVE/stnt1b-diagnostics.s | 4 +- llvm/test/MC/AArch64/SVE2/stnt1b-diagnostics.s | 82 + llvm/test/MC/AArch64/SVE2/stnt1b.s | 80 + llvm/test/MC/AArch64/SVE2/stnt1d-diagnostics.s | 82 + llvm/test/MC/AArch64/SVE2/stnt1d.s | 44 + llvm/test/MC/AArch64/SVE2/stnt1h-diagnostics.s | 82 + llvm/test/MC/AArch64/SVE2/stnt1h.s | 80 + llvm/test/MC/AArch64/SVE2/stnt1w-diagnostics.s | 82 + llvm/test/MC/AArch64/SVE2/stnt1w.s | 80 + llvm/test/MC/AArch64/SVE2/tbl-diagnostics.s | 51 + llvm/test/MC/AArch64/SVE2/tbl.s | 32 + llvm/test/MC/AArch64/SVE2/tbx-diagnostics.s | 22 + llvm/test/MC/AArch64/SVE2/tbx.s | 32 + llvm/test/MC/AArch64/SVE2/whilege-diagnostics.s | 29 + llvm/test/MC/AArch64/SVE2/whilege.s | 68 + llvm/test/MC/AArch64/SVE2/whilegt-diagnostics.s | 29 + llvm/test/MC/AArch64/SVE2/whilegt.s | 68 + llvm/test/MC/AArch64/SVE2/whilehi-diagnostics.s | 29 + llvm/test/MC/AArch64/SVE2/whilehi.s | 68 + llvm/test/MC/AArch64/SVE2/whilehs-diagnostics.s | 29 + llvm/test/MC/AArch64/SVE2/whilehs.s | 68 + llvm/test/MC/AArch64/SVE2/whilerw-diagnostics.s | 25 + llvm/test/MC/AArch64/SVE2/whilerw.s | 32 + llvm/test/MC/AArch64/SVE2/whilewr-diagnostics.s | 25 + llvm/test/MC/AArch64/SVE2/whilewr.s | 32 + .../X86/avx512-vp2intersect-32-att.txt | 16 + .../X86/avx512-vp2intersect-64-att.txt | 16 + .../X86/avx512_vp2intersect-32-intel.txt | 43 + .../X86/avx512_vp2intersect-64-intel.txt | 43 + .../Disassembler/X86/avx512vp2intersectvl-att.txt | 86 + .../X86/avx512vp2intersectvl-intel.txt | 85 + .../X86/x86-64-avx512vp2intersectvl-att.txt | 85 + .../X86/x86-64-avx512vp2intersectvl-intel.txt | 85 + llvm/test/MC/X86/avx512vp2intersectvl-att.s | 113 + llvm/test/MC/X86/avx512vp2intersectvl-intel.s | 113 + .../test/MC/X86/x86-32-avx512_vp2intersect-intel.s | 57 + llvm/test/MC/X86/x86-32-avx512vp2intersect-att.s | 225 + .../test/MC/X86/x86-64-avx512_vp2intersect-intel.s | 57 + llvm/test/MC/X86/x86-64-avx512vp2intersect-att.s | 231 + llvm/test/MC/X86/x86-64-avx512vp2intersectvl-att.s | 113 + .../MC/X86/x86-64-avx512vp2intersectvl-intel.s | 113 + .../CorrelatedValuePropagation/overflows.ll | 100 +- llvm/test/Transforms/Inline/AMDGPU/inline-hint.ll | 77 + llvm/test/Transforms/Inline/byval-tail-call.ll | 4 +- .../InstCombine/addsub-constant-folding.ll | 528 ++ llvm/test/Transforms/InstCombine/fabs.ll | 76 + llvm/test/Transforms/InstCombine/fcmp.ll | 118 + llvm/test/Transforms/InstCombine/fdiv.ll | 118 + llvm/test/Transforms/InstCombine/fma.ll | 96 + llvm/test/Transforms/InstCombine/fmul.ll | 205 + llvm/test/Transforms/LoopPredication/basic.ll | 172 + .../tools/llvm-objdump/X86/Inputs/hello-macho-fat | Bin 0 -> 25072 bytes .../llvm-objdump/X86/Inputs/hello-macho-fat.dwarf | Bin 0 -> 17713 bytes .../tools/llvm-objdump/X86/Inputs/hello-macho-thin | Bin 0 -> 8696 bytes .../llvm-objdump/X86/Inputs/hello-macho-thin.dwarf | Bin 0 -> 8817 bytes .../llvm-objdump/X86/macho-disassemble-g-dsym.test | 15 + .../llvm-readobj/Inputs/dynamic-table-so.aarch64 | Bin 8960 -> 0 bytes .../test/tools/llvm-readobj/Inputs/dynamic-table.c | 2 - llvm/test/tools/llvm-readobj/dynamic.test | 246 - llvm/tools/llc/CMakeLists.txt | 1 + llvm/tools/llc/llc.cpp | 5 +- llvm/tools/llvm-mca/Views/BottleneckAnalysis.cpp | 298 +- llvm/tools/llvm-mca/Views/BottleneckAnalysis.h | 183 +- llvm/tools/llvm-mca/llvm-mca.cpp | 2 +- llvm/tools/llvm-objdump/MachODump.cpp | 63 +- llvm/tools/opt/CMakeLists.txt | 1 + llvm/tools/opt/opt.cpp | 3 +- llvm/unittests/IR/AttributesTest.cpp | 20 + llvm/utils/TableGen/GlobalISelEmitter.cpp | 3 +- llvm/utils/TableGen/X86RecognizableInstr.cpp | 20 + llvm/utils/UpdateTestChecks/asm.py | 1 + llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn | 4 + llvm/utils/gn/secondary/llvm/lib/Remarks/BUILD.gn | 1 + openmp/runtime/src/kmp_settings.cpp | 6 +- openmp/runtime/test/env/omp_target_offload.c | 62 + pstl/include/pstl/internal/algorithm_impl.h | 36 +- pstl/include/pstl/internal/numeric_impl.h | 2 +- .../pstl/internal/parallel_backend_serial.h | 4 +- pstl/include/pstl/internal/pstl_config.h | 2 +- pstl/include/pstl/internal/unseq_backend_simd.h | 16 +- pstl/include/pstl/internal/utils.h | 8 +- pstl/test/CMakeLists.txt | 2 + .../alg.modifying.operations/generate.pass.cpp | 6 +- .../alg.nonmodifying/adjacent_find.pass.cpp | 10 +- .../std/algorithms/alg.nonmodifying/equal.pass.cpp | 2 +- .../algorithms/alg.nonmodifying/find_end.pass.cpp | 4 +- .../algorithms/alg.nonmodifying/search_n.pass.cpp | 2 +- .../alg.sorting/alg.set.operations/set.pass.cpp | 2 +- pstl/test/std/algorithms/alg.sorting/sort.pass.cpp | 2 +- pstl/test/support/utils.h | 14 +- 367 files changed, 24370 insertions(+), 2629 deletions(-) create mode 100644 clang/lib/Headers/avx512vlvp2intersectintrin.h create mode 100644 clang/lib/Headers/avx512vp2intersectintrin.h create mode 100644 clang/lib/Headers/ppc_wrappers/mm_malloc.h create mode 100644 clang/lib/Headers/ppc_wrappers/xmmintrin.h create mode 100644 clang/test/CodeGen/intel-avx512vlvp2intersect.c create mode 100644 clang/test/CodeGen/intel-avx512vp2intersect.c create mode 100644 clang/test/CodeGen/ppc-mm-malloc-le.c create mode 100644 clang/test/CodeGen/ppc-mm-malloc.c create mode 100644 clang/test/CodeGen/ppc-xmmintrin.c delete mode 100644 clang/test/CodeGen/x86_32-align-linux.c delete mode 100644 clang/test/Headers/ppc-intrinsics.c create mode 100644 clang/test/Headers/ppc-mmx-intrinsics.c create mode 100644 clang/test/Headers/ppc-sse-intrinsics.c create mode 100644 compiler-rt/lib/gwp_asan/mutex.h create mode 100644 compiler-rt/lib/gwp_asan/platform_specific/mutex_posix.cpp create mode 100644 compiler-rt/lib/gwp_asan/tests/CMakeLists.txt create mode 100644 compiler-rt/lib/gwp_asan/tests/driver.cpp create mode 100644 compiler-rt/lib/gwp_asan/tests/mutex_test.cpp create mode 100644 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llvm/test/CodeGen/AArch64/byval-type.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel- [...] create mode 100644 llvm/test/CodeGen/AMDGPU/disable_form_clauses.ll create mode 100644 llvm/test/CodeGen/ARM/sub-from-const-hoisting.ll create mode 100644 llvm/test/CodeGen/MIR/AArch64/empty-MF.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/instruction-select/gloal_addr [...] create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/irtranslator/global_address_pic.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/global_address_pic.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/regbankselect/global_address_pic.mir create mode 100644 llvm/test/CodeGen/PowerPC/reduce_cr.ll create mode 100644 llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll create mode 100644 llvm/test/CodeGen/X86/avx512vlvp2intersect-intrinsics.ll create mode 100644 llvm/test/CodeGen/X86/avx512vp2intersect-intrinsics.ll create mode 100644 llvm/test/CodeGen/X86/vp2intersect_multiple_pairs.ll create mode 100644 llvm/test/Linker/Inputs/byval-types-1.ll create mode 100644 llvm/test/Linker/byval-types.ll create mode 100644 llvm/test/MC/AArch64/SVE2/stnt1b-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/stnt1b.s create mode 100644 llvm/test/MC/AArch64/SVE2/stnt1d-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/stnt1d.s create mode 100644 llvm/test/MC/AArch64/SVE2/stnt1h-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/stnt1h.s create mode 100644 llvm/test/MC/AArch64/SVE2/stnt1w-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/stnt1w.s create mode 100644 llvm/test/MC/AArch64/SVE2/tbl-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/tbl.s create mode 100644 llvm/test/MC/AArch64/SVE2/tbx-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/tbx.s create mode 100644 llvm/test/MC/AArch64/SVE2/whilege-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/whilege.s create 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