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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-arm in repository toolchain/ci/binutils-gdb.

from 50a97903ce sim: mips: use sim_fpu_to{32,64}u to fix build warnings adds eea68ebb33 Automatic date update in version.in adds 74bbe64132 sim: sh: rework register layout with anonymous unions & structs adds 7256320b95 sim: sh: fix unused-value warnings adds 6b015f8977 sim: sh: fix various parentheses warnings adds ee7af46230 sim: sh: constify a few read-only lookup tables adds 524d770c9c sim: sh: fix uninitialized variable usage with pdmsb adds e6af0f123a sim: sh: enable -Werror everywhere new b44c5d6e21 sim: ppc: switch to libiberty environ.h new fd0975b96b sim: arm/bfin/rx: undefine page size from system headers new 697fa6fe67 sim: sh: fix isnan redefinition with mingw targets new 73eef3fc38 sim: sh: drop errno extern new 4a0bb487b8 sim: sh: break utime logic out of _WIN32 check new a11cd3ddb2 sim: sh: clean up time(NULL) call new 81817dacd6 sim: sh: fix conversion of PC to an integer

The 7 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: bfd/version.h | 2 +- sim/arm/armvirt.c | 1 + sim/bfin/dv-bfin_mmu.h | 2 + sim/ppc/main.c | 4 +- sim/rx/mem.h | 2 + sim/sh/Makefile.in | 3 -- sim/sh/gencode.c | 48 +++++++++---------- sim/sh/interp.c | 128 ++++++++++++++++++++++++++----------------------- sim/sh/sim-main.h | 54 +++++++++------------ 9 files changed, 123 insertions(+), 121 deletions(-)