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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-defconfig in repository toolchain/ci/gcc.

from 95a46b3755e 2019-09-18 Thomas Koenig tkoenig@gcc.gnu.org adds 6cb652d9173 Daily bump. adds 6aafb75646c RISC-V: Fix bad insn splits with paradoxical subregs. adds dff59b16064 2019-09-19 Steven G. Kargl kargl@gcc.gnu.org

No new revisions were added by this update.

Summary of changes: gcc/ChangeLog | 13 ++++++ gcc/DATESTAMP | 2 +- gcc/config/riscv/riscv.md | 30 ++++++++++---- gcc/fortran/ChangeLog | 7 ++++ gcc/fortran/resolve.c | 2 +- gcc/testsuite/ChangeLog | 16 ++++++++ gcc/testsuite/gcc.c-torture/execute/pr91635.c | 57 ++++++++++++++++++++++++++ gcc/testsuite/gcc.target/riscv/shift-shift-4.c | 13 ++++++ gcc/testsuite/gcc.target/riscv/shift-shift-5.c | 16 ++++++++ gcc/testsuite/gfortran.dg/pr91727.f90 | 9 ++++ 10 files changed, 154 insertions(+), 11 deletions(-) create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr91635.c create mode 100644 gcc/testsuite/gcc.target/riscv/shift-shift-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/shift-shift-5.c create mode 100644 gcc/testsuite/gfortran.dg/pr91727.f90