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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig in repository toolchain/ci/llvm-project.

from 7fa5290d5bd __patchable_function_entries: don't use linkage field 'uniq [...] adds 241f330d6ba [AMDGPU] Add gfx8 assembler and disassembler test cases adds 2bfee35cb86 [MC][ELF] Emit a relocation if target is defined in the sam [...] adds ada22c804cd Fix "pointer is null" static analyzer warning. NFCI. adds 54b2914accb Fix "pointer is null" static analyzer warnings. NFCI. adds 0113cf193f0 [RISCV] Check register class for AMO memory operands adds a6342c247a1 [SCEV] accurate range for addrecexpr with nuw flag adds 1ad1308b69b [clangd] Assert that the testcases in FindExplicitReference [...] adds 79a09d8bf4d [clangd] Show template arguments in type hierarchy when possible adds a10527cd373 AMDGPU/GlobalISel: Copy type when inserting readfirstlane adds 555e7ee04cb AMDGPU/GlobalISel: Don't use XEXEC class for SGPRs adds 3c868cbbda7 AMDGPU: Split test function adds 52aaf4a2757 [X86] Use SDNPOptInGlue instead of SDNPInGlue on a couple SDNodes. adds c958639098a [DWARF5][DebugInfo]: Added support for DebugInfo generation [...] adds 6d6a4590c5d [DWARF5][clang]: Added support for DebugInfo generation for [...] adds 07028b5a878 [SCEV] Follow up of D71563: addressing post commit comment. NFC. adds 9d3e78e704f [NFC] Update loop.decrement.reg intrinsic comment adds 3cad8ada494 Add zero_extendi and sign_extendi to intrinsic namespace adds ddf044290ed [lldb] Mark several tests as not dependent on debug info adds c9babcbda77 [RISCV] Collect Statistics on Compressed Instructions adds 734aa1d133f [clangd] Publish xref for macros from Index and AST. adds e45fcfc3aa5 Revert "[DWARF5][clang]: Added support for DebugInfo genera [...] adds 96b8e1ac467 [lldb] Fix eh-frame-small-fde test for changes in lld adds 10c11e4e2d0 This option allows selecting the TLS size in the local exec [...] adds add04b96538 ARMLowOverheadLoops: return earlier to avoid printing irrel [...] adds b6ffa2fe125 [DebugInfo][Support] Replace DWARFDataExtractor size function adds af4adb07cd1 [lldb][NFC] Use range-based for loops in IRInterpreter adds bf7225888a9 [lldb] Fix lookup of symbols with the same address range bu [...] adds 7f1cf7d5f65 [X86] Fix MSVC "truncation from 'int' to 'bool'" warning. NFCI. adds 8f49204f26e [SelectionDAG] ComputeKnownBits - minimum leading/trailing [...] adds 804dd672276 [llvm-exegesis][mips] Expand loadImmediate() adds b96ec492d34 [clangd] Remove raw string literals in macros adds 7efc7ca8edf [X86][SSE] Add knownbits test showing missing getValidMinim [...] adds ef5debac430 [SelectionDAG] ComputeKnownBits add getValidMinimumShiftAmo [...] adds 6c203149b60 [clang] Remove raw string literals in macros adds c1fbede984e [lldb][NFC] Remove debug print statement from TestExprDiagn [...] adds a70b993239a [llvm-exegesis] Remove unneeded std::move() adds d7d88b9d8b3 GlobalISel: Fix assertion on wide G_ZEXT sources adds 04a86966fbf [FPEnv] Fix chain handling for fpexcept.strict nodes adds 6a634a5dba8 Revert "[libc++] Explicitly enumerate std::string external [...] adds 89ba150240a [X86] Add knownbits tests showing missing shift amount dema [...] adds 6d1a8fd4479 [SelectionDAG] ComputeKnownBits - Add DemandedElts support [...] adds 376bc39c829 [SelectionDAG] ComputeNumSignBits - Use getValidShiftAmount [...] adds 26d2ace9e23 [InstSimplify] move tests for select from InstCombine; NFC adds 894f742acb9 [MIPS][ELF] Use PC-relative relocations in .eh_frame when possible adds 8e8ccf4712c [MIPS] Don't emit R_(MICRO)MIPS_JALR relocations against da [...] adds da33762de85 [AArch64] Emit HINT instead of PAC insns in Armv8.2-A or below adds 0b91e78a719 Add missing triples to tests in 0c29d3ff2233696f663ae34a8ae [...] adds 7af67259cdd Sema::getOwningModule - take const Decl* type. adds 40311f97249 Fix "pointer is null" static analyzer warnings. NFCI. adds 025941785fa Fix some cppcheck shadow variable warnings. NFCI. adds 4647aae72f3 Merge isVectorType() and getAs<VectorType> calls to silence [...] adds b11027a0862 Fix cppcheck uninitialized variable in DiffTree() construct [...] adds 043c5eafa87 [RISCV] Handle globals and block addresses in asm operands adds b4a99a061f5 [Clang][Driver] Re-use the calling process instead of creat [...] adds e653d306ce9 [mlir][Linalg] Update ReshapeOp::build to be more idiomatic adds 6b686703e63 [Inlining] Add PreInlineThreshold for the new pass manager adds 202ab273e6e [mlir] Added missing GPU lowering ops. adds 81e7922e83c [mlir] m_Constant() adds 07804f75a6c [DebugInfo] Make debug line address size mismatch non-fatal [...] adds 2af97be8027 [ThinLTO] Add additional ThinLTO pipeline testing with new PM adds 2d7e757a836 [AArch64][SVE] Add patterns for some arith SVE instructions. adds 90555d92534 [Scheduler] Remove superfluous casts. NFC adds ee4aa1a228b [X86] Add AVX2 known signbits codegen tests adds 7afaa0099b9 [X86][SSE] Add sitofp(ashr(x,y)) test case with non-uniform [...] adds 38e2c01221a [SelectionDAG] ComputeNumSignBits add getValidMinimumShiftA [...] adds 05366870eed [LegalizeTypes] Add SoftenFloatResult support for STRICT_SI [...] adds f2bbe8ede05 [lldb/Scripts] Remove SWIG bot adds bb2e5f5e454 Fix tests for builtbot failures adds 9d30d769041 [lldb/Docs] Extend description section of the main page adds ffc05d0dbc8 [X86][SSE] Add sitofp(shl(sext(x),y)) test case with non-un [...] adds 7d9b0a61c32 AMDGPU/GlobalISel: Simplify assert adds ca19d7a3993 AMDGPU/GlobalISel: Fix branch targets when emitting SI_IF adds 2f090cc8f1a AMDGPU/GlobalISel: Add some baseline tests for vector extract adds 3d8f1b2d22b AMDGPU/GlobalISel: Set insert point after waterfall loop adds c6fcd5d115b [SelectionDAG] ComputeNumSignBits add getValidMaximumShiftA [...] adds 203801425d2 AMDGPU/GlobalISel: Select llvm.amdgcn.ds.ordered.{add|swap} adds 292562c0046 Try number 2 for fixing bot failures adds a2cd4fe6bf2 Unbreak the mlir build after 202ab273e6eca134b69882f100c666 [...] adds fb79ef52417 Fix readability-identifier-naming missing member variables adds 7aed43b6073 Hopefully last fix for bot failures adds 484a7472f1a [llvm][MIRVRegNamerUtils] Adding hashing on FrameIndex Mach [...] adds 64a93afc3c6 [X86][Disassembler] Fix a bug when disassembling an empty string adds cb988a858ab Add a couple of missed wildcards in debug-pass-manager outp [...] adds 6288f86e870 Revert "[ThinLTO] Add additional ThinLTO pipeline testing w [...] adds 2b530053e9d [gn build] (manually) port b4a99a061f51 adds 15078d7202b [clangd] Render header of hover card as a heading adds f5465e74ef4 [clangd] Include expression in DecltypeTypeLoc sourcerange [...] adds 2bb154591fa [lldb-server] Remove dead CMake code adds 231875e111f [Clang] Always set -z now linker option on Fuchsia adds a0f4600f4f0 Rework be15dfa88fb1 such that it works with GlobalISel whic [...] adds d0aad9f56e1 [LTO] Constify lto::Config reference passed to backends (NFC) new f163755eb0a [Dsymutil][Debuginfo][NFC] #3 Refactor dsymutil to separate [...] new 69f4cea4139 [InstCombine] add tests for select --> copysign; NFC new c1b13a1b177 Fix a test case by adding -fno-delayed-template-parsing.

The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: .../readability/IdentifierNamingCheck.cpp | 32 +- clang-tools-extra/clangd/FormattedString.cpp | 19 + clang-tools-extra/clangd/FormattedString.h | 4 + clang-tools-extra/clangd/Hover.cpp | 5 +- clang-tools-extra/clangd/Selection.cpp | 13 + clang-tools-extra/clangd/XRefs.cpp | 126 +- .../clangd/unittests/FindTargetTests.cpp | 10 +- .../clangd/unittests/FormattedStringTests.cpp | 37 +- clang-tools-extra/clangd/unittests/HoverTests.cpp | 12 + .../clangd/unittests/SelectionTests.cpp | 6 + .../clangd/unittests/TypeHierarchyTests.cpp | 102 +- clang-tools-extra/clangd/unittests/XRefsTests.cpp | 49 +- ...ability-identifier-naming-member-decl-usage.cpp | 137 + clang/CMakeLists.txt | 3 + clang/include/clang/Basic/CodeGenOptions.def | 3 + clang/include/clang/Basic/SourceManager.h | 1 + clang/include/clang/Config/config.h.cmake | 3 + clang/include/clang/Driver/Driver.h | 7 + clang/include/clang/Driver/Job.h | 20 +- clang/include/clang/Driver/Options.td | 3 + clang/include/clang/Sema/Sema.h | 4 +- clang/lib/AST/ASTContext.cpp | 32 +- clang/lib/AST/ASTDiagnostic.cpp | 6 +- clang/lib/AST/VTableBuilder.cpp | 4 +- clang/lib/CodeGen/BackendUtil.cpp | 1 + clang/lib/Driver/Job.cpp | 108 +- clang/lib/Driver/ToolChains/Clang.cpp | 17 + clang/lib/Driver/ToolChains/Fuchsia.cpp | 3 + clang/lib/Frontend/CompilerInvocation.cpp | 2 + clang/lib/Sema/SemaOverload.cpp | 7 +- clang/test/CMakeLists.txt | 1 + clang/test/Driver/cc1-spawnprocess.c | 4 + clang/test/Driver/clang_f_opts.c | 2 +- clang/test/Driver/fsanitize-blacklist.c | 2 +- clang/test/Driver/fuchsia.c | 2 +- clang/test/Driver/fuchsia.cpp | 2 +- clang/test/Driver/tls-size.c | 26 + clang/test/Driver/unknown-arg.c | 2 +- clang/test/Driver/warning-options_pedantic.cpp | 2 +- clang/tools/driver/driver.cpp | 43 +- clang/unittests/AST/ASTTraverserTest.cpp | 150 +- .../ASTMatchers/ASTMatchersTraversalTest.cpp | 32 +- libcxx/include/__config | 4 - libcxx/include/__string | 54 - libcxx/include/string | 4 +- libcxx/src/string.cpp | 4 +- .../ELF/global-offset-table-position-aarch64.s | 2 +- lld/test/ELF/mips-eh_frame-pic.s | 58 + lldb/docs/man/lldb.rst | 11 +- lldb/include/lldb/Symbol/Symtab.h | 24 +- .../apropos/with-process/TestAproposWithProcess.py | 1 + .../command/nested_alias/TestNestedAlias.py | 1 + .../command/script_alias/TestCommandScriptAlias.py | 1 + .../calculator_mode/TestCalculatorMode.py | 1 + .../expression/diagnostics/TestExprDiagnostics.py | 1 - .../process/attach-resume/TestAttachResume.py | 1 + .../TestLaunchWithShellExpand.py | 1 + .../test/commands/statistics/basic/TestStats.py | 2 +- .../target/create-no-such-arch/TestNoSuchArch.py | 1 + .../hello_watchlocation/TestWatchLocation.py | 1 + .../hello_watchpoint/TestMyFirstWatchpoint.py | 1 + .../step_over_watchpoint/TestStepOverWatchpoint.py | 1 + .../TestWatchedVarHitWhenInScope.py | 1 + .../watchpoint_commands/TestWatchpointCommands.py | 1 + .../command/TestWatchpointCommandLLDB.py | 1 + .../command/TestWatchpointCommandPython.py | 1 + .../condition/TestWatchpointConditionCmd.py | 1 + .../watchpoint_disable/TestWatchpointDisable.py | 1 + .../watchpoint_events/TestWatchpointEvents.py | 1 + .../TestValueOfVectorVariable.py | 1 + .../TestWatchLocationWithWatchSet.py | 1 + .../lldbsuite/test/lang/c/offsetof/TestOffsetof.py | 3 +- .../test/lang/cpp/offsetof/TestOffsetofCpp.py | 3 +- .../test/python_api/debugger/TestDebuggerAPI.py | 2 +- .../TestDefaultConstructorForAPIObjects.py | 36 +- .../lldbsuite/test/python_api/event/TestEvents.py | 1 + .../findvalue_duplist/TestSBFrameFindValue.py | 1 + .../python_api/formatters/TestFormattersSBAPI.py | 1 + .../test/python_api/process/TestProcessAPI.py | 1 + .../test/python_api/process/io/TestProcessIO.py | 1 + .../python_api/rdar-12481949/Test-rdar-12481949.py | 1 + .../lldbsuite/test/python_api/sbdata/TestSBData.py | 1 + .../sbvalue_persist/TestSBValuePersist.py | 1 + .../test/python_api/signals/TestSignalsAPI.py | 1 + .../value/linked_list/TestValueAPILinkedList.py | 1 + .../python_api/watchpoint/TestSetWatchpoint.py | 1 + .../watchpoint/TestWatchpointIgnoreCount.py | 1 + .../python_api/watchpoint/TestWatchpointIter.py | 1 + .../condition/TestWatchpointConditionAPI.py | 1 + .../watchlocation/TestSetWatchlocation.py | 1 + .../watchlocation/TestTargetWatchAddress.py | 1 + lldb/scripts/swig_bot.py | 85 - lldb/scripts/swig_bot_lib/client.py | 216 -- lldb/scripts/swig_bot_lib/local.py | 133 - lldb/scripts/swig_bot_lib/remote.py | 43 - lldb/scripts/swig_bot_lib/server.py | 144 - lldb/source/Expression/IRInterpreter.cpp | 28 +- .../Plugins/ObjectFile/ELF/ObjectFileELF.cpp | 2 + lldb/source/Symbol/Symtab.cpp | 2 +- lldb/test/Shell/SymbolFile/Inputs/symbol-binding.s | 22 + lldb/test/Shell/SymbolFile/symbol-binding.test | 22 + lldb/test/Shell/Unwind/Inputs/eh-frame-small-fde.s | 11 +- lldb/tools/lldb-server/CMakeLists.txt | 24 - llvm/include/llvm/CodeGen/CommandFlags.inc | 5 + .../GlobalISel/LegalizationArtifactCombiner.h | 3 +- llvm/include/llvm/CodeGen/ISDOpcodes.h | 10 + llvm/include/llvm/DWARFLinker/DWARFLinker.h | 112 + .../llvm/DebugInfo/DWARF/DWARFDataExtractor.h | 2 - llvm/include/llvm/IR/Intrinsics.td | 4 +- llvm/include/llvm/LTO/LTO.h | 5 +- llvm/include/llvm/LTO/LTOBackend.h | 6 +- llvm/include/llvm/Support/DataExtractor.h | 7 +- llvm/include/llvm/Target/TargetOptions.h | 3 + llvm/lib/Analysis/ScalarEvolution.cpp | 28 +- llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 8 + llvm/lib/CodeGen/MIRVRegNamerUtils.cpp | 3 +- .../CodeGen/SelectionDAG/LegalizeFloatTypes.cpp | 24 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 107 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 72 +- .../lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h | 23 +- llvm/lib/CodeGen/TargetInstrInfo.cpp | 6 +- llvm/lib/DWARFLinker/DWARFLinker.cpp | 2 + llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp | 31 +- llvm/lib/LTO/LTO.cpp | 14 +- llvm/lib/LTO/LTOBackend.cpp | 21 +- llvm/lib/MC/ELFObjectWriter.cpp | 22 +- llvm/lib/MC/MCObjectFileInfo.cpp | 11 +- llvm/lib/Object/RelocationResolver.cpp | 3 + llvm/lib/Passes/PassBuilder.cpp | 8 +- llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 29 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 134 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 2 + llvm/lib/Target/AArch64/AArch64InstrFormats.td | 2 +- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 48 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 8 +- llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 11 + llvm/lib/Target/AArch64/SVEInstrFormats.td | 34 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 87 + llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 1 + llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 37 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 21 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 1 + llvm/lib/Target/Mips/MipsISelLowering.cpp | 9 + llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 13 + llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp | 14 + llvm/lib/Target/RISCV/RISCVInstrInfoA.td | 2 +- .../Target/X86/Disassembler/X86Disassembler.cpp | 8 +- llvm/lib/Target/X86/X86InstrFPStack.td | 4 +- .../test/Analysis/ScalarEvolution/range_nw_flag.ll | 4 +- ...rm64-tls-execs.ll => arm64-tls-initial-exec.ll} | 45 - llvm/test/CodeGen/AArch64/arm64-tls-local-exec.ll | 106 + .../hoist-and-by-const-from-lshr-in-eqcmp-zero.ll | 9 +- .../hoist-and-by-const-from-shl-in-eqcmp-zero.ll | 4 +- .../AArch64/machine-outliner-retaddr-sign-cfi.ll | 45 +- ...ne-outliner-retaddr-sign-diff-scope-same-key.ll | 29 +- .../machine-outliner-retaddr-sign-non-leaf.ll | 15 +- ...ne-outliner-retaddr-sign-same-scope-diff-key.ll | 23 +- ...-outliner-retaddr-sign-same-scope-same-key-a.ll | 29 +- ...-outliner-retaddr-sign-same-scope-same-key-b.ll | 29 +- .../machine-outliner-retaddr-sign-subtarget.ll | 4 +- .../AArch64/machine-outliner-retaddr-sign-thunk.ll | 31 +- llvm/test/CodeGen/AArch64/sign-return-address.ll | 75 +- .../AArch64/speculation-hardening-dagisel.ll | 2 +- .../CodeGen/AArch64/speculation-hardening-loads.ll | 2 +- llvm/test/CodeGen/AArch64/sve-int-arith-imm.ll | 365 +++ .../AMDGPU/GlobalISel/artifact-combiner-zext.mir | 25 + .../AMDGPU/GlobalISel/divergent-control-flow.ll | 61 + .../AMDGPU/GlobalISel/inst-select-amdgcn.class.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-amdgcn.fract.mir | 2 +- .../AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.mir | 2 +- .../AMDGPU/GlobalISel/inst-select-amdgcn.rcp.mir | 2 +- .../AMDGPU/GlobalISel/inst-select-amdgcn.rsq.mir | 2 +- .../AMDGPU/GlobalISel/inst-select-anyext.mir | 2 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir | 10 +- .../AMDGPU/GlobalISel/inst-select-build-vector.mir | 10 +- .../GlobalISel/inst-select-concat-vectors.mir | 54 +- .../AMDGPU/GlobalISel/inst-select-constant.mir | 6 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir | 4 +- .../GlobalISel/inst-select-extract-vector-elt.mir | 32 +- .../AMDGPU/GlobalISel/inst-select-extract.mir | 4 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir | 2 +- .../AMDGPU/GlobalISel/inst-select-fceil.mir | 2 +- .../AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-fmaxnum.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-fminnum.mir | 4 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir | 28 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-fneg.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-implicit-def.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-insert.mir | 20 +- .../GlobalISel/inst-select-intrinsic-trunc.mir | 2 +- .../AMDGPU/GlobalISel/inst-select-inttoptr.mir | 7 +- .../GlobalISel/inst-select-load-constant.mir | 16 +- .../AMDGPU/GlobalISel/inst-select-load-smrd.mir | 6 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir | 10 +- .../AMDGPU/GlobalISel/inst-select-merge-values.mir | 34 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-phi.mir | 6 +- .../AMDGPU/GlobalISel/inst-select-ptr-add.mir | 30 +- .../AMDGPU/GlobalISel/inst-select-ptr-mask.mir | 22 +- .../AMDGPU/GlobalISel/inst-select-ptrtoint.mir | 6 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir | 4 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir | 10 +- .../AMDGPU/GlobalISel/inst-select-trunc.mir | 8 +- .../GlobalISel/inst-select-unmerge-values.mir | 14 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir | 4 +- .../GlobalISel/llvm.amdgcn.ds.ordered.add.gfx10.ll | 1 + .../GlobalISel/llvm.amdgcn.ds.ordered.add.ll | 5 + .../GlobalISel/llvm.amdgcn.ds.ordered.swap.ll | 5 + .../regbankselect-amdgcn.ds.gws.init.mir | 8 +- .../regbankselect-amdgcn.ds.gws.sema.v.mir | 4 +- .../regbankselect-amdgcn.ds.ordered.add.mir | 8 +- .../regbankselect-amdgcn.ds.ordered.swap.mir | 8 +- .../GlobalISel/regbankselect-amdgcn.readlane.mir | 8 +- .../GlobalISel/regbankselect-amdgcn.s.sendmsg.mir | 4 +- .../regbankselect-amdgcn.s.sendmsghalt.mir | 4 +- .../GlobalISel/regbankselect-amdgcn.writelane.mir | 14 +- .../regbankselect-extract-vector-elt.mir | 468 +++ llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll | 44 +- llvm/test/CodeGen/AMDGPU/shl.ll | 21 +- llvm/test/CodeGen/AMDGPU/shl.v2i16.ll | 9 +- llvm/test/CodeGen/AMDGPU/write_register.ll | 20 +- llvm/test/CodeGen/ARM/fp-intrinsics.ll | 18 + .../hoist-and-by-const-from-lshr-in-eqcmp-zero.ll | 64 +- .../hoist-and-by-const-from-shl-in-eqcmp-zero.ll | 27 +- llvm/test/CodeGen/BPF/shifts.ll | 2 +- .../CodeGen/MIR/X86/mir-namer-hash-frameindex.mir | 23 + llvm/test/CodeGen/Mips/llvm-ir/lshr.ll | 62 +- llvm/test/CodeGen/Mips/reloc-jalr.ll | 143 +- .../PowerPC/ppcf128-constrained-fp-intrinsics.ll | 18 +- llvm/test/CodeGen/RISCV/inline-asm.ll | 46 +- llvm/test/CodeGen/SystemZ/fp-strict-alias.ll | 52 + .../SystemZ/vector-constrained-fp-intrinsics.ll | 500 ++- .../CodeGen/X86/align-branch-boundary-default.ll | 2 +- .../CodeGen/X86/align-branch-boundary-default.s | 2 +- llvm/test/CodeGen/X86/avx2-shift.ll | 10 +- llvm/test/CodeGen/X86/avx2-vector-shifts.ll | 10 +- llvm/test/CodeGen/X86/combine-shl.ll | 66 + llvm/test/CodeGen/X86/fp-intrinsics.ll | 24 +- llvm/test/CodeGen/X86/fp128-cast-strict.ll | 30 +- llvm/test/CodeGen/X86/fp128-libcalls-strict.ll | 144 +- .../hoist-and-by-const-from-lshr-in-eqcmp-zero.ll | 30 +- llvm/test/CodeGen/X86/known-bits-vector.ll | 22 + llvm/test/CodeGen/X86/known-signbits-vector.ll | 283 +- .../X86/vector-constrained-fp-intrinsics-flags.ll | 4 +- .../X86/vector-constrained-fp-intrinsics.ll | 146 +- llvm/test/CodeGen/X86/vector-fshl-128.ll | 19 +- llvm/test/CodeGen/X86/vector-fshl-rot-128.ll | 21 +- llvm/test/CodeGen/X86/vector-fshr-128.ll | 15 +- llvm/test/CodeGen/X86/vector-fshr-rot-128.ll | 19 +- llvm/test/CodeGen/X86/vector-rotate-128.ll | 21 +- llvm/test/CodeGen/X86/vector-shift-lshr-128.ll | 5 +- llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll | 10 +- llvm/test/DebugInfo/Mips/eh_frame.ll | 7 +- llvm/test/DebugInfo/X86/debug-info-auto-return.ll | 70 + llvm/test/MC/AArch64/armv8.3a-signed-pointer.s | 45 +- llvm/test/MC/AMDGPU/gfx8_asm_all.s | 159 + llvm/test/MC/ARM/thumb1-branch-reloc.s | 12 +- llvm/test/MC/ARM/thumb2-beq-fixup.s | 1 + llvm/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt | 3405 +++++++++++++++++++- llvm/test/MC/ELF/relax.s | 33 - llvm/test/MC/ELF/target-in-same-section.s | 39 + llvm/test/MC/Mips/eh-frame.s | 110 +- llvm/test/MC/RISCV/rva-aliases-invalid.s | 22 + llvm/test/MC/X86/align-branch-64-2a.s | 2 +- llvm/test/MC/X86/align-branch-64-2b.s | 2 +- llvm/test/MC/X86/align-branch-64-2c.s | 2 +- llvm/test/Transforms/InstCombine/select.ll | 141 +- llvm/test/Transforms/InstSimplify/select.ll | 24 + llvm/test/tools/llvm-exegesis/Mips/latency-GPR64.s | 11 + llvm/tools/dsymutil/DwarfLinkerForBinary.cpp | 23 +- llvm/tools/dsymutil/DwarfLinkerForBinary.h | 1 - llvm/tools/dsymutil/DwarfStreamer.cpp | 61 +- llvm/tools/dsymutil/DwarfStreamer.h | 70 +- llvm/tools/llvm-exegesis/lib/Mips/Target.cpp | 75 +- .../DebugInfo/DWARF/DWARFDebugLineTest.cpp | 60 +- llvm/unittests/MC/Disassembler.cpp | 4 + llvm/unittests/Support/DataExtractorTest.cpp | 9 + .../tools/llvm-exegesis/Mips/TargetTest.cpp | 65 +- .../secondary/clang/include/clang/Config/BUILD.gn | 1 + mlir/include/mlir/Dialect/Linalg/EDSC/Intrinsics.h | 2 +- mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td | 14 +- mlir/include/mlir/EDSC/Intrinsics.h | 2 + mlir/include/mlir/IR/Matchers.h | 12 +- .../Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp | 9 +- .../GPUToROCDL/LowerGpuOpsToROCDLOps.cpp | 9 +- mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 48 +- mlir/lib/IR/Builders.cpp | 3 +- mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir | 45 + mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir | 45 + mlir/test/EDSC/builder-api-test.cpp | 53 + mlir/test/IR/test-matchers.mlir | 1 + mlir/test/lib/IR/TestMatchers.cpp | 3 + 294 files changed, 8679 insertions(+), 2810 deletions(-) create mode 100644 clang-tools-extra/test/clang-tidy/checkers/readability-identifi [...] create mode 100644 clang/test/Driver/cc1-spawnprocess.c create mode 100644 clang/test/Driver/tls-size.c create mode 100644 lld/test/ELF/mips-eh_frame-pic.s delete mode 100644 lldb/scripts/swig_bot.py delete mode 100644 lldb/scripts/swig_bot_lib/client.py delete mode 100644 lldb/scripts/swig_bot_lib/local.py delete mode 100644 lldb/scripts/swig_bot_lib/remote.py delete mode 100644 lldb/scripts/swig_bot_lib/server.py create mode 100644 lldb/test/Shell/SymbolFile/Inputs/symbol-binding.s create mode 100644 lldb/test/Shell/SymbolFile/symbol-binding.test rename llvm/test/CodeGen/AArch64/{arm64-tls-execs.ll => arm64-tls-initial-exec.ll} (59%) create mode 100644 llvm/test/CodeGen/AArch64/arm64-tls-local-exec.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-int-arith-imm.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.ordered.add. [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.ordered.add.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.ordered.swap.ll create mode 100644 llvm/test/CodeGen/MIR/X86/mir-namer-hash-frameindex.mir create mode 100644 llvm/test/DebugInfo/X86/debug-info-auto-return.ll delete mode 100644 llvm/test/MC/ELF/relax.s create mode 100644 llvm/test/MC/ELF/target-in-same-section.s create mode 100644 llvm/test/tools/llvm-exegesis/Mips/latency-GPR64.s