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from ea464fd2d4f AArch64: Add pattern for sshr to cmlt new 52da40ffe2a AArch64: Add pattern xtn+xtn2 to uzp1

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Summary of changes: gcc/config/aarch64/aarch64-simd.md | 17 +++++++++++++++++ gcc/testsuite/gcc.target/aarch64/narrow_high_combine.c | 3 ++- gcc/testsuite/gcc.target/aarch64/xtn-combine-1.c | 16 ++++++++++++++++ gcc/testsuite/gcc.target/aarch64/xtn-combine-2.c | 16 ++++++++++++++++ gcc/testsuite/gcc.target/aarch64/xtn-combine-3.c | 16 ++++++++++++++++ gcc/testsuite/gcc.target/aarch64/xtn-combine-4.c | 16 ++++++++++++++++ gcc/testsuite/gcc.target/aarch64/xtn-combine-5.c | 16 ++++++++++++++++ gcc/testsuite/gcc.target/aarch64/xtn-combine-6.c | 16 ++++++++++++++++ 8 files changed, 115 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/xtn-combine-1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/xtn-combine-2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/xtn-combine-3.c create mode 100644 gcc/testsuite/gcc.target/aarch64/xtn-combine-4.c create mode 100644 gcc/testsuite/gcc.target/aarch64/xtn-combine-5.c create mode 100644 gcc/testsuite/gcc.target/aarch64/xtn-combine-6.c