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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig in repository toolchain/ci/llvm-project.

from 020022e12e0 Fix auto -> auto * clang tidy. adds fab08bf4899 [YAMLTraits] Add trait for char adds 89d3031b3ce llvm-lit.in: Use a raw string for LLVM_SOURCE_DIR adds 11e1cf51fb7 [gn build] Make config_map computation in llvm-lit more tab [...] adds 288c9e81781 [GlobalISel] Remove debug locations when emitting G_FCONSTANT. adds 18324bb3d91 [gn build] Make paths in generated llvm-lit relative. adds d0e7fd6b624 Revert "[FileCheck] Support comment directives" adds e1ed4d9eb50 Revert "[FileCheck] Make invalid prefix diagnostics more precise" adds 09253b608a5 [AMDGPU] Allow spilling FP to memory adds 5633813bf37 [MLIR] Fix several misc issues in in Toy tutorial adds a8874c76e8a [AArch64][SVE] Add patterns for VSELECT of immediates. adds 117e5609e98 [AMDGPU] Reserving VGPR for future SGPR Spill adds c9c930ae67c [SelectionDAG] Don't promote the alignment of allocas beyon [...] adds 0205fabe5df [Inlining] Make shouldBeDeferred static (NFC) adds 91259bf9c68 [gn build] Use relative paths in generated lit.site.cfg.py [...] adds 1429e4c3992 [AMDGPU][GlobalISel] Revise handling of wide loads in RegBa [...] adds 2aa0217add1 [FileCheck] Make invalid prefix diagnostics more precise adds e8c13c182a5 [libcxx] shared_ptr changes from library fundamentals (P0414R2). adds eb81de2de40 Temporarily Revert "[lld-macho] Re-add dylink-lazy test" as [...] adds 59a299cbb30 Fix a release+noasserts werror for unused variable. adds 2b8b783b1ab Quote error string from qLaunchSuccess adds 40f56c8cf18 [mlir] [VectorOps] Replace zero-scalar + splat into direct [...] adds 2e9f1153c5d [x86/SLH][NFC] Add a test to produce a failed generation. adds 013f06703e1 [gcov] Emit GCOV_TAG_OBJECT_SUMMARY/GCOV_TAG_PROGRAM_SUMMAR [...] adds 93aee9ca869 [DWARF5]: Added support for dumping strx forms in llvm-dwarfdump adds 1f707cc9908 Partially revert "[CMake] Fix building with -DBUILD_SHARED_ [...] adds 4c684b91d56 Revert part of D49132 "[gcov] Fix gcov profiling on big-end [...] adds f98709a982b [gcov] Fix big-endian problems adds 5eb55483ebd Revert "[libcxx] shared_ptr changes from library fundamenta [...] adds e8d2ff22f09 [PowerPC] Add fma/fsqrt/fmax strict-fp intrinsics adds d775841d7d6 [RISCV] Make CanLowerReturn protected for downstream maintenance adds 84a9c725742 Temporarily Revert "[mlir][shape] Tidy up shape.shape_of" a [...] adds 5a7276b3548 [clangd] Have suppression comments take precedence over war [...] adds 054ed1fd0b8 [LLDB] Disable TestBasicEntryValues.py for arm adds 42c7a6d52ba [CodeGen] Fix incorrect uses of getVectorNumElements() adds 57feff93a82 [SystemZ] Improve foldMemoryOperandImpl: vec->FP conversions adds 41ca6058132 Revert "[NFC][DwarfDebug] Avoid default capturing when usin [...] adds 8b7b84e99d5 Revert "[NFC][DwarfDebug] Prefer explicit to auto type deduction" adds a42e53cccf8 Fix typos encountered while working on pass pipeline for O1. adds 494c7ecef92 [NFC][AArch64] Update tests adds 40ef4274600 get rid of the NDEBUG usage in RecoveryExpr, NFC. adds 6b9e43c67e0 [Openmp][VE] Libomptarget plugin for NEC SX-Aurora adds 1952c86d614 [AArch64][CostModel] getCastInstrCost adds b4a8091a116 [ARM][CostModel] Improve getCastInstrCost adds 9682d0d5dcc [ARM] Refactor lower to S[LR]I optimization adds d6936be2ef8 [SveEmitter] Add builtins for svdup and svindex adds e114bdf072d [NFC][AArch64] More cast cost tests adds 9d6064ec49e Revert "[RISCV] Make CanLowerReturn protected for downstrea [...] adds 077d2d6802e [CodeGen][SVE] Add patterns for whole vector predicate select adds 9e32bf550d1 [libcxx testing] Remove ALLOW_RETRIES from sleep_for.pass.cpp adds bf2183374a6 [Target][ARM] Replace re-uses of old VPR values with VPNOTs adds 24bf8063d67 [Target][ARM] Replace outdated getARMVPTBlockMask function adds e143253fa8b DebugCounter.h - remove unused includes. NFC. adds 24ac6a2d7dd FuzzerCLI.h - reduce StringRef.h include to forward declara [...] adds 45aa1b88534 [X86][AVX] Use X86ISD::VPERM2X128 for blend-with-zero if op [...] adds f1f8cffce49 [NFC][AArch64] More casts tests... adds e03394c6a6f [CUDA][HIP] Workaround for resolving host device function a [...] adds 0387df7f02f [X86] combineX86ShuffleChain - use narrowShuffleMaskElts sc [...] adds 7f2db993500 [PATCH] #pragma float_control should be permitted in namesp [...] adds 691e8269959 Revert "[mlir] Revisit std.subview handling of static infor [...] adds 5d7f5ca0e38 Add Linux SVE Ptrace macros. adds f242950fdf7 Fold single-use variables into assert adds 6da5672962c [LLD] Rename iDTable -> idTable, NFC adds 123bee602a2 AMDGPU: Search for new ROCm bitcode library structure adds 14e18457113 HIP: Merge builtin library handling adds 58f1417ebc1 [AMDGPU] Order pos exports before param exports adds 774acdfb8c4 [clangd] Add metrics for selection tree and recovery expressions. adds e9536795a35 Add comment for SelectionDAGBuilder::SL field. adds c8c39185f35 [lld-macho] Re-add dylink-lazy test adds 87b6fd3e02c [lld-macho] Add support for creating and reading reexported dylibs adds 5c707fd97c4 [docs] Corrected inaccuracies in Common Problems section. adds ffcaed32ef1 [Matrix] Check non-dependent elt type before creating DepSi [...] adds bd80a8bb876 [GlobalISel][IRTranslator] New helper function translateCopy. NFC. adds 989be65b11f [GlobalISel][IRTranslator] Fix <1 x Ty> handling in ConstantExprs adds 5c10c6e0128 [PassBuilder] Moved ProfileSummaryAnalysis in buildInlinerP [...] adds b56b1e67e38 [gcov] Default coverage version to '408*' and delete CC1 op [...] adds 25a95f49b07 [gcov][test] Fix clang test adds 3d49d1cfa76 [WebAssembly] Implement pseudo-min/max SIMD instructions adds 93bd696347a [VectorCombine] add test to check for iterative improvements; NFC adds 8c72b0271b8 [CodeGen] Use Align in MachineConstantPool. adds 9f0b736126c [AMDGPU] Add AGPRs to getRegClassForSizeOnBank adds fc373522b04 [arm] Add big-endian version of pcrel fixups for adr instructions adds 01636c1eeac [X86] Remove the v16i8->v16i16 path for MULHS with AVX2. adds e5f602d82ca [ValueTracking] Let propagatesPoison support binops/unaryop [...] adds 9202df35b2f [FileCollector][NFC] Add comments adds bad61548b20 [Reproducers] Serialize process arguments in ProcessInfo adds cd83333fc8f [PowerPC] Fold redundant load immediates of zero and delete [...] adds ce195fb22b5 [libcxx] Re-commit: shared_ptr changes from library fundame [...] adds aa99da5ace4 Avoid binding pointers to "auto&" (by dereferencing the poi [...] adds d9166ad2728 [lldb/Driver] Support terminal resizing adds 661b234cbcf [MLIR] Rename SideEffects.td -> SideEffectInterfaces.td adds 11c8c2a551c [analyzer] SATestBuild.py: Fix support for #NOPREFIX. new 7a17f3ccd10 [MLIR] Fix dependencies for Analysis libraries new 6c29073efb0 PR45589: Properly decompose overloaded `&&` and `||` operat [...] new 32f5ee830b0 [Attributor] Fixup block addresses after rewriting function [...] new 363393c4b35 [libc++abi] Adjust XFAIL on macOS for bug that was fixed in [...] new 66055230bf6 [TargetLoweringObjectFileImpl] Produce .text.hot. instead o [...] new aa1eb5152d9 [X86][ISelLowering] refactor Varargs handling in X86ISelLow [...] new 59ba19c56e1 [VirtualFileSystem] Add unit test that showcases YAMLVFSWriter bug new 58bc507b6fe [VirtualFileSystem] Add unit test that showcases another YA [...] new 56926ae0faa [SampleFDO] Rename llvm-profdata flag -partial-profile to - [...] new 293c6d38212 Fix buildbots after aa1eb5152d9a5bd588c8479a376fa65cbeabbc9f. new 0138cc01250 PowerPC: Treat llvm.fma.f* intrinsic as using CTR with SPE new 1c44430e738 Fix buildbots #2 after aa1eb5152d9a5bd588c8479a376fa65cbeabbc9f.

The 12 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: clang-tools-extra/clangd/ParsedAST.cpp | 16 +- clang-tools-extra/clangd/Selection.cpp | 17 + .../clangd/unittests/DiagnosticsTests.cpp | 12 +- .../clangd/unittests/SelectionTests.cpp | 19 + clang/include/clang/Basic/BuiltinsWebAssembly.def | 4 + clang/include/clang/Basic/CodeGenOptions.def | 1 - clang/include/clang/Basic/DiagnosticSemaKinds.td | 2 +- clang/include/clang/Basic/arm_sve.td | 14 +- clang/include/clang/Driver/CC1Options.td | 2 - clang/include/clang/Sema/Sema.h | 9 +- clang/lib/AST/Expr.cpp | 5 +- clang/lib/Basic/CodeGenOptions.cpp | 2 +- clang/lib/CodeGen/BackendUtil.cpp | 1 - clang/lib/CodeGen/CGBuiltin.cpp | 36 +- clang/lib/CodeGen/CodeGenFunction.h | 1 + clang/lib/Driver/ToolChains/AMDGPU.cpp | 183 +++-- clang/lib/Driver/ToolChains/AMDGPU.h | 7 +- clang/lib/Driver/ToolChains/HIP.cpp | 72 +- clang/lib/Frontend/CompilerInvocation.cpp | 2 - clang/lib/Headers/wasm_simd128.h | 20 + clang/lib/Sema/SemaAttr.cpp | 4 +- clang/lib/Sema/SemaCUDA.cpp | 14 + clang/lib/Sema/SemaConcept.cpp | 121 +-- clang/lib/Sema/SemaExpr.cpp | 5 - clang/lib/Sema/SemaOverload.cpp | 143 ++-- clang/lib/Sema/SemaTemplateInstantiateDecl.cpp | 1 + clang/lib/Sema/SemaType.cpp | 10 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c | 524 +++++++++++++ clang/test/CodeGen/builtins-wasm.c | 28 + clang/test/CodeGen/code-coverage.c | 8 +- clang/test/CodeGen/default-address-space.c | 10 +- clang/test/CodeGen/fp-floatcontrol-pragma.cpp | 54 ++ clang/test/CodeGenOpenCL/addr-space-struct-arg.cl | 10 +- .../Inputs/rocm-device-libs/amdgcn/bitcode/hip.bc | 0 .../Inputs/rocm-device-libs/amdgcn/bitcode/ockl.bc | 0 .../bitcode/oclc_correctly_rounded_sqrt_off.bc | 0 .../bitcode/oclc_correctly_rounded_sqrt_on.bc | 0 .../amdgcn/bitcode/oclc_daz_opt_off.bc | 0 .../amdgcn/bitcode/oclc_daz_opt_on.bc | 0 .../amdgcn/bitcode/oclc_finite_only_off.bc | 0 .../amdgcn/bitcode/oclc_finite_only_on.bc | 0 .../amdgcn/bitcode/oclc_isa_version_1010.bc | 0 .../amdgcn/bitcode/oclc_isa_version_1011.bc | 0 .../amdgcn/bitcode/oclc_isa_version_1012.bc | 0 .../amdgcn/bitcode/oclc_isa_version_803.bc | 0 .../amdgcn/bitcode/oclc_isa_version_900.bc | 0 .../amdgcn/bitcode/oclc_unsafe_math_off.bc | 0 .../amdgcn/bitcode/oclc_unsafe_math_on.bc | 0 .../amdgcn/bitcode/oclc_wavefrontsize64_off.bc | 0 .../amdgcn/bitcode/oclc_wavefrontsize64_on.bc | 0 .../Inputs/rocm-device-libs/amdgcn/bitcode/ocml.bc | 0 .../rocm-device-libs/amdgcn/bitcode/opencl.bc | 0 .../Inputs/rocm-device-libs/lib/hip.amdgcn.bc | 0 .../Inputs/rocm-device-libs/lib/ockl.amdgcn.bc | 0 .../lib/oclc_correctly_rounded_sqrt_off.amdgcn.bc | 0 .../lib/oclc_correctly_rounded_sqrt_on.amdgcn.bc | 0 .../lib/oclc_daz_opt_off.amdgcn.bc | 0 .../rocm-device-libs/lib/oclc_daz_opt_on.amdgcn.bc | 0 .../lib/oclc_finite_only_off.amdgcn.bc | 0 .../lib/oclc_finite_only_on.amdgcn.bc | 0 .../lib/oclc_isa_version_1010.amdgcn.bc | 0 .../lib/oclc_isa_version_1011.amdgcn.bc | 0 .../lib/oclc_isa_version_1012.amdgcn.bc | 0 .../lib/oclc_isa_version_803.amdgcn.bc | 0 .../lib/oclc_isa_version_900.amdgcn.bc | 0 .../lib/oclc_unsafe_math_off.amdgcn.bc | 0 .../lib/oclc_unsafe_math_on.amdgcn.bc | 0 .../lib/oclc_wavefrontsize64_off.amdgcn.bc | 0 .../lib/oclc_wavefrontsize64_on.amdgcn.bc | 0 .../Inputs/rocm-device-libs/lib/ocml.amdgcn.bc | 0 .../Inputs/rocm-device-libs/lib/opencl.amdgcn.bc | 0 clang/test/Driver/hip-device-libs.hip | 78 +- clang/test/Driver/rocm-device-libs.cl | 68 +- clang/test/Parser/fp-floatcontrol-syntax.cpp | 8 +- clang/test/SemaCUDA/function-overload.cu | 146 +++- clang/test/SemaCXX/matrix-type.cpp | 98 --- clang/test/SemaTemplate/constraints.cpp | 26 + .../test/{SemaCXX => SemaTemplate}/matrix-type.cpp | 121 ++- clang/utils/analyzer/SATestBuild.py | 5 +- compiler-rt/lib/profile/GCDAProfiling.c | 83 +-- flang/include/flang/Optimizer/Dialect/FIROps.td | 2 +- libcxx/include/memory | 128 ++-- .../thread.thread.this/sleep_for.pass.cpp | 51 +- .../util.smartptr.shared/types.pass.cpp | 36 +- .../const_pointer_cast.pass.cpp | 10 +- .../dynamic_pointer_cast.pass.cpp | 10 +- .../reinterpret_pointer_cast.pass.cpp | 52 ++ .../static_pointer_cast.pass.cpp | 16 +- .../util.smartptr.shared.const/default.pass.cpp | 20 +- .../util.smartptr.shared.const/pointer.pass.cpp | 18 +- .../shared_ptr_copy_move.fail.cpp | 50 ++ .../shared_ptr_pointer.pass.cpp | 38 +- .../util.smartptr.shared.const/unique_ptr.pass.cpp | 33 +- .../make_shared.protected.fail.cpp | 3 +- .../util.smartptr.shared.obs/op_arrow.fail.cpp | 36 + .../util.smartptr.shared.obs/op_bool.pass.cpp | 21 +- .../{op_bool.pass.cpp => op_bracket.fail.cpp} | 25 +- .../util.smartptr.shared.obs/op_bracket.pass.cpp | 51 ++ .../shared_ptr_Y.pass.cpp | 1 + libcxx/www/cxx1z_status.html | 2 +- .../test/thread_local_destruction_order.pass.cpp | 17 +- lld/COFF/PDB.cpp | 8 +- lld/COFF/TypeMerger.h | 6 +- lld/MachO/Config.h | 3 +- lld/MachO/Driver.cpp | 25 + lld/MachO/InputFiles.cpp | 35 +- lld/MachO/InputFiles.h | 11 +- lld/MachO/Options.td | 3 + lld/MachO/SyntheticSections.cpp | 2 +- lld/MachO/Writer.cpp | 45 +- lld/test/MachO/sub-library.s | 74 ++ lldb/include/lldb/Core/IOHandler.h | 4 + lldb/include/lldb/Host/Editline.h | 17 +- lldb/include/lldb/Utility/Args.h | 30 + lldb/source/Core/Debugger.cpp | 3 + lldb/source/Core/IOHandler.cpp | 6 + lldb/source/Host/common/Editline.cpp | 51 +- .../Process/Linux/LinuxPTraceDefines_arm64sve.h | 253 +++++++ lldb/source/Utility/Args.cpp | 17 + lldb/source/Utility/ProcessInfo.cpp | 1 + .../basic_entry_values/TestBasicEntryValues.py | 2 +- .../API/iohandler/resize/TestIOHandlerResize.py | 36 + lldb/test/Shell/Reproducer/TestProcessList.test | 21 + lldb/tools/debugserver/source/RNBRemote.cpp | 7 +- lldb/unittests/Utility/ArgsTest.cpp | 31 + llvm/docs/CommandGuide/FileCheck.rst | 73 +- llvm/docs/GettingStarted.rst | 45 +- llvm/examples/Bye/CMakeLists.txt | 22 +- llvm/include/llvm/Analysis/InlineAdvisor.h | 8 - llvm/include/llvm/Analysis/ValueTracking.h | 8 +- .../include/llvm/CodeGen/GlobalISel/IRTranslator.h | 4 + llvm/include/llvm/CodeGen/MachineConstantPool.h | 40 +- .../include/llvm/DebugInfo/DWARF/DWARFDebugMacro.h | 21 +- llvm/include/llvm/FuzzMutate/FuzzerCLI.h | 3 +- llvm/include/llvm/IR/IntrinsicsWebAssembly.td | 11 + llvm/include/llvm/ProfileData/GCOV.h | 10 +- llvm/include/llvm/Support/DebugCounter.h | 5 +- llvm/include/llvm/Support/FileCheck.h | 2 - llvm/include/llvm/Support/FileCollector.h | 33 +- llvm/include/llvm/Support/YAMLTraits.h | 6 + llvm/include/llvm/Transforms/Instrumentation.h | 4 - llvm/lib/Analysis/InlineAdvisor.cpp | 6 +- llvm/lib/Analysis/ValueTracking.cpp | 37 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 7 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 37 +- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 65 +- llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 1 + llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 3 +- llvm/lib/CodeGen/MIRPrinter.cpp | 2 +- llvm/lib/CodeGen/MachineFunction.cpp | 10 +- .../CodeGen/SelectionDAG/FunctionLoweringInfo.cpp | 14 +- llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 22 +- .../lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h | 2 + llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 8 +- llvm/lib/DebugInfo/DWARF/DWARFContext.cpp | 5 +- llvm/lib/DebugInfo/DWARF/DWARFDebugMacro.cpp | 55 +- llvm/lib/FuzzMutate/FuzzerCLI.cpp | 1 + llvm/lib/Passes/PassBuilder.cpp | 18 +- llvm/lib/ProfileData/GCOV.cpp | 4 +- llvm/lib/Support/FileCheck.cpp | 89 +-- llvm/lib/Support/YAMLTraits.cpp | 11 + llvm/lib/Target/AArch64/AArch64FastISel.cpp | 6 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 113 ++- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 10 +- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 14 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 6 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 2 - .../Target/AArch64/AArch64TargetTransformInfo.cpp | 4 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 62 +- llvm/lib/Target/AMDGPU/AMDGPUExportClustering.cpp | 92 ++- .../Target/AMDGPU/AMDGPUGenRegisterBankInfo.def | 71 -- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 55 +- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 238 +++--- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 11 + llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp | 51 ++ llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 37 +- llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 12 + llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 32 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 3 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 19 - llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 15 +- llvm/lib/Target/ARM/ARMConstantPoolValue.cpp | 8 +- llvm/lib/Target/ARM/ARMConstantPoolValue.h | 14 +- llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 9 +- llvm/lib/Target/ARM/ARMFastISel.cpp | 22 +- llvm/lib/Target/ARM/ARMFrameLowering.cpp | 2 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 16 +- llvm/lib/Target/ARM/ARMInstructionSelector.cpp | 12 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 18 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 43 +- llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 20 +- llvm/lib/Target/ARM/MVEVPTBlockPass.cpp | 51 +- llvm/lib/Target/ARM/MVEVPTOptimisationsPass.cpp | 240 +++++- llvm/lib/Target/ARM/Thumb2InstrInfo.cpp | 30 + llvm/lib/Target/ARM/Thumb2InstrInfo.h | 7 + llvm/lib/Target/ARM/ThumbRegisterInfo.cpp | 4 +- llvm/lib/Target/ARM/Utils/ARMBaseInfo.cpp | 31 + llvm/lib/Target/ARM/Utils/ARMBaseInfo.h | 6 + llvm/lib/Target/Mips/MipsConstantIslandPass.cpp | 15 +- llvm/lib/Target/PowerPC/PPCFastISel.cpp | 3 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 17 + llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 24 +- llvm/lib/Target/PowerPC/PPCInstrInfo.h | 3 + llvm/lib/Target/PowerPC/PPCInstrInfo.td | 20 +- llvm/lib/Target/PowerPC/PPCInstrVSX.td | 67 +- llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 19 +- llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 1 + .../Target/SystemZ/SystemZConstantPoolValue.cpp | 7 +- llvm/lib/Target/SystemZ/SystemZConstantPoolValue.h | 2 +- llvm/lib/Target/SystemZ/SystemZInstrFP.td | 24 +- llvm/lib/Target/SystemZ/SystemZInstrFormats.td | 59 +- llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp | 114 ++- llvm/lib/Target/SystemZ/SystemZInstrVector.td | 53 +- .../lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 6 + llvm/lib/Target/X86/X86FastISel.cpp | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 410 +++++----- llvm/lib/Target/X86/X86InstrInfo.cpp | 2 +- llvm/lib/Target/X86/X86InstructionSelector.cpp | 3 +- llvm/lib/Target/XCore/XCoreInstrInfo.cpp | 2 +- llvm/lib/Transforms/IPO/Attributor.cpp | 8 + .../Transforms/Instrumentation/GCOVProfiling.cpp | 9 +- .../Transforms/Instrumentation/PoisonChecking.cpp | 25 +- .../Transforms/Scalar/LowerConstantIntrinsics.cpp | 2 +- llvm/test/Analysis/CostModel/AArch64/cast.ll | 232 +++++- .../CostModel/ARM/add-cast-vect.ll} | 36 +- llvm/test/Analysis/CostModel/ARM/cast.ll | 68 +- .../CostModel}/ARM/mul-cast-vect.ll | 0 .../CostModel/ARM/shl-cast-vect.ll} | 36 +- .../CostModel/ARM/sub-cast-vect.ll} | 36 +- llvm/test/Analysis/ScalarEvolution/nsw.ll | 8 +- .../Assembler/drop-debug-info-nonzero-alloca.ll | 10 +- .../AArch64/GlobalISel/arm64-irtranslator.ll | 10 +- .../AArch64/GlobalISel/fconstant-dbg-loc.ll | 25 + llvm/test/CodeGen/AArch64/arm64-sli-sri-opt.ll | 439 ++++++++++- llvm/test/CodeGen/AArch64/select-sve.ll | 134 ++++ llvm/test/CodeGen/AArch64/sve-alloca-stackid.ll | 15 + llvm/test/CodeGen/AArch64/sve-trunc.ll | 57 ++ llvm/test/CodeGen/AArch64/sve-vselect-imm.ll | 192 +++++ .../AMDGPU/GlobalISel/irtranslator-constantexpr.ll | 24 + .../AMDGPU/GlobalISel/regbankselect-load.mir | 168 +---- llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll | 109 +++ llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.ll | 46 ++ llvm/test/CodeGen/AMDGPU/private-element-size.ll | 2 +- .../CodeGen/AMDGPU/reserve-vgpr-for-sgpr-spill.ll | 50 ++ .../stack-pointer-offset-relative-frameindex.ll | 4 +- llvm/test/CodeGen/AMDGPU/wait.ll | 4 +- llvm/test/CodeGen/ARM/alloc-no-stack-realign.ll | 4 +- .../CodeGen/PowerPC/convert-rr-to-ri-instrs.mir | 4 +- llvm/test/CodeGen/PowerPC/fold-remove-li.ll | 40 + llvm/test/CodeGen/PowerPC/fp-strict-f128.ll | 72 ++ llvm/test/CodeGen/PowerPC/fp-strict-minmax.ll | 55 ++ llvm/test/CodeGen/PowerPC/fp-strict.ll | 520 +++++++++++++ llvm/test/CodeGen/PowerPC/save-crbp-ppc32svr4.ll | 3 +- llvm/test/CodeGen/PowerPC/spe.ll | 67 ++ .../PowerPC/vector-constrained-fp-intrinsics.ll | 492 ++++-------- llvm/test/CodeGen/SystemZ/foldmemop-vec-binops.mir | 828 +++++++++++++++++++++ llvm/test/CodeGen/SystemZ/foldmemop-vec-cc.mir | 47 ++ llvm/test/CodeGen/SystemZ/foldmemop-vec-cmp.mir | 498 +++++++++++++ .../test/CodeGen/SystemZ/foldmemop-vec-fusedfp.mir | 589 +++++++++++++++ llvm/test/CodeGen/SystemZ/foldmemop-vec-unary.mir | 215 ++++++ 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