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from b34397857ad RISC-V: Support VLS floating-point extend/truncate new b9cb735fc1b RISC-V: Support simplifying x/(-1) to neg for vector.

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Summary of changes: gcc/simplify-rtx.cc | 4 ++-- .../riscv/rvv/base/{simplify-vrsub.c => simplify-vdiv.c} | 12 ++++++------ 2 files changed, 8 insertions(+), 8 deletions(-) copy gcc/testsuite/gcc.target/riscv/rvv/base/{simplify-vrsub.c => simplify-vdiv.c} (56%)