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from 7ed0732273a arc: Honor SWAP option for lsl16 instruction new 946b8967b90 rs6000: call vector load/store with length only on 64-bit Power10

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Summary of changes: gcc/config/rs6000/rs6000-string.cc | 14 ++++++++++---- gcc/testsuite/gcc.target/powerpc/pr96762.c | 13 +++++++++++++ 2 files changed, 23 insertions(+), 4 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr96762.c