[gcc] branch master updated (767eea9ea22 -> 08b887fd41c) - Tcwg-commits

24 Sep 2023


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in repository gcc.
from  767eea9ea22 fortran: error recovery on duplicate declaration of class v [...]
       new  e4aa1a49010 RISC-V: Support full coverage VLS combine support
       new  08b887fd41c Daily bump.
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Summary of changes:
 gcc/ChangeLog                                      |  18 ++
 gcc/DATESTAMP                                      |   2 +-
 gcc/config/riscv/autovec-opt.md                    |  38 +--
 gcc/config/riscv/vector-iterators.md               | 287 +++++++++++++++++++++
 gcc/d/ChangeLog                                    |  19 ++
 gcc/fortran/ChangeLog                              |   9 +
 gcc/testsuite/ChangeLog                            |  80 ++++++
 .../riscv/rvv/autovec/vls/cond_convert-1.c         |  73 ++++++
 .../riscv/rvv/autovec/vls/cond_convert-10.c        |  72 ++++++
 .../riscv/rvv/autovec/vls/cond_convert-11.c        |  54 ++++
 .../autovec/vls/{fnma-1.c => cond_convert-12.c}    |  43 ++-
 .../riscv/rvv/autovec/vls/cond_convert-2.c         |  62 +++++
 .../riscv/rvv/autovec/vls/cond_convert-3.c         |  54 ++++
 .../rvv/autovec/vls/{fnma-1.c => cond_convert-4.c} |  43 ++-
 .../riscv/rvv/autovec/vls/cond_convert-5.c         |  72 ++++++
 .../riscv/rvv/autovec/vls/cond_convert-6.c         |  54 ++++
 .../rvv/autovec/vls/{fnma-1.c => cond_convert-7.c} |  43 ++-
 .../riscv/rvv/autovec/vls/cond_convert-8.c         |  54 ++++
 .../riscv/rvv/autovec/vls/cond_convert-9.c         |  22 ++
 .../riscv/rvv/autovec/vls/cond_copysign-1.c        |  50 ++++
 .../gcc.target/riscv/rvv/autovec/vls/cond_ext-1.c  |  73 ++++++
 .../gcc.target/riscv/rvv/autovec/vls/cond_ext-2.c  |  55 ++++
 .../gcc.target/riscv/rvv/autovec/vls/cond_ext-3.c  |  37 +++
 .../rvv/autovec/vls/{fnma-2.c => cond_ext-4.c}     |  42 ++-
 .../rvv/autovec/vls/{fma-6.c => cond_ext-5.c}      |  22 +-
 .../gcc.target/riscv/rvv/autovec/vls/cond_mulh-1.c |  81 ++++++
 .../riscv/rvv/autovec/vls/cond_narrow-1.c          |  61 +++++
 .../riscv/rvv/autovec/vls/cond_narrow-2.c          |  41 +++
 .../riscv/rvv/autovec/vls/cond_trunc-1.c           |  72 ++++++
 .../riscv/rvv/autovec/vls/cond_trunc-2.c           |  54 ++++
 .../rvv/autovec/vls/{fma-3.c => cond_trunc-3.c}    |  39 ++-
 .../rvv/autovec/vls/{fnma-2.c => cond_trunc-4.c}   |  42 ++-
 .../rvv/autovec/vls/{fma-5.c => cond_trunc-5.c}    |  23 +-
 .../gcc.target/riscv/rvv/autovec/vls/cond_wadd-1.c |  79 ++++++
 .../gcc.target/riscv/rvv/autovec/vls/cond_wadd-2.c |  39 +++
 .../gcc.target/riscv/rvv/autovec/vls/cond_wadd-3.c |  79 ++++++
 .../gcc.target/riscv/rvv/autovec/vls/cond_wadd-4.c |  39 +++
 .../gcc.target/riscv/rvv/autovec/vls/cond_wfma-1.c |  79 ++++++
 .../gcc.target/riscv/rvv/autovec/vls/cond_wfma-2.c |  39 +++
 .../rvv/autovec/vls/{avg-3.c => cond_wfms-1.c}     |  41 ++-
 .../riscv/rvv/autovec/vls/cond_wfnma-1.c           |  39 +++
 .../gcc.target/riscv/rvv/autovec/vls/cond_wmul-1.c |  79 ++++++
 .../gcc.target/riscv/rvv/autovec/vls/cond_wmul-2.c |  39 +++
 .../gcc.target/riscv/rvv/autovec/vls/cond_wmul-3.c |  49 ++++
 .../gcc.target/riscv/rvv/autovec/vls/cond_wsub-1.c |  79 ++++++
 .../gcc.target/riscv/rvv/autovec/vls/cond_wsub-2.c |  39 +++
 .../gcc.target/riscv/rvv/autovec/vls/cond_wsub-3.c |  79 ++++++
 .../gcc.target/riscv/rvv/autovec/vls/cond_wsub-4.c |  39 +++
 .../gcc.target/riscv/rvv/autovec/vls/def.h         | 154 +++++++++++
 .../gcc.target/riscv/rvv/autovec/vls/narrow-1.c    |  49 ++++
 .../riscv/rvv/autovec/vls/{fma-5.c => narrow-2.c}  |  23 +-
 .../riscv/rvv/autovec/vls/{ext-5.c => narrow-3.c}  |  19 +-
 .../gcc.target/riscv/rvv/autovec/vls/wred-1.c      |  80 ++++++
 .../riscv/rvv/autovec/vls/{fnma-2.c => wred-2.c}   |  43 ++-
 .../riscv/rvv/autovec/vls/{fms-3.c => wred-3.c}    |  14 +-
 libphobos/ChangeLog                                |   5 +
 56 files changed, 2743 insertions(+), 272 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-10.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-11.c
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/{fnma-1.c => cond_convert-12.c} (50%)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-3.c
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/{fnma-1.c => cond_convert-4.c} (50%)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-5.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-6.c
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/{fnma-1.c => cond_convert-7.c} (50%)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-8.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-9.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_copysign-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ext-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ext-2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ext-3.c
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/{fnma-2.c => cond_ext-4.c} (51%)
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/{fma-6.c => cond_ext-5.c} (64%)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_mulh-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_narrow-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_narrow-2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_trunc-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_trunc-2.c
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/{fma-3.c => cond_trunc-3.c} (51%)
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/{fnma-2.c => cond_trunc-4.c} (51%)
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/{fma-5.c => cond_trunc-5.c} (64%)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wadd-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wadd-2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wadd-3.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wadd-4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wfma-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wfma-2.c
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/{avg-3.c => cond_wfms-1.c} (50%)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wfnma-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wmul-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wmul-2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wmul-3.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wsub-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wsub-2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wsub-3.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wsub-4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/narrow-1.c
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/{fma-5.c => narrow-2.c} (61%)
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/{ext-5.c => narrow-3.c} (61%)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wred-1.c
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/{fnma-2.c => wred-2.c} (52%)
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/{fms-3.c => wred-3.c} (73%)
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