This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk-code_size-cpu2017rate/gnu-arm-master-Os in repository toolchain/ci/base-artifacts.
from 7167e4f2fc onsuccess: #35: 1: [TCWG CI] https://ci.linaro.org/job/tcwg_ [...] new 467af2de7b onsuccess: #39: 1: [TCWG CI] https://ci.linaro.org/job/tcwg_ [...]
The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: 01-reset_artifacts/console.log.xz | Bin 2228 -> 2216 bytes 02-prepare_abe/console.log.xz | Bin 2680 -> 2644 bytes 03-build_abe-binutils/console.log.xz | Bin 27156 -> 27328 bytes 03-build_abe-binutils/make-binutils.log.xz | Bin 17656 -> 17816 bytes 04-build_abe-stage1/console.log.xz | Bin 91472 -> 91416 bytes 04-build_abe-stage1/make-gcc-stage1.log.xz | Bin 69744 -> 71444 bytes 05-clean_sysroot/console.log.xz | Bin 368 -> 368 bytes 06-build_abe-linux/console.log.xz | Bin 8608 -> 8664 bytes 07-build_abe-glibc/console.log.xz | Bin 234708 -> 235320 bytes 07-build_abe-glibc/make-glibc.log.xz | Bin 186212 -> 186524 bytes 08-build_abe-stage2/console.log.xz | Bin 213124 -> 212916 bytes 08-build_abe-stage2/make-gcc-stage2.log.xz | Bin 179800 -> 180960 bytes 09-benchmark/benchmark-build.log | 144 +- 09-benchmark/benchmark.log | 142 +- 09-benchmark/console.log.xz | Bin 4088 -> 6380 bytes 10-check_regression/bmk-specific-variability.csv | 136 +- 10-check_regression/console.log.xz | Bin 4480 -> 3648 bytes annex/bmk-data/csv_results/md5sum.csv | 1 + annex/bmk-data/csv_results/perf.csv | 1 + annex/bmk-data/csv_results/results.csv | 1 + annex/bmk-data/csv_results/size.csv | 1 + annex/bmk-data/csv_results/sve.csv | 1 + annex/bmk-data/csv_results/vect.csv | 1 + .../CPU2017.parallel.fprate.train.cfg.run.10 | 1 + .../CPU2017.parallel.fprate.train.cfg.run.14 | 1 + .../CPU2017.parallel.fprate.train.cfg.run.16 | 1 + .../CPU2017.parallel.fprate.train.cfg.run.18 | 1 + .../CPU2017.parallel.fprate.train.cfg.run.2 | 1 + .../CPU2017.parallel.fprate.train.cfg.run.20 | 1 + .../CPU2017.parallel.fprate.train.cfg.run.21 | 1 + .../CPU2017.parallel.fprate.train.cfg.run.4 | 1 + .../CPU2017.parallel.fprate.train.cfg.run.5 | 1 + .../CPU2017.parallel.fprate.train.cfg.run.7 | 1 + .../CPU2017.parallel.fprate.train.cfg.run.8 | 1 + .../CPU2017.parallel.fprate.train.csv.run.10 | 1 + .../CPU2017.parallel.fprate.train.csv.run.14 | 1 + .../CPU2017.parallel.fprate.train.csv.run.16 | 1 + .../CPU2017.parallel.fprate.train.csv.run.18 | 1 + .../CPU2017.parallel.fprate.train.csv.run.2 | 1 + .../CPU2017.parallel.fprate.train.csv.run.20 | 1 + .../CPU2017.parallel.fprate.train.csv.run.21 | 1 + .../CPU2017.parallel.fprate.train.csv.run.4 | 1 + .../CPU2017.parallel.fprate.train.csv.run.5 | 1 + .../CPU2017.parallel.fprate.train.csv.run.7 | 1 + .../CPU2017.parallel.fprate.train.csv.run.8 | 1 + ...CPU2017.parallel.fprate.train.flags.html.run.10 | 1 + ...CPU2017.parallel.fprate.train.flags.html.run.14 | 1 + ...CPU2017.parallel.fprate.train.flags.html.run.16 | 1 + ...CPU2017.parallel.fprate.train.flags.html.run.18 | 1 + .../CPU2017.parallel.fprate.train.flags.html.run.2 | 1 + ...CPU2017.parallel.fprate.train.flags.html.run.20 | 1 + ...CPU2017.parallel.fprate.train.flags.html.run.21 | 1 + .../CPU2017.parallel.fprate.train.flags.html.run.4 | 1 + .../CPU2017.parallel.fprate.train.flags.html.run.5 | 1 + .../CPU2017.parallel.fprate.train.flags.html.run.7 | 1 + .../CPU2017.parallel.fprate.train.flags.html.run.8 | 1 + .../CPU2017.parallel.fprate.train.html.run.10 | 1 + .../CPU2017.parallel.fprate.train.html.run.14 | 1 + .../CPU2017.parallel.fprate.train.html.run.16 | 1 + .../CPU2017.parallel.fprate.train.html.run.18 | 1 + .../CPU2017.parallel.fprate.train.html.run.2 | 1 + .../CPU2017.parallel.fprate.train.html.run.20 | 1 + .../CPU2017.parallel.fprate.train.html.run.21 | 1 + .../CPU2017.parallel.fprate.train.html.run.4 | 1 + .../CPU2017.parallel.fprate.train.html.run.5 | 1 + .../CPU2017.parallel.fprate.train.html.run.7 | 1 + .../CPU2017.parallel.fprate.train.html.run.8 | 1 + .../CPU2017.parallel.fprate.train.orig.cfg.run.10 | 1 + .../CPU2017.parallel.fprate.train.orig.cfg.run.14 | 1 + .../CPU2017.parallel.fprate.train.orig.cfg.run.16 | 1 + .../CPU2017.parallel.fprate.train.orig.cfg.run.18 | 1 + .../CPU2017.parallel.fprate.train.orig.cfg.run.2 | 1 + .../CPU2017.parallel.fprate.train.orig.cfg.run.20 | 1 + .../CPU2017.parallel.fprate.train.orig.cfg.run.21 | 1 + .../CPU2017.parallel.fprate.train.orig.cfg.run.4 | 1 + .../CPU2017.parallel.fprate.train.orig.cfg.run.5 | 1 + .../CPU2017.parallel.fprate.train.orig.cfg.run.7 | 1 + .../CPU2017.parallel.fprate.train.orig.cfg.run.8 | 1 + .../CPU2017.parallel.fprate.train.pdf.run.10 | 1 + .../CPU2017.parallel.fprate.train.pdf.run.14 | 1 + .../CPU2017.parallel.fprate.train.pdf.run.16 | 1 + .../CPU2017.parallel.fprate.train.pdf.run.18 | 1 + .../CPU2017.parallel.fprate.train.pdf.run.2 | 1 + .../CPU2017.parallel.fprate.train.pdf.run.20 | 1 + .../CPU2017.parallel.fprate.train.pdf.run.21 | 1 + .../CPU2017.parallel.fprate.train.pdf.run.4 | 1 + .../CPU2017.parallel.fprate.train.pdf.run.5 | 1 + .../CPU2017.parallel.fprate.train.pdf.run.7 | 1 + .../CPU2017.parallel.fprate.train.pdf.run.8 | 1 + .../CPU2017.parallel.fprate.train.rsf.run.10 | 1 + .../CPU2017.parallel.fprate.train.rsf.run.14 | 1 + .../CPU2017.parallel.fprate.train.rsf.run.16 | 1 + .../CPU2017.parallel.fprate.train.rsf.run.18 | 1 + .../CPU2017.parallel.fprate.train.rsf.run.2 | 1 + .../CPU2017.parallel.fprate.train.rsf.run.20 | 1 + .../CPU2017.parallel.fprate.train.rsf.run.21 | 1 + .../CPU2017.parallel.fprate.train.rsf.run.4 | 1 + .../CPU2017.parallel.fprate.train.rsf.run.5 | 1 + .../CPU2017.parallel.fprate.train.rsf.run.7 | 1 + .../CPU2017.parallel.fprate.train.rsf.run.8 | 1 + .../CPU2017.parallel.fprate.train.txt.run.10 | 1 + .../CPU2017.parallel.fprate.train.txt.run.14 | 1 + .../CPU2017.parallel.fprate.train.txt.run.16 | 1 + .../CPU2017.parallel.fprate.train.txt.run.18 | 1 + .../CPU2017.parallel.fprate.train.txt.run.2 | 1 + .../CPU2017.parallel.fprate.train.txt.run.20 | 1 + .../CPU2017.parallel.fprate.train.txt.run.21 | 1 + .../CPU2017.parallel.fprate.train.txt.run.4 | 1 + .../CPU2017.parallel.fprate.train.txt.run.5 | 1 + .../CPU2017.parallel.fprate.train.txt.run.7 | 1 + .../CPU2017.parallel.fprate.train.txt.run.8 | 1 + .../CPU2017.parallel.intrate.train.cfg.run.0 | 1 + .../CPU2017.parallel.intrate.train.cfg.run.1 | 1 + .../CPU2017.parallel.intrate.train.cfg.run.12 | 1 + .../CPU2017.parallel.intrate.train.cfg.run.15 | 1 + .../CPU2017.parallel.intrate.train.cfg.run.17 | 1 + .../CPU2017.parallel.intrate.train.cfg.run.19 | 1 + .../CPU2017.parallel.intrate.train.cfg.run.22 | 1 + .../CPU2017.parallel.intrate.train.cfg.run.3 | 1 + .../CPU2017.parallel.intrate.train.cfg.run.9 | 1 + .../CPU2017.parallel.intrate.train.csv.run.0 | 1 + .../CPU2017.parallel.intrate.train.csv.run.1 | 1 + .../CPU2017.parallel.intrate.train.csv.run.12 | 1 + .../CPU2017.parallel.intrate.train.csv.run.15 | 1 + .../CPU2017.parallel.intrate.train.csv.run.17 | 1 + .../CPU2017.parallel.intrate.train.csv.run.19 | 1 + .../CPU2017.parallel.intrate.train.csv.run.22 | 1 + .../CPU2017.parallel.intrate.train.csv.run.3 | 1 + .../CPU2017.parallel.intrate.train.csv.run.9 | 1 + ...CPU2017.parallel.intrate.train.flags.html.run.0 | 1 + ...CPU2017.parallel.intrate.train.flags.html.run.1 | 1 + ...PU2017.parallel.intrate.train.flags.html.run.12 | 1 + ...PU2017.parallel.intrate.train.flags.html.run.15 | 1 + ...PU2017.parallel.intrate.train.flags.html.run.17 | 1 + ...PU2017.parallel.intrate.train.flags.html.run.19 | 1 + ...PU2017.parallel.intrate.train.flags.html.run.22 | 1 + ...CPU2017.parallel.intrate.train.flags.html.run.3 | 1 + ...CPU2017.parallel.intrate.train.flags.html.run.9 | 1 + .../CPU2017.parallel.intrate.train.html.run.0 | 1 + .../CPU2017.parallel.intrate.train.html.run.1 | 1 + .../CPU2017.parallel.intrate.train.html.run.12 | 1 + .../CPU2017.parallel.intrate.train.html.run.15 | 1 + .../CPU2017.parallel.intrate.train.html.run.17 | 1 + .../CPU2017.parallel.intrate.train.html.run.19 | 1 + .../CPU2017.parallel.intrate.train.html.run.22 | 1 + .../CPU2017.parallel.intrate.train.html.run.3 | 1 + .../CPU2017.parallel.intrate.train.html.run.9 | 1 + .../CPU2017.parallel.intrate.train.orig.cfg.run.0 | 1 + .../CPU2017.parallel.intrate.train.orig.cfg.run.1 | 1 + .../CPU2017.parallel.intrate.train.orig.cfg.run.12 | 1 + .../CPU2017.parallel.intrate.train.orig.cfg.run.15 | 1 + .../CPU2017.parallel.intrate.train.orig.cfg.run.17 | 1 + .../CPU2017.parallel.intrate.train.orig.cfg.run.19 | 1 + .../CPU2017.parallel.intrate.train.orig.cfg.run.22 | 1 + .../CPU2017.parallel.intrate.train.orig.cfg.run.3 | 1 + .../CPU2017.parallel.intrate.train.orig.cfg.run.9 | 1 + .../CPU2017.parallel.intrate.train.pdf.run.0 | 1 + .../CPU2017.parallel.intrate.train.pdf.run.1 | 1 + .../CPU2017.parallel.intrate.train.pdf.run.12 | 1 + .../CPU2017.parallel.intrate.train.pdf.run.15 | 1 + .../CPU2017.parallel.intrate.train.pdf.run.17 | 1 + .../CPU2017.parallel.intrate.train.pdf.run.19 | 1 + .../CPU2017.parallel.intrate.train.pdf.run.22 | 1 + .../CPU2017.parallel.intrate.train.pdf.run.3 | 1 + .../CPU2017.parallel.intrate.train.pdf.run.9 | 1 + .../CPU2017.parallel.intrate.train.rsf.run.0 | 1 + .../CPU2017.parallel.intrate.train.rsf.run.1 | 1 + .../CPU2017.parallel.intrate.train.rsf.run.12 | 1 + .../CPU2017.parallel.intrate.train.rsf.run.15 | 1 + .../CPU2017.parallel.intrate.train.rsf.run.17 | 1 + .../CPU2017.parallel.intrate.train.rsf.run.19 | 1 + .../CPU2017.parallel.intrate.train.rsf.run.22 | 1 + .../CPU2017.parallel.intrate.train.rsf.run.3 | 1 + .../CPU2017.parallel.intrate.train.rsf.run.9 | 1 + .../CPU2017.parallel.intrate.train.txt.run.0 | 1 + .../CPU2017.parallel.intrate.train.txt.run.1 | 1 + .../CPU2017.parallel.intrate.train.txt.run.12 | 1 + .../CPU2017.parallel.intrate.train.txt.run.15 | 1 + .../CPU2017.parallel.intrate.train.txt.run.17 | 1 + .../CPU2017.parallel.intrate.train.txt.run.19 | 1 + .../CPU2017.parallel.intrate.train.txt.run.22 | 1 + .../CPU2017.parallel.intrate.train.txt.run.3 | 1 + .../CPU2017.parallel.intrate.train.txt.run.9 | 1 + .../CPU2017.parallel.log.build.0 | 1 + .../CPU2017.parallel.log.build.1 | 1 + .../CPU2017.parallel.log.build.10 | 1 + .../CPU2017.parallel.log.build.11 | 1 + .../CPU2017.parallel.log.build.12 | 1 + .../CPU2017.parallel.log.build.13 | 1 + .../CPU2017.parallel.log.build.14 | 1 + .../CPU2017.parallel.log.build.15 | 1 + .../CPU2017.parallel.log.build.16 | 1 + .../CPU2017.parallel.log.build.17 | 1 + .../CPU2017.parallel.log.build.18 | 1 + .../CPU2017.parallel.log.build.19 | 1 + .../CPU2017.parallel.log.build.2 | 1 + .../CPU2017.parallel.log.build.20 | 1 + .../CPU2017.parallel.log.build.21 | 1 + .../CPU2017.parallel.log.build.22 | 1 + .../CPU2017.parallel.log.build.3 | 1 + .../CPU2017.parallel.log.build.4 | 1 + .../CPU2017.parallel.log.build.5 | 1 + .../CPU2017.parallel.log.build.6 | 1 + .../CPU2017.parallel.log.build.7 | 1 + .../CPU2017.parallel.log.build.8 | 1 + .../CPU2017.parallel.log.build.9 | 1 + .../CPU2017.parallel.log.debug.build.11 | 1 + .../CPU2017.parallel.log.debug.build.13 | 1 + .../CPU2017.parallel.log.debug.build.6 | 1 + .../CPU2017.parallel.log.debug.run.11 | 1 + .../CPU2017.parallel.log.debug.run.13 | 1 + .../CPU2017.parallel.log.debug.run.6 | 1 + .../CPU2017.parallel.log.run.0 | 1 + .../CPU2017.parallel.log.run.1 | 1 + .../CPU2017.parallel.log.run.10 | 1 + .../CPU2017.parallel.log.run.11 | 1 + .../CPU2017.parallel.log.run.12 | 1 + .../CPU2017.parallel.log.run.13 | 1 + .../CPU2017.parallel.log.run.14 | 1 + .../CPU2017.parallel.log.run.15 | 1 + .../CPU2017.parallel.log.run.16 | 1 + .../CPU2017.parallel.log.run.17 | 1 + .../CPU2017.parallel.log.run.18 | 1 + .../CPU2017.parallel.log.run.19 | 1 + .../CPU2017.parallel.log.run.2 | 1 + .../CPU2017.parallel.log.run.20 | 1 + .../CPU2017.parallel.log.run.21 | 1 + .../CPU2017.parallel.log.run.22 | 1 + .../CPU2017.parallel.log.run.3 | 1 + .../CPU2017.parallel.log.run.4 | 1 + .../CPU2017.parallel.log.run.5 | 1 + .../CPU2017.parallel.log.run.6 | 1 + .../CPU2017.parallel.log.run.7 | 1 + .../CPU2017.parallel.log.run.8 | 1 + .../CPU2017.parallel.log.run.9 | 1 + .../kallsyms | 157225 ++++++++ .../778c86ba08e6cfc592eb7e05251d9e79e220924a/elf | Bin 0 -> 11857620 bytes .../probes | 0 .../1d237fe925d72600f965a12615a6b2034480a758/elf | Bin 0 -> 2850552 bytes .../probes | 0 .../7f169e547643cf24ab802e74286da0221aa10930/elf | Bin 0 -> 4533788 bytes .../probes | 0 .../a6220e83965701750813b3ca07e99f23d59462ab/elf | Bin 0 -> 1431028 bytes .../probes | 0 .../408042d0cc9ba14835719722485be561f88eac7c/elf | Bin 18550857 -> 18546284 bytes .../probes | 0 .../d85347144f8ea7e627a2c93b8147dabf1a203e0c/elf | Bin 0 -> 1371952 bytes .../probes | 0 .../7ade9e49b975eecd50dc5be31acfd5166dcc0885/elf | Bin 0 -> 5642684 bytes .../probes | 0 .../bc2eaeb15db490b62e9c292363a29fa858b9a683/elf | Bin 0 -> 11065040 bytes .../probes | 0 .../66fea49506c23a2f826447367ab5981021e436c0/elf | Bin 0 -> 337284 bytes .../probes | 0 .../ba9ebc52d97e6e3e190fb8300777111b196530d0/elf | Bin 0 -> 14640044 bytes .../probes | 0 .../ca9dd5ab81d84298c10041bcfd258fcbe61f952f/elf | Bin 0 -> 80312 bytes .../probes | 0 .../0f77f2c937c2b2497bd47cf323712529bf45a8a4/elf | Bin 0 -> 1223364 bytes .../probes | 0 .../5f07745965926e21ecfd82b04d05472e9bb95fc3/elf | Bin 0 -> 136040 bytes .../probes | 0 .../a9fc1aeec8a464b0b63cf115ab6f77d726f536fd/elf | Bin 0 -> 126124 bytes .../probes | 0 .../7526ab0244296d18449c14a750e883231834de50/elf | Bin 0 -> 53712 bytes .../probes | 0 .../0a1f24f6d19371237b6f8b099e8b5e19b7cab0af/elf | Bin 0 -> 30904 bytes .../probes | 0 .../2cc19a7db3970a5eaad8ccadf22f076a32b4e591/elf | Bin 0 -> 232648 bytes .../probes | 0 .../65c83899c5622c263af0027b592fb15d2b608fd6/elf | Bin 0 -> 542148 bytes .../probes | 0 .../4882a431555384e508f6d1968e29bb55162f1946/elf | Bin 0 -> 158716 bytes .../probes | 0 .../f025d3aabcd8e365dbc54eba58c80d9002535151/elf | Bin 0 -> 43836 bytes .../probes | 0 .../41943298f669b292cde5437bd10ba4de31b50ee3/elf | Bin 0 -> 2799676 bytes .../probes | 0 .../6adcaadc9370ed201bd94b79a4fa444667a2b715/elf | Bin 0 -> 399600 bytes .../probes | 0 .../7f65a67f8d447e0586e5b23e56e58d05529011db/elf | Bin 0 -> 743704 bytes .../probes | 0 .../6af975efc8811aa38a3b6367439f306f27197b93/elf | Bin 0 -> 28800 bytes .../probes | 0 .../6110278012b32b1f33a94ccd9c6ecf490f776c8e/elf | Bin 0 -> 1587488 bytes .../probes | 0 .../perf.parallel.data/500.perlbench_r.data | 1 + .../perf.parallel.data/502.gcc_r.data | 1 + .../perf.parallel.data/503.bwaves_r.data | 1 + .../perf.parallel.data/505.mcf_r.data | 1 + .../perf.parallel.data/507.cactuBSSN_r.data | 1 + .../perf.parallel.data/508.namd_r.data | 1 + .../perf.parallel.data/511.povray_r.data | 1 + .../perf.parallel.data/519.lbm_r.data | 1 + .../perf.parallel.data/520.omnetpp_r.data | 1 + .../perf.parallel.data/521.wrf_r.data | 1 + .../perf.parallel.data/525.x264_r.data | 1 + .../perf.parallel.data/527.cam4_r.data | 1 + .../perf.parallel.data/531.deepsjeng_r.data | 1 + .../perf.parallel.data/538.imagick_r.data | 1 + .../perf.parallel.data/541.leela_r.data | 1 + .../perf.parallel.data/544.nab_r.data | 1 + .../perf.parallel.data/548.exchange2_r.data | 1 + .../perf.parallel.data/549.fotonik3d_r.data | 1 + .../perf.parallel.data/554.roms_r.data | 1 + .../perf.parallel.data/557.xz_r.data | 1 + .../save.parallel.temps/500.perlbench_r.tar.xz | 1 + .../save.parallel.temps/502.gcc_r.tar.xz | 1 + .../save.parallel.temps/503.bwaves_r.tar.xz | 1 + .../save.parallel.temps/505.mcf_r.tar.xz | 1 + .../save.parallel.temps/507.cactuBSSN_r.tar.xz | 1 + .../save.parallel.temps/508.namd_r.tar.xz | 1 + .../save.parallel.temps/510.parest_r.tar.xz | 1 + .../save.parallel.temps/511.povray_r.tar.xz | 1 + .../save.parallel.temps/519.lbm_r.tar.xz | 1 + .../save.parallel.temps/520.omnetpp_r.tar.xz | 1 + .../save.parallel.temps/521.wrf_r.tar.xz | 1 + .../save.parallel.temps/523.xalancbmk_r.tar.xz | 1 + .../save.parallel.temps/525.x264_r.tar.xz | 1 + .../save.parallel.temps/526.blender_r.tar.xz | 1 + .../save.parallel.temps/527.cam4_r.tar.xz | 1 + .../save.parallel.temps/531.deepsjeng_r.tar.xz | 1 + .../save.parallel.temps/538.imagick_r.tar.xz | 1 + .../save.parallel.temps/541.leela_r.tar.xz | 1 + .../save.parallel.temps/544.nab_r.tar.xz | 1 + .../save.parallel.temps/548.exchange2_r.tar.xz | 1 + .../save.parallel.temps/549.fotonik3d_r.tar.xz | 1 + .../save.parallel.temps/554.roms_r.tar.xz | 1 + .../save.parallel.temps/557.xz_r.tar.xz | 1 + git/binutils_rev | 2 +- git/gcc_rev | 2 +- git/glibc_rev | 2 +- git/linux_rev | 2 +- jenkins/build-name | 2 +- jenkins/rewrite.log | 8 + jenkins/run-build.env | 15 + manifest.sh | 16 +- results | 1 + results-vs-prev/compare-results-internal.csv | 135 +- results-vs-prev/csv-results-0/md5sum.csv | 79 - results-vs-prev/csv-results-0/perf.csv | 1194 - results-vs-prev/csv-results-0/results.csv | 362107 ----------------- results-vs-prev/csv-results-0/size.csv | 361986 ----------------- results-vs-prev/csv-results-0/sve.csv | 21 - results-vs-prev/csv-results-0/vect.csv | 16 - results-vs-prev/csv-results-1/md5sum.csv | 79 - results-vs-prev/csv-results-1/perf.csv | 1187 - results-vs-prev/csv-results-1/results.csv | 362113 ------------------ results-vs-prev/csv-results-1/sve.csv | 21 - results-vs-prev/csv-results-1/vect.csv | 16 - results-vs-prev/csvs2table-results-brief.csv | 50 +- results-vs-prev/csvs2table-results-full.csv | 3171 +- results-vs-prev/csvs2table-results-internal.csv | 135 +- results-vs-prev/csvs2table-results.csv | 135 +- results-vs-prev/interesting-symbols.csv | 71 +- results-vs-prev/results-internal.csv | 135 +- results-vs-prev/tcwg-benchmark-results.log | 2530 +- results_id | 2 +- 358 files changed, 161098 insertions(+), 1092043 deletions(-) create mode 120000 annex/bmk-data/csv_results/md5sum.csv create mode 120000 annex/bmk-data/csv_results/perf.csv create mode 120000 annex/bmk-data/csv_results/results.csv create mode 120000 annex/bmk-data/csv_results/size.csv create mode 120000 annex/bmk-data/csv_results/sve.csv create mode 120000 annex/bmk-data/csv_results/vect.csv create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.0 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.1 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.10 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.11 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.12 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.13 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.14 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.15 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.16 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.17 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.18 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.19 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.2 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.20 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.21 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.22 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.3 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.4 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.5 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.6 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.7 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.8 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.9 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.debu [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.debu [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.debu [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.debu [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.debu [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.debug.run.6 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.0 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.1 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.10 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.11 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.12 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.13 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.14 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.15 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.16 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.17 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.18 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.19 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.2 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.20 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.21 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.22 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.3 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.4 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.5 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.6 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.7 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.8 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.9 create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] rename results-vs-prev/csv-results-1/size.csv => annex/bmk-data/tcwg-bmk-sq-01.tcw [...] mode change 100644 => 100755 create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/500.pe [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/502.gc [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/503.bw [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/505.mc [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/507.ca [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/508.na [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/511.po [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/519.lb [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/520.om [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/521.wr [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/525.x2 [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/527.ca [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/531.de [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/538.im [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/541.le [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/544.na [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/548.ex [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/549.fo [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/554.ro [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/557.xz_r.data create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/500.p [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/502.g [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/503.b [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/505.m [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/507.c [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/508.n [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/510.p [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/511.p [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/519.l [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/520.o [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/521.w [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/523.x [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/525.x [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/526.b [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/527.c [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/531.d [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/538.i [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/541.l [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/544.n [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/548.e [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/549.f [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/554.r [...] create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/557.x [...] create mode 100644 jenkins/rewrite.log create mode 100644 jenkins/run-build.env delete mode 100644 results-vs-prev/csv-results-0/md5sum.csv delete mode 100644 results-vs-prev/csv-results-0/perf.csv delete mode 100644 results-vs-prev/csv-results-0/results.csv delete mode 100644 results-vs-prev/csv-results-0/size.csv delete mode 100644 results-vs-prev/csv-results-0/sve.csv delete mode 100644 results-vs-prev/csv-results-0/vect.csv delete mode 100644 results-vs-prev/csv-results-1/md5sum.csv delete mode 100644 results-vs-prev/csv-results-1/perf.csv delete mode 100644 results-vs-prev/csv-results-1/results.csv delete mode 100644 results-vs-prev/csv-results-1/sve.csv delete mode 100644 results-vs-prev/csv-results-1/vect.csv