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from 392b2c89432 [TargetLowering][RISCV] Introduce isSExtCheaperThanZExt hoo [...] new 810e8672a48 [SelectionDAG] Support promotion of FRAMEADDR/RETURNADDR operands new 24b8fd959ee [LoopSimplifyCFG] Update MemorySSA in terminator folding. PR39783 new cdc31182973 [SelectionDAG] Support promotion of PREFETCH operands

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Summary of changes: lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 23 +++++++++ lib/CodeGen/SelectionDAG/LegalizeTypes.h | 2 + lib/Transforms/Scalar/LoopSimplifyCFG.cpp | 19 ++++--- test/CodeGen/RISCV/frameaddr-returnaddr.ll | 62 +++++++++++++++++++++++ test/CodeGen/RISCV/prefetch.ll | 19 +++++++ test/Transforms/LoopSimplifyCFG/pr39783.ll | 1 - 6 files changed, 119 insertions(+), 7 deletions(-) create mode 100644 test/CodeGen/RISCV/prefetch.ll