On 6/10/25 7:05 PM, Da Xue wrote:
Most current controller IP support 64-bit words. Update the mask to u64 from u32.
Signed-off-by: Da Xue da@libre.computer
drivers/iio/adc/ad7949.c | 2 +- drivers/spi/spi-dln2.c | 2 +- drivers/spi/spi-ingenic.c | 2 +- drivers/spi/spi-sh-msiof.c | 2 +- drivers/spi/spi.c | 4 ++-- drivers/staging/greybus/spilib.c | 2 +- include/linux/spi/altera.h | 2 +- include/linux/spi/spi.h | 6 +++--- 8 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/iio/adc/ad7949.c b/drivers/iio/adc/ad7949.c index edd0c3a35ab7..469789ffa4a3 100644 --- a/drivers/iio/adc/ad7949.c +++ b/drivers/iio/adc/ad7949.c @@ -308,7 +308,7 @@ static void ad7949_disable_reg(void *reg) static int ad7949_spi_probe(struct spi_device *spi) {
- u32 spi_ctrl_mask = spi->controller->bits_per_word_mask;
- u64 spi_ctrl_mask = spi->controller->bits_per_word_mask;
I think this driver is incorrectly accessing bits_per_word_mask directly and should be using spi_is_bpw_supported() instead.
This driver checks for SPI_BPW_MASK(8) at one point but doesn't take into account that if bits_per_word_mask == 0, then 8 is implied. spi_is_bpw_supported(), on the other hand, takes this into account.
struct device *dev = &spi->dev; const struct ad7949_adc_spec *spec; struct ad7949_adc_chip *ad7949_adc;
...
diff --git a/drivers/staging/greybus/spilib.c b/drivers/staging/greybus/spilib.c index 24e9c909fa02..087eed1879b1 100644 --- a/drivers/staging/greybus/spilib.c +++ b/drivers/staging/greybus/spilib.c @@ -27,7 +27,7 @@ struct gb_spilib { unsigned int op_timeout; u16 mode; u16 flags;
- u32 bits_per_word_mask;
- u64 bits_per_word_mask;
This is assigned by:
spi->bits_per_word_mask = le32_to_cpu(response.bits_per_word_mask);
in gb_spi_get_master_config(), so changing to u64 doesn't have any effect and should likely be omitted to avoid confusion.
(The response struct is defined by a communication protocol and can't be changed, otherwise it would break the communications.)
u8 num_chipselect; u32 min_speed_hz; u32 max_speed_hz;