Linaro-uefi May 2015

linaro-uefi@lists.linaro.org

14 participants
13 discussions

by Roy Franz

Leif and Ard, I have the branch "rfranz-backspace" on http://git.linaro.org/people/roy.franz/uefi-next.git that I'd like to get you to try to make sure it works with other setups. This should also fix the delete key. I still need to look more at how EDK2 determines which console type to use, and if I need to conditionalize any of this based on terminal type. The backspace 'fix' is to treat both 0x8(^H) and 0x7f(^?) as backspace. This is done by changing 0x7f values to 0x8 during the console input processing. This is similar to how u-boot treats both values as backspace - delete doesn't work. Fixing the delete key is a big more involved, many (most?) linux terminals use the vt220 escape sequence [3~ to do delete. Right now EDK2 only handlings 2 byte escape sequences, so the state machine needed to be extended. This is a very 'linuxy' change, so I don't know how popular it will be. I need to try the patches with a windows based terminal emulator, and I suspect I'll end up with the delete key being backspace, and there really being no delete. Thanks, Roy

9 years, 7 months

[PATCH 0/5]arm64: Add multiboot support (via fdt) for Xen boot

by Fu Wei

- This multiboot support is built into linux module for aarch64. - The implementation for Xen is following <Multiboot on ARM Specification>: http://wiki.xen.org/wiki/Xen_ARM_with_Virtualization_Extensions/Multiboot and xen/docs/misc/arm/device-tree/booting.txt in Xen source code. - The example of this support is <How to boot Xen with GRUB on AArch64 the Foundation FVP model> https://wiki.linaro.org/LEG/Engineering/Grub2/Xen_booting_on_Foundation_FVP… - This adds support for the Xen Multiboot on ARM specification for arm64, enabling config file portability across the architectures. - The multiboot command is currently x86-only, so reusing these command names should not conflict with any future additions of ARM support to multiboot2. - The reason of adding this functionality to the existing "linux" module rather than "multiboot(2)" (1)multiboot is x86 only (2)Multiboot is added to "linux" module because it reuses existing code. - Some changes in original linux module code Move some #define from grub-core/loader/arm64/linux.c to include/grub/arm64/linux.h Make some shared functions for multiboot.c Remove "loaded" checking in the grub_cmd_devicetree of linux.c - Add grub_fdt_set_reg64 macro into fdt.h header file for inserting "reg" properiy, while #address-cells = <0x2> and #size-cells = <0x2> - Add the introduction of multiboot/module command in docs/grub.texi This multiboot support will be built in linux module for aarch64, and can not be used alone. docs/grub.texi | 10 + grub-core/Makefile.core.def | 1 + grub-core/loader/arm64/linux.c | 72 ++--- grub-core/loader/arm64/multiboot.c | 593 +++++++++++++++++++++++++++++++++++++ include/grub/arm64/linux.h | 11 + include/grub/arm64/multiboot.h | 115 +++++++ include/grub/fdt.h | 12 + 7 files changed, 778 insertions(+), 36 deletions(-) create mode 100644 grub-core/loader/arm64/multiboot.c create mode 100644 include/grub/arm64/multiboot.h Signed-off-by: Fu Wei <fu.wei(a)linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm(a)linaro.org> -- 1.8.3.1

9 years, 7 months

[PATCH v3] ArmPlatformPkg: fix gtdt.asl for ArmVExpressPkg

by fu.wei＠linaro.org

From: Fu Wei <fu.wei(a)linaro.org> Add Memory-mapped GT and SBSA Generic Watchdog timer info base on Foundation Model Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Fu Wei <fu.wei(a)linaro.org> --- .../AcpiTables/rtsm_ve-aemv8a/gtdt.asl | 67 +++++++++++++++++----- 1 file changed, 53 insertions(+), 14 deletions(-) diff --git a/ArmPlatformPkg/ArmVExpressPkg/AcpiTables/rtsm_ve-aemv8a/gtdt.asl b/ArmPlatformPkg/ArmVExpressPkg/AcpiTables/rtsm_ve-aemv8a/gtdt.asl index d304243..11d5f89 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/AcpiTables/rtsm_ve-aemv8a/gtdt.asl +++ b/ArmPlatformPkg/ArmVExpressPkg/AcpiTables/rtsm_ve-aemv8a/gtdt.asl @@ -36,16 +36,16 @@ */ [0004] Signature : "GTDT" -[0004] Table Length : 00000050 +[0004] Table Length : 000000D8 [0001] Revision : 02 [0001] Checksum : F1 [0006] Oem ID : "LINARO" [0008] Oem Table ID : "RTSMVEV8" -[0004] Oem Revision : 00000001 +[0004] Oem Revision : 00000002 [0004] Asl Compiler ID : "INTL" [0004] Asl Compiler Revision : 20110623 -[0008] Counter Block Address : 0000000000000000 +[0008] Counter Block Address : 000000002a430000 [0004] Reserved : 00000000 /* In RTSM model's dts file, the last cell of interrupts @@ -83,26 +83,35 @@ Always-on : 0 /* The 64-bit physical address at which the Counter Read block is located */ -[0008] CntReadBase Physical address : 0000000000000000 +[0008] CntReadBase Physical address : 000000002a800000 -[0004] Platform Timer Count : 00000001 -[0004] Platform Timer Offset : 0000005C +[0004] Platform Timer Count : 00000002 +[0004] Platform Timer Offset : 00000060 /* Memory-mapped GT (Generic Timer) structures */ [0001] Subtable Type : 00 [0002] Length : 0064 [0001] Reserved : 000000 [0008] Block Address : 000000002a810000 -[0004] Timer Count : 00000001 -[0004] Timer Offset : 00000010 +[0004] Timer Count : 00000002 +[0004] Timer Offset : 00000014 -/* One frame is available */ +/* Two frames are available + * In FVP base model's dts file, the last cell of interrupts + * is 0x04, it means its trigger type is 4 = active high level-sensitive. + * + * So in ACPI the Trigger Mode is 0 - Level triggered, and + * Polarity is 0 - Active high as ACPI spec describled. + * + * Using direct mapping for hwirqs, it means that we using IRQ ID: + * (SPI offset + 32), not SPI offset used in FDT. + */ [0001] Frame Number : 00 [0003] Reserved : 000000 [0008] Base Address : 000000002a820000 -[0008] EL0 Base Address : FFFFFFFFFFFFFFFF -[0004] Timer Interrupt : 00000029 /* 25+16 */ -[0004] Timer Flags (decoded below) : 00000000 /* Active high level-sensitive */ +[0008] EL0 Base Address : 000000002a820000 +[0004] Timer Interrupt : 00000039 /* 25(SPI)+32 */ +[0004] Timer Flags (decoded below) : 00000000 Trigger Mode : 0 Polarity : 0 /* No virtual timer */ @@ -110,7 +119,37 @@ [0004] Virtual Timer Flags (decoded below) : 00000000 Trigger Mode : 0 Polarity : 0 -[0004] Common Flags (decoded below) : 00000000 - Secure : 0 +/* CNTPSIRQ Secure physical timer event.*/ +[0004] Common Flags (decoded below) : 00000001 + Secure : 1 + Always On : 0 + +[0001] Frame Number : 01 +[0003] Reserved : 000000 +[0008] Base Address : 000000002a830000 +[0008] EL0 Base Address : 000000002a830000 +[0004] Timer Interrupt : 0000003A /* 26(SPI)+32 */ +[0004] Timer Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 0 +/* No virtual timer */ +[0004] Virtual Timer Interrupt : 00000000 +[0004] Virtual Timer Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 0 +/* CNTPSIRQ1 Secure physical timer event.*/ +[0004] Common Flags (decoded below) : 00000001 + Secure : 1 Always On : 0 +/* One EL2 SBSA Generic Watchdog timer is available */ +[0001] Subtable Type : 01 [SBSA Generic Watchdog] +[0001] Length : 1C +[0002] Reserved : 0000 +[0008] Refresh Frame Address : 000000002a450000 +[0008] Control Frame Address : 000000002a440000 +[0004] Timer Interrupt : 0000003B /* 27(SPI)+32 */ +[0004] Timer Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 0 + Secure : 0 -- 1.8.3.1

9 years, 7 months

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Linaro-uefi May 2015