Linaro-uefi December 2016

linaro-uefi@lists.linaro.org

17 participants
28 discussions

by Leif Lindholm

AARCH64 build was left out of initial version, so add to .dsc and set ACPI_MACHINE_WIDTH correctly. Also, acpidump.inf specified explicit per-architecture (but identical) CFLAGS. Rather than duplicating this further, use the same setting for all architectures until there is actually a need to diverge. Also update README to make it obvious AArch64 is supported. Signed-off-by: Leif Lindholm <leif.lindholm(a)linaro.org> --- generate/efi/AcpiPkg.dsc | 2 +- generate/efi/README | 1 + generate/efi/acpidump/acpidump.inf | 6 ++---- source/include/platform/acefi.h | 2 +- 4 files changed, 5 insertions(+), 6 deletions(-) diff --git a/generate/efi/AcpiPkg.dsc b/generate/efi/AcpiPkg.dsc index 323d39c..9302555 100644 --- a/generate/efi/AcpiPkg.dsc +++ b/generate/efi/AcpiPkg.dsc @@ -18,7 +18,7 @@ PLATFORM_VERSION = 1.0 DSC_SPECIFICATION = 0x00010005 OUTPUT_DIRECTORY = Build/Acpi - SUPPORTED_ARCHITECTURES = IA32|X64 + SUPPORTED_ARCHITECTURES = AARCH64|IA32|X64 BUILD_TARGETS = DEBUG|RELEASE SKUID_IDENTIFIER = DEFAULT diff --git a/generate/efi/README b/generate/efi/README index 7550e9d..b3ec3ff 100644 --- a/generate/efi/README +++ b/generate/efi/README @@ -20,6 +20,7 @@ But the porting has only been tested in a Linux environment. You can find built EFI binaries (e.x., acpidump.efi) in the following folders: + Build/Acpi/DEBUG_GCC47/AARCH64: aarch64 targets Build/Acpi/DEBUG_GCC47/IA32: i386 targets Build/Acpi/DEBUG_GCC47/X64: x86_64 targets diff --git a/generate/efi/acpidump/acpidump.inf b/generate/efi/acpidump/acpidump.inf index 8d2c979..e5f21c0 100644 --- a/generate/efi/acpidump/acpidump.inf +++ b/generate/efi/acpidump/acpidump.inf @@ -55,7 +55,5 @@ BaseLib [BuildOptions] - MSFT:*_*_IA32_CC_FLAGS = /Oi- /WX- /D_EDK2_EFI /DACPI_DUMP_APP - MSFT:*_*_X64_CC_FLAGS = /Oi- /WX- /D_EDK2_EFI /DACPI_DUMP_APP - GCC:*_*_IA32_CC_FLAGS = -U__linux__ -U_LINUX -D_EDK2_EFI -DACPI_DUMP_APP -fno-builtin -iwithprefix include - GCC:*_*_X64_CC_FLAGS = -U__linux__ -U_LINUX -D_EDK2_EFI -DACPI_DUMP_APP -fno-builtin -iwithprefix include + MSFT:*_*_*_CC_FLAGS = /Oi- /WX- /D_EDK2_EFI /DACPI_DUMP_APP + GCC:*_*_*_CC_FLAGS = -U__linux__ -U_LINUX -D_EDK2_EFI -DACPI_DUMP_APP -fno-builtin -iwithprefix include diff --git a/source/include/platform/acefi.h b/source/include/platform/acefi.h index dfa4894..30a5429 100644 --- a/source/include/platform/acefi.h +++ b/source/include/platform/acefi.h @@ -140,7 +140,7 @@ #define VOID void -#if defined(__ia64__) || defined(__x86_64__) +#if defined(__aarch64__) || (__ia64__) || defined(__x86_64__) #define ACPI_MACHINE_WIDTH 64 -- 2.10.2

7 years, 4 months

[PATCH v4 0/3] add hikey platform

by Haojian Zhuang

v4: 1. Add bit definition of MDDRC_AXI_MAP register. 2. Clean patches with comments. v3: 1. Clean patches with comments. v2: 1. Fix UniApp in hikey DSC file. v1: 1. Add hikey platform with DwEmmc Driver. Haojian Zhuang (3): Platforms: add skeleton of hikey platform Drivers/Mmc/DwEmmc: add designware emmc support Platforms/Hisilicon/HiKey: enable emmc Chips/Hisilicon/Hi6220/Hi6220.dec | 32 + Chips/Hisilicon/Hi6220/Include/Hi6220.h | 83 +++ Drivers/Mmc/DwEmmcDxe/DwEmmc.h | 127 ++++ Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.c | 648 +++++++++++++++++++++ Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.dec | 42 ++ Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.inf | 55 ++ Platforms/Hisilicon/HiKey/HiKey.dec | 36 ++ Platforms/Hisilicon/HiKey/HiKey.dsc | 489 ++++++++++++++++ Platforms/Hisilicon/HiKey/HiKey.fdf | 351 +++++++++++ Platforms/Hisilicon/HiKey/Include/ArmPlatform.h | 26 + Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKey.c | 159 +++++ .../Hisilicon/HiKey/Library/HiKeyLib/HiKeyHelper.S | 49 ++ .../Hisilicon/HiKey/Library/HiKeyLib/HiKeyLib.inf | 51 ++ .../Hisilicon/HiKey/Library/HiKeyLib/HiKeyMem.c | 235 ++++++++ 14 files changed, 2383 insertions(+) create mode 100644 Chips/Hisilicon/Hi6220/Hi6220.dec create mode 100644 Chips/Hisilicon/Hi6220/Include/Hi6220.h create mode 100644 Drivers/Mmc/DwEmmcDxe/DwEmmc.h create mode 100644 Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.c create mode 100644 Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.dec create mode 100644 Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.inf create mode 100644 Platforms/Hisilicon/HiKey/HiKey.dec create mode 100644 Platforms/Hisilicon/HiKey/HiKey.dsc create mode 100644 Platforms/Hisilicon/HiKey/HiKey.fdf create mode 100644 Platforms/Hisilicon/HiKey/Include/ArmPlatform.h create mode 100644 Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKey.c create mode 100644 Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyHelper.S create mode 100644 Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyLib.inf create mode 100644 Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyMem.c -- 2.7.4

7 years, 4 months

A pressing problem about USB mode

by zhufuwengang

Hi ,all My name is Wengang, I am an employee of Hisilicon. Hisilicon and Linaro have a corporation in the Aspen Project. Now we have a problem in the design of Poplar board. I want to know when run fastboot commands to flash the images to eMMC, which mode does the USB interface work on? (Host Mode or Device Mode or ..?) Best Regards, Wengang

7 years, 4 months

[linaro-uefi] Hisilicon/D03/D05: update UEFI version to 16.12

by Heyi Guo

Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Heyi Guo <heyi.guo(a)linaro.org> --- Platforms/Hisilicon/D03/D03.dsc | 2 +- Platforms/Hisilicon/D05/D05.dsc | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Platforms/Hisilicon/D03/D03.dsc b/Platforms/Hisilicon/D03/D03.dsc index b6ce299..4c90326 100644 --- a/Platforms/Hisilicon/D03/D03.dsc +++ b/Platforms/Hisilicon/D03/D03.dsc @@ -182,7 +182,7 @@ gHisiTokenSpaceGuid.PcdAlgSmmuBaseAddress|0xd0040000 - gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Hisilicon D03 UEFI 16.08 RC1" + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Hisilicon D03 UEFI 16.12 Release" gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18" diff --git a/Platforms/Hisilicon/D05/D05.dsc b/Platforms/Hisilicon/D05/D05.dsc index 1f5e084..5645b15 100644 --- a/Platforms/Hisilicon/D05/D05.dsc +++ b/Platforms/Hisilicon/D05/D05.dsc @@ -195,7 +195,7 @@ gHisiTokenSpaceGuid.PcdIsMPBoot|1 gHisiTokenSpaceGuid.PcdSocketMask|0x3 - gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Hisilicon D05 UEFI 16.08 RC1" + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Hisilicon D05 UEFI 16.12 Release" gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18" -- 1.9.1

7 years, 5 months

[PATCH] Platforms/AMD/Styx: map the DXE stack as non-executable

by Ard Biesheuvel

Map the DXE stack as non-executable, to prevent stack buffer overflows from being exploitable. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel(a)linaro.org> --- Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 3 +++ Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc | 3 +++ Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 3 +++ 3 files changed, 9 insertions(+) diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index f833fe200422..0f299c388d00 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -439,6 +439,9 @@ DEFINE DO_KCS = 0 gAmdModulePkgTokenSpaceGuid.PcdSataSerdesBase|0xE1200000 gAmdModulePkgTokenSpaceGuid.PcdSataSerdesOffset|0x00010000 + # map the stack as non-executable when entering the DXE phase + gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack|TRUE + [PcdsPatchableInModule] # PCIe Configuration: x4x2x2 gAmdModulePkgTokenSpaceGuid.PcdPcieCoreConfiguration|2 diff --git a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc index 107205386c55..0d630fba1ca9 100644 --- a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc +++ b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc @@ -461,6 +461,9 @@ DEFINE DO_KCS = 1 gAmdModulePkgTokenSpaceGuid.PcdSataSerdesBase|0xE1200000 gAmdModulePkgTokenSpaceGuid.PcdSataSerdesOffset|0x00010000 + # map the stack as non-executable when entering the DXE phase + gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack|TRUE + [PcdsPatchableInModule] # PCIe Configuration: x4x2x2 (=2 See Include/FDKGionb.h) gAmdModulePkgTokenSpaceGuid.PcdPcieCoreConfiguration|2 diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index 92721064a51f..944cee3d8536 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -458,6 +458,9 @@ DEFINE DO_KCS = 1 gAmdModulePkgTokenSpaceGuid.PcdSataSerdesBase|0xE1200000 gAmdModulePkgTokenSpaceGuid.PcdSataSerdesOffset|0x00010000 + # map the stack as non-executable when entering the DXE phase + gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack|TRUE + !if $(DO_XGBE) gAmdModulePkgTokenSpaceGuid.PcdXgbeEnable|TRUE -- 2.7.4

7 years, 5 months

[PATCH v3 0/3] add hikey platform

by Haojian Zhuang

v3: 1. Clean patches with comments. v2: 1. Fix UniApp in hikey DSC file. v1: 1. Add hikey platform with DwEmmc Driver. Haojian Zhuang (3): Platforms: add skeleton of hikey platform Drivers/Mmc/DwEmmc: add designware emmc support Platforms/Hisilicon/HiKey: enable emmc Chips/Hisilicon/Hi6220/Hi6220.dec | 32 + Chips/Hisilicon/Hi6220/Include/Hi6220.h | 74 +++ Drivers/Mmc/DwEmmcDxe/DwEmmc.h | 127 ++++ Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.c | 648 +++++++++++++++++++++ Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.dec | 42 ++ Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.inf | 55 ++ Platforms/Hisilicon/HiKey/HiKey.dec | 38 ++ Platforms/Hisilicon/HiKey/HiKey.dsc | 492 ++++++++++++++++ Platforms/Hisilicon/HiKey/HiKey.fdf | 351 +++++++++++ Platforms/Hisilicon/HiKey/Include/ArmPlatform.h | 26 + Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKey.c | 159 +++++ .../Hisilicon/HiKey/Library/HiKeyLib/HiKeyHelper.S | 49 ++ .../Hisilicon/HiKey/Library/HiKeyLib/HiKeyLib.inf | 51 ++ .../Hisilicon/HiKey/Library/HiKeyLib/HiKeyMem.c | 205 +++++++ 14 files changed, 2349 insertions(+) create mode 100644 Chips/Hisilicon/Hi6220/Hi6220.dec create mode 100644 Chips/Hisilicon/Hi6220/Include/Hi6220.h create mode 100644 Drivers/Mmc/DwEmmcDxe/DwEmmc.h create mode 100644 Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.c create mode 100644 Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.dec create mode 100644 Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.inf create mode 100644 Platforms/Hisilicon/HiKey/HiKey.dec create mode 100644 Platforms/Hisilicon/HiKey/HiKey.dsc create mode 100644 Platforms/Hisilicon/HiKey/HiKey.fdf create mode 100644 Platforms/Hisilicon/HiKey/Include/ArmPlatform.h create mode 100644 Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKey.c create mode 100644 Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyHelper.S create mode 100644 Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyLib.inf create mode 100644 Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyMem.c -- 2.7.4

7 years, 5 months

[linaro-uefi v7 00/38] Enable Hisilicon new platform D05 and D02/3 bug fix

by Heyi Guo

Hisilicon new platform D05 will be pushed to Linaro Reference Platform 16.12 release, and these patches are to enable Hisilicon D05 in OPP. Also add the patches D02/3 platform bug fixed. Code can also be found in my linaro repo: http://git.linaro.org/people/heyi.guo/OpenPlatformPkg.git branch: rp-16.12-04-all Changelog v6>v7: - Improve the code according to Leif's comments - Add new patches to fix new issues after updating EDKII base code and some new bug fix they are path 32--38: Hisilicon/D05: update distance of Slit table Platforms/D05/ACPI:dynamically detect chip version to set port enable/disable D03 enhance RTC lock acquiring Hisilicon: fix PXE boot fail issue Hisilicon/D05: flash related drivers switch to use generic BaseMemoryLib Hisilicon/D03: flash related drivers switch to use generic BaseMemoryLib Hisilicon/D02: flash related drivers switch to use generic and patch 1: Hisilicon/D02/D03: refine serdes lib structure Chenhui Sun (6): D02/ACPI: Use HISI0031 HID for uart on Hip05 soc Platform/D02: Update ACPI table header D03: Update ACPI Oem table header id D02: Update ACPI table header id D02/D03: Update version to 16.08 RC1 Hisilicon/D05: update distance of Slit table Hanjun Guo (1): D03/DSDT: use irq producer/consumer to support mbi-gen Heyi Guo (20): Hisilicon/D02/D03: refine serdes lib structure Platforms/Hisilicon: add D05 platform modules and files Hisilicon: fix FirmwareVendor pcd Hisilicon/D02: enlarge FVMAIN_COMPACT Hisilicon/D02: update ATF binaries to fix a bug in ATF code Hisilicon/D03: enlarge FVMAIN_COMPACT Platforms/D03: Update binaries D02/D03/D05: Support Spd mirror mode Hisilicon: remove D02 unused ACPI files Hisilicon: Add D03 ACPI tables Hisilicon/SMBIOS: Update ProcessorID from MIDR Hisilicon: Remove unnesseary variable initializtion D03/FdtUpdateLib: Update refclk in DT D03/ACPI: Refine SAS ASL code indention D03/USB: fix ehci interrupt pin number Hisilicon/D03: switch to NullMemoryTest Hisilicon: fix PXE boot fail issue Hisilicon/D05: flash related drivers switch to use generic BaseMemoryLib Hisilicon/D03: flash related drivers switch to use generic BaseMemoryLib Hisilicon/D02: flash related drivers switch to use generic BaseMemoryLib Kefeng Wang (1): D02/D03/ACPI: Fix wrong GTDT length Kejian Yan (2): D02/D03/Dsdt: add media-type property for hns D02/D03/Dsdt/hns: fix the bug of serdes loopback MaJun (1): D03/IORT:Change the single mapping flags of mbigen node to 1 Peicong Li (2): D03/D05: Change to access EEPROM data by checking page boundary D03: enhance RTC lock acquiring Salil Mehta (3): D03/ACPI: Add RoCE device to ACPI & IORT Tables D03/ACPI: Add support of RoCE Reset in DSDT D03/ACPI/ROCE: Add node-guid parameter to DSDT flyingnosky (1): D03/ACPI: support 50MHZ and 66MHZ boards in acpi mode huangming23 (1): Platforms/D05/ACPI: dynamically detect chip version to set port enable/disable .../Library/Hi1610Serdes/Hi1610SerdesLib.lib | Bin 601828 -> 603524 bytes .../Hi1610/Library/IpmiCmdLib/IpmiCmdLib.lib | Bin 253328 -> 247176 bytes .../Binary/Hi1610/Library/LpcLib/LpcLib.lib | Bin 13870 -> 13998 bytes .../Uart/LpcSerialPortLib/LpcSerialPortLib.lib | Bin 17086 -> 17022 bytes .../ProcessorSubClassDxe/ProcessorSubClass.c | 6 +- .../Type09/MiscSystemSlotDesignationFunction.c | 14 +- .../Hi1610/Hi1610AcpiTables/AcpiTablesHi1610.inf | 56 ++ .../Hisilicon/Hi1610/Hi1610AcpiTables/D03Iort.asl | 368 +++++++++++ .../Hisilicon/Hi1610/Hi1610AcpiTables/D03Mcfg.aslc | 85 +++ .../Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/CPU.asl | 88 +++ .../Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/Com.asl | 36 ++ .../Hi1610/Hi1610AcpiTables/Dsdt/D03Hns.asl | 691 +++++++++++++++++++++ .../Hi1610/Hi1610AcpiTables/Dsdt/D03Mbig.asl | 305 +++++++++ .../Hi1610/Hi1610AcpiTables/Dsdt/D03Pci.asl | 261 ++++++++ .../Hi1610/Hi1610AcpiTables/Dsdt/D03Sas.asl | 367 +++++++++++ .../Hi1610/Hi1610AcpiTables/Dsdt/D03Usb.asl | 136 ++++ .../Hi1610/Hi1610AcpiTables/Dsdt/DsdtHi1610.asl | 29 + .../Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/Lpc.asl | 25 + Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Facs.aslc | 67 ++ Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Fadt.aslc | 91 +++ Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Gtdt.aslc | 96 +++ .../Hi1610/Hi1610AcpiTables/Hi1610Platform.h | 48 ++ .../Hi1610/Hi1610AcpiTables/MadtHi1610.aslc | 128 ++++ Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Slit.aslc | 81 +++ Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Srat.aslc | 115 ++++ Chips/Hisilicon/Hi1610/Include/Library/SerdesLib.h | 108 ++-- Chips/Hisilicon/Hi1616/D05AcpiTables/D05Slit.aslc | 8 +- .../Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl | 33 +- Chips/Hisilicon/Hi1616/Include/Library/SerdesLib.h | 86 +++ Chips/Hisilicon/HisiPkg.dec | 3 + Chips/Hisilicon/Include/Library/HwMemInitLib.h | 4 + .../Library/PlatformIntelBdsLib/IntelBdsPlatform.c | 2 + .../PlatformIntelBdsLib/PlatformIntelBdsLib.inf | 1 + Chips/Hisilicon/Pv660/Include/Library/SerdesLib.h | 89 ++- .../Pv660/Pv660AcpiTables/AcpiTablesHi1610.inf | 56 -- Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Iort.asl | 337 ---------- Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Mcfg.aslc | 85 --- Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Com.asl | 5 +- .../Pv660/Pv660AcpiTables/Dsdt/D03Hns.asl | 558 ----------------- .../Pv660/Pv660AcpiTables/Dsdt/D03Mbig.asl | 125 ---- .../Pv660/Pv660AcpiTables/Dsdt/D03Pci.asl | 261 -------- .../Pv660/Pv660AcpiTables/Dsdt/D03Sas.asl | 247 -------- .../Pv660/Pv660AcpiTables/Dsdt/D03Usb.asl | 136 ---- .../Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Dsdt.asl | 2 +- .../Pv660/Pv660AcpiTables/Dsdt/DsdtHi1610.asl | 29 - Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Hns.asl | 16 +- Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Lpc.asl | 25 - Chips/Hisilicon/Pv660/Pv660AcpiTables/Gtdt.aslc | 2 +- Chips/Hisilicon/Pv660/Pv660AcpiTables/Iort.asl | 6 +- .../Pv660/Pv660AcpiTables/MadtHi1610.aslc | 128 ---- .../Pv660/Pv660AcpiTables/Pv660Platform.h | 10 +- Chips/Hisilicon/Pv660/Pv660AcpiTables/SASSSDT.ASL | 2 +- Chips/Hisilicon/Pv660/Pv660AcpiTables/SATASSDT.ASL | 2 +- Platforms/Hisilicon/Binary/D02/bl1.bin | Bin 14344 -> 12296 bytes Platforms/Hisilicon/Binary/D02/fip.bin | Bin 45621 -> 45621 bytes .../D03/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi | Bin 22304 -> 21696 bytes .../Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi | Bin 22240 -> 22208 bytes .../Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.efi | Bin 26720 -> 25440 bytes .../D03/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi | Bin 24704 -> 23712 bytes .../Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi | Bin 18368 -> 18080 bytes .../Net/SnpPV660DxeMac0/SnpPV600DxeMac0.efi | Bin 63648 -> 56832 bytes .../Net/SnpPV660DxeMac1/SnpPV600DxeMac1.efi | Bin 63648 -> 56832 bytes .../Net/SnpPV660DxeMac4/SnpPV600DxeMac4.efi | Bin 63648 -> 56832 bytes .../Net/SnpPV660DxeMac5/SnpPV600DxeMac5.efi | Bin 63648 -> 56832 bytes .../Binary/D03/Drivers/OhciDxe/NativeOhci.efi | Bin 55488 -> 48352 bytes .../ReportPciePlugDidVidToBmc.efi | Bin 22752 -> 22112 bytes .../Hisilicon/Binary/D03/Drivers/SFC/SFCDriver.efi | Bin 262144 -> 262144 bytes .../D03/Drivers/Sm750Dxe/SmiGraphicsOutput.efi | Bin 38624 -> 36480 bytes .../Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi | Bin 22112 -> 21408 bytes Platforms/Hisilicon/Binary/D03/Ebl/Ebl.efi | Bin 159744 -> 134240 bytes .../Library/OemAddressMap2P/OemAddressMap2P.lib | Bin 19568 -> 19486 bytes Platforms/Hisilicon/Binary/D03/Sec/FVMAIN_SEC.Fv | Bin 262144 -> 262144 bytes Platforms/Hisilicon/Binary/D03/bl1.bin | Bin 14336 -> 14336 bytes Platforms/Hisilicon/Binary/D03/fip.bin | Bin 45601 -> 45601 bytes .../D02/Library/OemMiscLibD02/BoardFeatureD02.c | 18 +- Platforms/Hisilicon/D02/Pv660D02.dsc | 9 +- Platforms/Hisilicon/D02/Pv660D02.fdf | 22 +- Platforms/Hisilicon/D03/D03.dsc | 17 +- Platforms/Hisilicon/D03/D03.fdf | 10 +- .../Drivers/OemNicConfig2PHi1610/OemNicConfig2P.c | 45 +- Platforms/Hisilicon/D03/Include/Library/CpldD03.h | 4 + .../DS3231RealTimeClockLib.c | 89 ++- .../DS3231RealTimeClockLib.inf | 2 + .../D03/Library/FdtUpdateLib/FdtUpdateLib.c | 60 ++ .../D03/Library/FdtUpdateLib/FdtUpdateLib.inf | 2 + .../Library/OemMiscLib2P/BoardFeature2PHi1610.c | 68 +- Platforms/Hisilicon/D05/D05.dsc | 679 ++++++++++++++++++++ Platforms/Hisilicon/D05/D05.fdf | 366 +++++++++++ .../D05/EarlyConfigPeim/EarlyConfigPeimD05.c | 64 ++ .../D05/EarlyConfigPeim/EarlyConfigPeimD05.inf | 53 ++ .../D05/Library/OemMiscLibD05/BoardFeatureD05.c | 225 +++++++ .../OemMiscLibD05/BoardFeatureD05Strings.uni | 56 ++ .../D05/Library/OemMiscLibD05/OemMiscLibD05.c | 107 ++++ .../D05/Library/OemMiscLibD05/OemMiscLibD05.inf | 55 ++ .../D05/Library/PlatformPciLib/PlatformPciLib.c | 279 +++++++++ .../D05/Library/PlatformPciLib/PlatformPciLib.inf | 183 ++++++ 96 files changed, 5650 insertions(+), 2222 deletions(-) create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/AcpiTablesHi1610.inf create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/D03Iort.asl create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/D03Mcfg.aslc create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/CPU.asl create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/Com.asl create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Hns.asl create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Mbig.asl create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Pci.asl create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Sas.asl create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Usb.asl create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/DsdtHi1610.asl create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/Lpc.asl create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Facs.aslc create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Fadt.aslc create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Gtdt.aslc create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Hi1610Platform.h create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/MadtHi1610.aslc create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Slit.aslc create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Srat.aslc create mode 100644 Chips/Hisilicon/Hi1616/Include/Library/SerdesLib.h delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/AcpiTablesHi1610.inf delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Iort.asl delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Mcfg.aslc delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Hns.asl delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Mbig.asl delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Pci.asl delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Sas.asl delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Usb.asl delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/DsdtHi1610.asl delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Lpc.asl delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/MadtHi1610.aslc create mode 100644 Platforms/Hisilicon/D05/D05.dsc create mode 100644 Platforms/Hisilicon/D05/D05.fdf create mode 100644 Platforms/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c create mode 100644 Platforms/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf create mode 100644 Platforms/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c create mode 100644 Platforms/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05Strings.uni create mode 100644 Platforms/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c create mode 100644 Platforms/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf create mode 100644 Platforms/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.c create mode 100644 Platforms/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf -- 1.9.1

7 years, 5 months

[linaro-uefi v6 00/37] Enable Hisilicon new platform D05 and D02/3 bug fix

by Heyi Guo

Hisilicon new platform D05 will be pushed to Linaro Reference Platform 16.12 release, and these patches are to enable Hisilicon D05 in OPP. Also add the patches D02/3 platform bug fixed. Code can also be found in my linaro repo: http://git.linaro.org/people/heyi.guo/OpenPlatformPkg.git branch: rp-16.12-03-all Changelog v5>v6: - Improve the code according to Leif's comments - Add new patches to fix new issues after updating EDKII base code and some new bug fix they are path 31--37: Hisilicon/D05: update distance of Slit table Platforms/D05/ACPI:dynamically detect chip version to set port enable/disable D03 enhance RTC lock acquiring Hisilicon: fix PXE boot fail issue Hisilicon/D05: flash related drivers switch to use generic BaseMemoryLib Hisilicon/D03: flash related drivers switch to use generic BaseMemoryLib Hisilicon/D02: flash related drivers switch to use generic Chenhui Sun (6): D02/ACPI: Use HISI0031 HID for uart on Hip05 soc Platform/D02: Update ACPI table header D03: Update ACPI Oem table header id D02: Update ACPI table header id D02/D03: Update version to 16.08 RC1 Hisilicon/D05: update distance of Slit table Hanjun Guo (1): D03/DSDT: use irq producer/consumer to support mbi-gen Heyi Guo (19): Platforms/Hisilicon: add D05 platform modules and files Hisilicon: fix FirmwareVendor pcd Hisilicon/D02: enlarge FVMAIN_COMPACT Hisilicon/D02: update ATF binaries to fix a bug in ATF code Hisilicon/D03: enlarge FVMAIN_COMPACT Platforms/D03: Update binaries D02/D03/D05: Support Spd mirror mode Hisilicon: remove D02 unused ACPI files Hisilicon: Add D03 ACPI tables Hisilicon/SMBIOS: Update ProcessorID from MIDR Hisilicon: Remove unnesseary variable initializtion D03/FdtUpdateLib: Update refclk in DT D03/ACPI: Refine SAS ASL code indention D03/USB: fix ehci interrupt pin number Hisilicon/D03: switch to NullMemoryTest Hisilicon: fix PXE boot fail issue Hisilicon/D05: flash related drivers switch to use generic BaseMemoryLib Hisilicon/D03: flash related drivers switch to use generic BaseMemoryLib Hisilicon/D02: flash related drivers switch to use generic BaseMemoryLib Kefeng Wang (1): D02/D03/ACPI: Fix wrong GTDT length Kejian Yan (2): D02/D03/Dsdt: add media-type property for hns D02/D03/Dsdt/hns: fix the bug of serdes loopback MaJun (1): D03/IORT:Change the single mapping flags of mbigen node to 1 Peicong Li (2): D03/D05: Change to access EEPROM data by checking page boundary D03: enhance RTC lock acquiring Salil Mehta (3): D03/ACPI: Add RoCE device to ACPI & IORT Tables D03/ACPI: Add support of RoCE Reset in DSDT D03/ACPI/ROCE: Add node-guid parameter to DSDT flyingnosky (1): D03/ACPI: support 50MHZ and 66MHZ boards in acpi mode huangming23 (1): Platforms/D05/ACPI:dynamically detect chip version to set port enable/disable .../Library/Hi1610Serdes/Hi1610SerdesLib.lib | Bin 601828 -> 603524 bytes .../Hi1610/Library/IpmiCmdLib/IpmiCmdLib.lib | Bin 253328 -> 247176 bytes .../Binary/Hi1610/Library/LpcLib/LpcLib.lib | Bin 13870 -> 13998 bytes .../Uart/LpcSerialPortLib/LpcSerialPortLib.lib | Bin 17086 -> 17022 bytes .../ProcessorSubClassDxe/ProcessorSubClass.c | 6 +- .../Hi1610/Hi1610AcpiTables/AcpiTablesHi1610.inf | 56 ++ .../Hisilicon/Hi1610/Hi1610AcpiTables/D03Iort.asl | 368 +++++++++++ .../Hisilicon/Hi1610/Hi1610AcpiTables/D03Mcfg.aslc | 85 +++ .../Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/CPU.asl | 88 +++ .../Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/Com.asl | 36 ++ .../Hi1610/Hi1610AcpiTables/Dsdt/D03Hns.asl | 691 +++++++++++++++++++++ .../Hi1610/Hi1610AcpiTables/Dsdt/D03Mbig.asl | 305 +++++++++ .../Hi1610/Hi1610AcpiTables/Dsdt/D03Pci.asl | 261 ++++++++ .../Hi1610/Hi1610AcpiTables/Dsdt/D03Sas.asl | 367 +++++++++++ .../Hi1610/Hi1610AcpiTables/Dsdt/D03Usb.asl | 136 ++++ .../Hi1610/Hi1610AcpiTables/Dsdt/DsdtHi1610.asl | 29 + .../Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/Lpc.asl | 25 + Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Facs.aslc | 67 ++ Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Fadt.aslc | 91 +++ Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Gtdt.aslc | 96 +++ .../Hi1610/Hi1610AcpiTables/Hi1610Platform.h | 48 ++ .../Hi1610/Hi1610AcpiTables/MadtHi1610.aslc | 128 ++++ Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Slit.aslc | 81 +++ Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Srat.aslc | 115 ++++ Chips/Hisilicon/Hi1616/D05AcpiTables/D05Slit.aslc | 8 +- .../Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl | 33 +- Chips/Hisilicon/Hi1616/Include/Library/SerdesLib.h | 71 +++ Chips/Hisilicon/HisiPkg.dec | 3 + Chips/Hisilicon/Include/Library/HwMemInitLib.h | 4 + .../Library/PlatformIntelBdsLib/IntelBdsPlatform.c | 2 + .../PlatformIntelBdsLib/PlatformIntelBdsLib.inf | 1 + .../Pv660/Pv660AcpiTables/AcpiTablesHi1610.inf | 56 -- Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Iort.asl | 337 ---------- Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Mcfg.aslc | 85 --- Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Com.asl | 5 +- .../Pv660/Pv660AcpiTables/Dsdt/D03Hns.asl | 558 ----------------- .../Pv660/Pv660AcpiTables/Dsdt/D03Mbig.asl | 125 ---- .../Pv660/Pv660AcpiTables/Dsdt/D03Pci.asl | 261 -------- .../Pv660/Pv660AcpiTables/Dsdt/D03Sas.asl | 247 -------- .../Pv660/Pv660AcpiTables/Dsdt/D03Usb.asl | 136 ---- .../Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Dsdt.asl | 2 +- .../Pv660/Pv660AcpiTables/Dsdt/DsdtHi1610.asl | 29 - Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Hns.asl | 16 +- Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Lpc.asl | 25 - Chips/Hisilicon/Pv660/Pv660AcpiTables/Gtdt.aslc | 2 +- Chips/Hisilicon/Pv660/Pv660AcpiTables/Iort.asl | 6 +- .../Pv660/Pv660AcpiTables/MadtHi1610.aslc | 128 ---- .../Pv660/Pv660AcpiTables/Pv660Platform.h | 10 +- Chips/Hisilicon/Pv660/Pv660AcpiTables/SASSSDT.ASL | 2 +- Chips/Hisilicon/Pv660/Pv660AcpiTables/SATASSDT.ASL | 2 +- Platforms/Hisilicon/Binary/D02/bl1.bin | Bin 14344 -> 12296 bytes Platforms/Hisilicon/Binary/D02/fip.bin | Bin 45621 -> 45621 bytes .../D03/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi | Bin 22304 -> 21696 bytes .../Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi | Bin 22240 -> 22208 bytes .../Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.efi | Bin 26720 -> 25440 bytes .../D03/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi | Bin 24704 -> 23712 bytes .../Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi | Bin 18368 -> 18080 bytes .../Net/SnpPV660DxeMac0/SnpPV600DxeMac0.efi | Bin 63648 -> 56832 bytes .../Net/SnpPV660DxeMac1/SnpPV600DxeMac1.efi | Bin 63648 -> 56832 bytes .../Net/SnpPV660DxeMac4/SnpPV600DxeMac4.efi | Bin 63648 -> 56832 bytes .../Net/SnpPV660DxeMac5/SnpPV600DxeMac5.efi | Bin 63648 -> 56832 bytes .../Binary/D03/Drivers/OhciDxe/NativeOhci.efi | Bin 55488 -> 48352 bytes .../ReportPciePlugDidVidToBmc.efi | Bin 22752 -> 22112 bytes .../Hisilicon/Binary/D03/Drivers/SFC/SFCDriver.efi | Bin 262144 -> 262144 bytes .../D03/Drivers/Sm750Dxe/SmiGraphicsOutput.efi | Bin 38624 -> 36480 bytes .../Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi | Bin 22112 -> 21408 bytes Platforms/Hisilicon/Binary/D03/Ebl/Ebl.efi | Bin 159744 -> 134240 bytes .../Library/OemAddressMap2P/OemAddressMap2P.lib | Bin 19568 -> 19486 bytes Platforms/Hisilicon/Binary/D03/Sec/FVMAIN_SEC.Fv | Bin 262144 -> 262144 bytes Platforms/Hisilicon/Binary/D03/bl1.bin | Bin 14336 -> 14336 bytes Platforms/Hisilicon/Binary/D03/fip.bin | Bin 45601 -> 45601 bytes Platforms/Hisilicon/D02/Pv660D02.dsc | 9 +- Platforms/Hisilicon/D02/Pv660D02.fdf | 22 +- Platforms/Hisilicon/D03/D03.dsc | 17 +- Platforms/Hisilicon/D03/D03.fdf | 10 +- .../Drivers/OemNicConfig2PHi1610/OemNicConfig2P.c | 45 +- Platforms/Hisilicon/D03/Include/Library/CpldD03.h | 4 + .../DS3231RealTimeClockLib.c | 83 ++- .../DS3231RealTimeClockLib.inf | 2 + .../D03/Library/FdtUpdateLib/FdtUpdateLib.c | 60 ++ .../D03/Library/FdtUpdateLib/FdtUpdateLib.inf | 2 + Platforms/Hisilicon/D05/D05.dsc | 679 ++++++++++++++++++++ Platforms/Hisilicon/D05/D05.fdf | 366 +++++++++++ .../D05/EarlyConfigPeim/EarlyConfigPeimD05.c | 64 ++ .../D05/EarlyConfigPeim/EarlyConfigPeimD05.inf | 53 ++ .../D05/Library/OemMiscLibD05/BoardFeatureD05.c | 225 +++++++ .../OemMiscLibD05/BoardFeatureD05Strings.uni | 56 ++ .../D05/Library/OemMiscLibD05/OemMiscLibD05.c | 107 ++++ .../D05/Library/OemMiscLibD05/OemMiscLibD05.inf | 55 ++ .../D05/Library/PlatformPciLib/PlatformPciLib.c | 279 +++++++++ .../D05/Library/PlatformPciLib/PlatformPciLib.inf | 183 ++++++ 91 files changed, 5488 insertions(+), 2066 deletions(-) create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/AcpiTablesHi1610.inf create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/D03Iort.asl create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/D03Mcfg.aslc create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/CPU.asl create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/Com.asl create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Hns.asl create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Mbig.asl create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Pci.asl create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Sas.asl create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Usb.asl create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/DsdtHi1610.asl create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/Lpc.asl create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Facs.aslc create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Fadt.aslc create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Gtdt.aslc create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Hi1610Platform.h create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/MadtHi1610.aslc create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Slit.aslc create mode 100644 Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Srat.aslc create mode 100644 Chips/Hisilicon/Hi1616/Include/Library/SerdesLib.h delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/AcpiTablesHi1610.inf delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Iort.asl delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Mcfg.aslc delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Hns.asl delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Mbig.asl delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Pci.asl delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Sas.asl delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Usb.asl delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/DsdtHi1610.asl delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Lpc.asl delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/MadtHi1610.aslc create mode 100644 Platforms/Hisilicon/D05/D05.dsc create mode 100644 Platforms/Hisilicon/D05/D05.fdf create mode 100644 Platforms/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c create mode 100644 Platforms/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf create mode 100644 Platforms/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c create mode 100644 Platforms/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05Strings.uni create mode 100644 Platforms/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c create mode 100644 Platforms/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf create mode 100644 Platforms/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.c create mode 100644 Platforms/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf -- 1.9.1

7 years, 5 months

[linaro-uefi PATCH 0/4] Platforms/ARM/VExpress: Support for MM Standalone mode on AArch64 FVP Base

by achin.gupta＠arm.com

This patchset adds support for creating a MM Standalone image suitable for running on a Base FVP in the AArch64 execution state. The core support for instantiating MM Standalone mode is being developed in the following edk2-staging branch: https://github.com/tianocore/edk2-staging/tree/AArch64StandaloneMm This branch and the patchset should be combined to build a MM Standalone image. The instructions for this will be updated in edk2-staging later. The changes in this series are aimed at: 1. partitioning DRAM to set aside memory for the MM Standalone image 2. including the necessary modules to instantiate the Standalone MM on the Base FVP This patchset should be staged in a separate branch until it is clearer how the MM Standalone image should be supported on common ARM platforms. Achin Gupta (4): Platforms/ARM/VExpress: Size DRAM to accommodate Standalone MM image Platforms/ARM/VExpress: Define extents of MM communication buffer Platforms/ARM/VExpress: Include MM communication protocol driver Platforms/ARM/VExpress: Include UEFI Info application in FVP build Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc | 10 +++++++++- Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.fdf | 4 ++++ 2 files changed, 13 insertions(+), 1 deletion(-) -- 1.9.1 IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

7 years, 5 months

[PATCH v4 0/2] Armada 70x0 firmware update command

by Marcin Wojtas

Hi Leif, Quick resend of the patchset with minor correction pointed in v3. The code can be also found in github: https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/opp… We will pop the champagne after NonDiscoverable merge, but thank you very much for your help and support getting all Armada 70x0 stuff into the tree. Best regards, Marcin Changelog: v3 -> v4 * Change SPI_ID_SIZE to sizeof (UINT32) * Add reviewed-by v2 -> v3 * Rename header structure to MV_FIRMWARE_IMAGE_HEADER * Add STATIC attribute where possible * Improve flash probe (add comments, use UINT32, SPI_ID_SIZE define and SwapBytes32) * Use CalculateSum32() instead of custom implementation * Improve prints when parsing image path * Sort HiiGuid in Marvell.dec * Improve help in .uni file v1 -> v2 * Remove executing external shell commands from commandline - now only local files can be burnt to flash * Add MARVELL_SPI_FLASH_PROTOCOL and MARVELL_SPI_MASTER_PROTOCOL usage * In order to be standalone command, enable detecting and configuring SPI flash * Style cleanup and new comments Jan Dąbroś (2): Applications/FirmwareUpdate: Add 'fupdate' comand to shell Platforms/Marvell: Enable 'fupdate' command on Armada70x0 platform Applications/FirmwareUpdate/FUpdate.c | 413 ++++++++++++++++++++++++++++++++ Applications/FirmwareUpdate/FUpdate.inf | 75 ++++++ Applications/FirmwareUpdate/FUpdate.uni | Bin 0 -> 5146 bytes Platforms/Marvell/Armada/Armada.dsc.inc | 1 + Platforms/Marvell/Marvell.dec | 1 + 5 files changed, 490 insertions(+) create mode 100644 Applications/FirmwareUpdate/FUpdate.c create mode 100644 Applications/FirmwareUpdate/FUpdate.inf create mode 100644 Applications/FirmwareUpdate/FUpdate.uni -- 1.8.3.1

7 years, 5 months

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Linaro-uefi December 2016