Linaro-uefi

linaro-uefi@lists.linaro.org

811 discussions

[PATCH 1/2] Drivers/Mmc/DwEmmc: limit max clock for platform

by Jun Nie

Some boards may have max clock limitation. Add a Pcd to notify driver. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jun Nie <jun.nie(a)linaro.org> --- Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.c | 3 +++ Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.dec | 1 + Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.inf | 1 + 3 files changed, 5 insertions(+) diff --git a/Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.c b/Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.c index fe23d11..c67dd0d 100644 --- a/Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.c +++ b/Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.c @@ -560,6 +560,9 @@ DwEmmcSetIos ( EFI_STATUS Status = EFI_SUCCESS; UINT32 Data; + if (BusClockFreq > PcdGet32 (PcdDwEmmcDxeMaxClockFrequencyInHz)) + return EFI_UNSUPPORTED; + if (TimingMode != EMMCBACKWARD) { Data = MmioRead32 (DWEMMC_UHSREG); switch (TimingMode) { diff --git a/Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.dec b/Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.dec index c4bf7ed..7b84a9a 100644 --- a/Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.dec +++ b/Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.dec @@ -40,3 +40,4 @@ # DwEmmc Driver PCDs gDwEmmcDxeTokenSpaceGuid.PcdDwEmmcDxeBaseAddress|0x0|UINT32|0x00000001 gDwEmmcDxeTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz|0x0|UINT32|0x00000002 + gDwEmmcDxeTokenSpaceGuid.PcdDwEmmcDxeMaxClockFrequencyInHz|0x0|UINT32|52000000 diff --git a/Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.inf b/Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.inf index c0cbba7..99176f1 100644 --- a/Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.inf +++ b/Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.inf @@ -49,6 +49,7 @@ [Pcd] gDwEmmcDxeTokenSpaceGuid.PcdDwEmmcDxeBaseAddress gDwEmmcDxeTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz + gDwEmmcDxeTokenSpaceGuid.PcdDwEmmcDxeMaxClockFrequencyInHz [Depex] TRUE -- 1.9.1

9 years

How to add support to different reg offset definition to share the same driver code?

by Jun Nie

Hi, I am trying to add support to different reg offset and bit offset in PL011 UART. It seems impossible to add macro in platform.dsc to enable undef/redef in the header file with "#ifdef ZX_PL011_FLAG". Is there any proper way to control the reg/bit offset definition? Or we have to adopt the Linux driver method with a structure to hold different offset value and wrap register access function as below? If so, another Pcd is needed to specify the offset structure index for the platforms. static u16 pl011_st_offsets[REG_ARRAY_SIZE] = { [REG_DR] = UART01x_DR, [REG_ST_DMAWM] = ST_UART011_DMAWM, [REG_ST_TIMEOUT] = ST_UART011_TIMEOUT, ... } static unsigned int pl011_read(const struct uart_amba_port *uap, unsigned int reg) { void __iomem *addr = uap->port.membase + uap->reg_offset[reg]; return (uap->port.iotype == UPIO_MEM32) ? readl_relaxed(addr) : readw_relaxed(addr); } Jun

9 years

[PATCH 0/2] Platforms/AMD/Cello: implement MAC override

by Ard Biesheuvel

Given that we're unlikely to ever see Cellos with the MAC programmed correctly, implement a driver that programs a MAC in a volatile manner instead. This still does not allow us to boot from the network, but at least we no longer have to care about this at the OS level. Ard Biesheuvel (2): Drivers/Net: add MAC override driver for Realtek 8169 Platforms/AMD/Cello: add Realtek MAC override driver Drivers/Net/Realtek8169MacOverride/Realtek8169MacOverride.c | 262 ++++++++++++++++++++ Drivers/Net/Realtek8169MacOverride/Realtek8169MacOverride.inf | 44 ++++ OpenPlatformPkg.dec | 3 + Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 7 + Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf | 4 + 5 files changed, 320 insertions(+) create mode 100644 Drivers/Net/Realtek8169MacOverride/Realtek8169MacOverride.c create mode 100644 Drivers/Net/Realtek8169MacOverride/Realtek8169MacOverride.inf -- 2.9.3

9 years

[PATCH v2 0/2] Platforms/AMD/Cello: implement MAC override

by Ard Biesheuvel

Given that we're unlikely to ever see Cellos with the MAC programmed correctly, implement a driver that programs a MAC in a volatile manner instead. This still does not allow us to boot from the network, but at least we no longer have to care about this at the OS level. v2: - fix build when override is not enabled - add support for taking the MAC from a UEFI var Ard Biesheuvel (2): Drivers/Net: add MAC override driver for Realtek 8169 Platforms/AMD/Cello: add Realtek MAC override driver Drivers/Net/Realtek8169MacOverride/Realtek8169MacOverride.c | 263 ++++++++++++++++++++ Drivers/Net/Realtek8169MacOverride/Realtek8169MacOverride.inf | 44 ++++ OpenPlatformPkg.dec | 3 + Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 15 +- Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf | 4 + 5 files changed, 326 insertions(+), 3 deletions(-) create mode 100644 Drivers/Net/Realtek8169MacOverride/Realtek8169MacOverride.c create mode 100644 Drivers/Net/Realtek8169MacOverride/Realtek8169MacOverride.inf -- 2.9.3

9 years

[PATCH v3] Platforms/AMD/Styx: add experimental command line flash tool

by Ard Biesheuvel

This implements a standalone UEFI Shell application that updates the EFI NOR partition with the contents of STYX_EFI.Fv. Note that this means that a) the ATF partition and EFI variables are preserved, *but* b) this updater can only be used on systems that have already been flashed with a firmware build based on this open source branch (and not on systems still running AMI firmware) NOTE: This tool performs no verification whatsoever whether the platform it is being executed on is compatible with the image it attempts to flash, nor does it check whether the flash completed successfully. This means you should only use it if you have a means of unbricking the board if needed, such as a Dediprog SPI flasher. You have been warned! In order for the flasher to have access to the various PCDs that describe where STYX_EFI.Fv lives in the NOR, it needs to be built as part of the platform, but after STYX_EFI.Fv has been generated, which results in a chicken-and-egg situation. Therefore, the recommended way of generating the flasher is 1) delete the Build/<platform> directory entirely 2) build the platform 3) build the platform again, but append the following -m OpenPlatformPkg/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf \ -D DO_FLASHER=TRUE The flasher application is called 'StyxFlashUefi' Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel(a)linaro.org> Tested-by: Roy Franz <roy.franz(a)cavium.com> --- v3: - broken out of the series, the remainder of which has already been merged - whitespace and coding style fixes (including INF_VERSION) - stress the experimental and unsupported nature in the commit log Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds | 86 ++++++++++++++++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S | 25 +++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c | 96 ++++++++++++++++++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf | 53 +++++++++++ Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 12 ++- Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc | 8 ++ Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 8 ++ 7 files changed, 286 insertions(+), 2 deletions(-) diff --git a/Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds b/Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds new file mode 100644 index 000000000000..7a0c87c6e32b --- /dev/null +++ b/Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds @@ -0,0 +1,86 @@ +/** @file + + Unified linker script for GCC based builds + + Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved. + Copyright (c) 2015 - 2017, Linaro Ltd. All rights reserved. + (C) Copyright 2016 Hewlett Packard Enterprise Development LP + + This program and the accompanying materials are licensed and made available under + the terms and conditions of the BSD License that accompanies this distribution. + The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +SECTIONS { + + /* + * The PE/COFF binary consists of DOS and PE/COFF headers, and a sequence of + * section headers adding up to PECOFF_HEADER_SIZE bytes (which differs + * between 32-bit and 64-bit builds). The actual start of the .text section + * will be rounded up based on its actual alignment. + */ + . = PECOFF_HEADER_SIZE; + + .text : ALIGN(CONSTANT(COMMONPAGESIZE)) { + *(.text .text.* .stub .gnu.linkonce.t.*) + *(.rodata .rodata.* .gnu.linkonce.r.*) + *(.got .got.*) + + /* + * The contents of AutoGen.c files are mostly constant from the POV of the + * program, but most of it ends up in .data or .bss by default since few of + * the variable definitions that get emitted are declared as CONST. + * Unfortunately, we cannot pull it into the .text section entirely, since + * patchable PCDs are also emitted here, but we can at least move all of the + * emitted GUIDs here. + */ + *:AutoGen.obj(.data.g*Guid) + } + + /* + * The alignment of the .data section should be less than or equal to the + * alignment of the .text section. This ensures that the relative offset + * between these sections is the same in the ELF and the PE/COFF versions of + * this binary. + */ + .data ALIGN(ALIGNOF(.text)) : ALIGN(CONSTANT(COMMONPAGESIZE)) { + *(.data .data.* .gnu.linkonce.d.*) + *(.bss .bss.*) + *(.payload) + } + + .eh_frame ALIGN(CONSTANT(COMMONPAGESIZE)) : { + KEEP (*(.eh_frame)) + } + + .rela (INFO) : { + *(.rela .rela.*) + } + + .hii : ALIGN(CONSTANT(COMMONPAGESIZE)) { + KEEP (*(.hii)) + } + + /* + * Retain the GNU build id but in a non-allocatable section so GenFw + * does not copy it into the PE/COFF image. + */ + .build-id (INFO) : { *(.note.gnu.build-id) } + + /DISCARD/ : { + *(.note.GNU-stack) + *(.gnu_debuglink) + *(.interp) + *(.dynsym) + *(.dynstr) + *(.dynamic) + *(.hash .gnu.hash) + *(.comment) + *(COMMON) + } +} diff --git a/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S b/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S new file mode 100644 index 000000000000..041339ee9b47 --- /dev/null +++ b/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S @@ -0,0 +1,25 @@ +/** @file + + Copyright (c) 2017, Linaro Ltd. All rights reserved. + + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + .section ".payload" + .align 12 + +ASM_GLOBAL ASM_PFX(StyxFlashImageStart) +ASM_PFX(StyxFlashImageStart): + .incbin "STYX_EFI.Fv" + + .align 2 +ASM_GLOBAL ASM_PFX(StyxFlashImageSize) +ASM_PFX(StyxFlashImageSize): + .long . - ASM_PFX(StyxFlashImageStart) diff --git a/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c b/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c new file mode 100644 index 000000000000..8f181bc2a54d --- /dev/null +++ b/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c @@ -0,0 +1,96 @@ +/** @file + + Copyright (c) 2017, Linaro Ltd. All rights reserved. + + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include <Uefi.h> +#include <Library/BaseMemoryLib.h> +#include <Library/ShellCEntryLib.h> +#include <Library/UefiBootServicesTableLib.h> +#include <Library/UefiLib.h> + +#include <Protocol/AmdIscpDxeProtocol.h> + +#define UEFI_IMAGE_OFFSET FixedPcdGet64 (PcdFvBaseAddress) - FixedPcdGet64 (PcdFdBaseAddress) +#define BLOCK_SIZE SIZE_64KB + +STATIC AMD_ISCP_DXE_PROTOCOL *mIscpDxeProtocol; +STATIC UINT8 Buffer[BLOCK_SIZE]; + +extern CONST UINT8 StyxFlashImageStart[]; +extern CONST UINT32 StyxFlashImageSize; + +/*** + Main entrypoint + + Establishes the main structure of the application. + + @retval 0 The application exited normally. + @retval Other An error occurred. +***/ +INTN +EFIAPI +ShellAppMain ( + IN UINTN Argc, + IN CHAR16 **Argv + ) +{ + EFI_STATUS Status; + UINTN Index; + INTN Remaining; + + Print (L"StyxFlashUefi: firmware updater for AMD Seattle based boards.\n"); + + Status = gBS->LocateProtocol (&gAmdIscpDxeProtocolGuid, NULL, + (VOID **)&mIscpDxeProtocol); + if (EFI_ERROR (Status)) { + Print (L"Failed to locate ISCP communication protocol, terminating...\n"); + return (INTN)Status; + } + + Index = 0; + Remaining = StyxFlashImageSize; + do { + Status = mIscpDxeProtocol->AmdExecuteEraseFvBlockDxe ( + mIscpDxeProtocol, + UEFI_IMAGE_OFFSET + Index * BLOCK_SIZE, + BLOCK_SIZE); + if (EFI_ERROR (Status)) { + Print (L"Erase failed!\n"); + return (INTN)Status; + } + + CopyMem (Buffer, StyxFlashImageStart + Index * BLOCK_SIZE, + MIN (Remaining, BLOCK_SIZE)); + + Status = mIscpDxeProtocol->AmdExecuteUpdateFvBlockDxe ( + mIscpDxeProtocol, + UEFI_IMAGE_OFFSET + Index * BLOCK_SIZE, + Buffer, + MIN (Remaining, BLOCK_SIZE)); + + if (EFI_ERROR (Status)) { + Print (L"Update failed!\n"); + return (INTN)Status; + } + + Remaining -= BLOCK_SIZE; + Index++; + + Print (L"Block %d of %d updated\n", Index, StyxFlashImageSize / BLOCK_SIZE); + + } while (Remaining > 0); + + Print (L"\nDone!\n"); + + return 0; +} diff --git a/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf b/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf new file mode 100644 index 000000000000..82ad96796680 --- /dev/null +++ b/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf @@ -0,0 +1,53 @@ +#/** @file +# +# Copyright (c) 2017, Linaro Ltd. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x00010019 + BASE_NAME = StyxFlashUefi + FILE_GUID = 07b65d9d-b1a2-416e-bd04-0b61b775f924 + MODULE_TYPE = UEFI_APPLICATION + VERSION_STRING = 0.1 + ENTRY_POINT = ShellCEntryLib + +# +# VALID_ARCHITECTURES = AARCH64 +# + +[Sources] + StyxFlashImage.S + StyxFlashUefi.c + +[Packages] + AmdModulePkg/AmdModulePkg.dec + ArmPkg/ArmPkg.dec + MdePkg/MdePkg.dec + ShellPkg/ShellPkg.dec + +[LibraryClasses] + BaseMemoryLib + ShellCEntryLib + UefiBootServicesTableLib + UefiLib + +[Protocols] + gAmdIscpDxeProtocolGuid + +[FixedPcd] + gArmTokenSpaceGuid.PcdFdBaseAddress + gArmTokenSpaceGuid.PcdFvBaseAddress + +[BuildOptions] + *_*_*_CC_FLAGS = -mcmodel=small + *_*_*_DLINK_FLAGS = -z common-page-size=0x1000 -Wl,-T,$(MODULE_DIR)/Scripts/GccBase.lds + *_*_*_PLATFORM_FLAGS = -I$(BIN_DIR)/../FV diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index 091914c047a3..90cda24ae49d 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -17,8 +17,9 @@ ################################################################################ [Defines] -DEFINE NUM_CORES = 4 -DEFINE DO_KCS = 0 +DEFINE NUM_CORES = 4 +DEFINE DO_KCS = 0 +DEFINE DO_FLASHER = FALSE PLATFORM_NAME = Cello PLATFORM_GUID = 77861b3e-74b0-4ff3-8d18-c5ba5803e1bf @@ -690,3 +691,10 @@ DEFINE DO_KCS = 0 !ifdef $(RENESAS_XHCI_FW_DIR) OpenPlatformPkg/Drivers/Xhci/RenesasFirmwarePD720202/RenesasFirmwarePD720202.inf !endif + +!if $(DO_FLASHER) == TRUE + OpenPlatformPkg/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf { + <LibraryClasses> + ShellCEntryLib|ShellPkg/Library/UefiShellCEntryLib/UefiShellCEntryLib.inf + } +!endif diff --git a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc index 57d1425b2c8f..5b7d7f4a7b4a 100644 --- a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc +++ b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc @@ -21,6 +21,7 @@ DEFINE NUM_CORES = 4 DEFINE DO_PSCI = 1 DEFINE DO_ISCP = 1 DEFINE DO_KCS = 1 +DEFINE DO_FLASHER = FALSE PLATFORM_NAME = Overdrive1000 PLATFORM_GUID = 36774DD7-20DE-4C5B-8722-f8861DFF1F16 @@ -701,3 +702,10 @@ DEFINE DO_KCS = 1 gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000 } + +!if $(DO_FLASHER) == TRUE + OpenPlatformPkg/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf { + <LibraryClasses> + ShellCEntryLib|ShellPkg/Library/UefiShellCEntryLib/UefiShellCEntryLib.inf + } +!endif diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index 6c284fb3b7db..662a15a9ccea 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -22,6 +22,7 @@ DEFINE NUM_CORES = 8 DEFINE DO_PSCI = 1 DEFINE DO_ISCP = 1 DEFINE DO_KCS = 1 +DEFINE DO_FLASHER = FALSE PLATFORM_NAME = Overdrive PLATFORM_GUID = B2296C02-9DA1-4CD1-BD48-4D4F0F1276EB @@ -752,3 +753,10 @@ DEFINE DO_KCS = 1 gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000 } + +!if $(DO_FLASHER) == TRUE + OpenPlatformPkg/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf { + <LibraryClasses> + ShellCEntryLib|ShellPkg/Library/UefiShellCEntryLib/UefiShellCEntryLib.inf + } +!endif -- 2.9.3

9 years

Arm Kernel with UEFI/64K page size

by Udit Kumar

Hi I am using kernel 4.4 with UEFI, and CPU is being ARM64. Could you help me if there is some known limitation with this kernel version to use 64K page size ? Problem I am facing with map of 15GB, sometimes kernel is not able to allocate huge pages at boot-time. Thanks Udit

9 years

[Linaro-uefi v1 1/4] Hisilicon/D05: update MemoryInit.efi

by Chenhui Sun

1. Delete defined but not used varables 2. Delete unnessary print information Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chenhui Sun <chenhui.sun(a)linaro.org> --- .../Binary/D05/MemoryInitPei/MemoryInit.efi | Bin 273312 -> 150784 bytes 1 file changed, 0 insertions(+), 0 deletions(-) diff --git a/Platforms/Hisilicon/Binary/D05/MemoryInitPei/MemoryInit.efi b/Platforms/Hisilicon/Binary/D05/MemoryInitPei/MemoryInit.efi index fd1208e..94a7b26 100644 Binary files a/Platforms/Hisilicon/Binary/D05/MemoryInitPei/MemoryInit.efi and b/Platforms/Hisilicon/Binary/D05/MemoryInitPei/MemoryInit.efi differ -- 1.9.1

9 years

[PATCH 0/6] Platforms/AMD/Styx: various Cello related fixes

by Ard Biesheuvel

A couple of fixes I applied to get Cello in a slightly better shape (although the observed SATA timeout issue requires a change in the core code) Ard Biesheuvel (6): Platforms/AMD/Styx: remove incorrect timer frequency Platforms/AMD/Styx: set SATA port mode to Gen3 on all ports Platforms/AMD/StyxDtbLoaderLib: disable SMMUs for absent hardware Platforms/AMD/Cello: add device tree support Platforms/AMD/Cello: reduce core count to 4 Platforms/AMD/Cello: set firmware vendor field to 'LeMaker Cello' Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 29 ++++++++++++++------ Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf | 9 ++++++ Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c | 9 +++++- Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc | 7 ++--- Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 6 +--- 5 files changed, 40 insertions(+), 20 deletions(-) -- 2.9.3

9 years

[RFC] migration of OpenPlatformPkg to tianocore

by Leif Lindholm

Hi all, As some of you may be aware, I have been working around the lack of a clear upstreaming strategy for platform support by keeping such code in a dedicated repository I set up at Linaro for that purpose: https://git.linaro.org/uefi/OpenPlatformPkg.git During discussions at the last Seattle plugfest we finally agreed on the (theoretical) details of how to use the edk2-platforms repository. After that I promised to migrate OpenPlatformPkg across to the edk2-platforms and edk2-non-osi structure, with the explicit end goal from my side that this should become the master branch for each. And now, before the release of HURD 1.0, I have. Current limitations (that I can remember): - A few references to OpenPlatformPkg remain, in ways that do not appear to break any of the platform builds. Most likely this affects dead code, but in case it's been accidentally orphaned, I thought it best to - I have simply nuked all references to Ebl (used in _addition_ to the UEFI shell, which was never the intent) and the efi-toolkit ramdisk driver. - The Marvell Yukon driver that I sent out for review last week has not migrated anywhere, and so has been temporarily disabled Mike suggested I should - USB support on the LeMaker Cello board depends on the patch "OptionRomPkg: add firmware loader driver for Renesas PD72020x" sent out by Ard on 18th of April. - I have dropped some of the binary-only modules from OpenPlatformPkg, and contacted the platform owners with requests for modifications. - The git history is quite messy and will be cleaned up, but I wanted to keep the transition quite visible in the RFC. - I haven't filled anything into the Maintainers.txt files - I am in favour of moving to a fully machine-readable format with wildcards as Laszlo has proposed in the past, and think this would be an excellent point to have that discussion (which can be had separately for edk2-platforms and edk2-non-osi from edk2). - Few of the platforms complete the FV generation stage, and I've inserted a couple of silly hacks to get them to get as far as they do. I think that either I am missing some points of how PACKAGES_PATH is intended to work, or I'm simply hitting corner cases no one has come across before. I could really use some help debugging these issues. (examples below). The below depends on the 3-part series I sent out today for importing DwEmmcDxe and EfiTimeBaseLib from OpenPlatformPkg. But apart from that, I have uploaded branches called devel-OpenPlatformPkg to: https://github.com/tianocore/edk2-platforms/tree/devel-OpenPlatformPkg https://github.com/tianocore/edk2-non-osi/tree/devel-OpenPlatformPkg These branches _will_ be rebased occasionally until they get to a point where they can move out of devel- stage (and hopefully onto master). Build issue description ======================= So, one of the hopefully easier ones is what I'm seeing when trying to build the Juno platform: $ PACKAGES_PATH="/work/maint/edk2-platforms:/work/maint/edk2-non-osi" GCC5_AARCH64_PREFIX=aarch64-linux-gnu- build -a AARCH64 -t GCC5 -p Platform/ARM/Juno/ArmJuno.dsc -b RELEASE -n 9 results in: <<< GenFds.py... : error F003: Output file for RAW section could not be found for Platform/ARM/Juno/AcpiTables/AcpiTables.inf ### build.py... : error 7000: Failed to execute command GenFds -f /work/maint/edk2-platforms/Platform/ARM/Juno/ArmJuno.fdf --conf=/work/maint/edk2/Conf -o /work/maint/edk2/Build/ArmJuno/RELEASE_GCC5 -t GCC5 -b RELEASE -p /work/maint/edk2-platforms/Platform/ARM/Juno/ArmJuno.dsc -a AARCH64 -D "EFI_SOURCE=/work/maint/edk2/EdkCompatibilityPkg" -D "EDK_SOURCE=/work/maint/edk2/EdkCompatibilityPkg" -D "TOOL_CHAIN_TAG=GCC5" -D "TOOLCHAIN=GCC5" -D "TARGET=RELEASE" -D "FAMILY=GCC" -D "WORKSPACE=/work/maint/edk2" -D "EDK_TOOLS_PATH=/work/maint/edk2/BaseTools" -D "ARCH=AARCH64" -D "ECP_SOURCE=/work/maint/edk2/EdkCompatibilityPkg" [/work/maint/edk2] - Failed - >>> And when I copy and paste the above command manually, I get: <<< GenFds.py... /work/maint/edk2-platforms/Platform/ARM/Juno/ArmJuno.dsc(34): error 000E: File/directory not found in workspace /work/maint/edk2-platforms/Platform/ARM/Juno/Platform/ARM/VExpress/ArmVExpress.dsc.inc /work/maint/edk2/Platform/ARM/VExpress/ArmVExpress.dsc.inc >>> So, to an uniformed observer, it seems the portion !include Platform/ARM/VExpress/ArmVExpress.dsc.inc from ArmJuno.dsc gets expanded to "directory ArmJuno.dsc is in" + "Platform/ARM/VExpress/ArmVExpress.dsc.inc" whereas I was hoping for it to try to find a match for "Platform/ARM/VExpress/ArmVExpress.dsc.inc" along PACKAGES_PATH (and find one in edk2-platforms). I also have the impression that something similar is happening in ArmJuno.fdf for the line INF RuleOverride=ACPITABLE Platform/ARM/Juno/AcpiTables/AcpiTables.inf generating the error message from the original build command. But I'm not quite sure how to debug these issues (short of fully figuring out the innards of MultipleWorkspace.py, MetaFileParser.py and a few others). Any ideas of where to look, or even what is going on? Would these cases be expected to work? / Leif

9 years

OpenPlatformPkg/Platforms/ARM/Juno: Enable Secure Boot

by Tommy Huynh

Hi Leif/Ard, Currently, what security properties does secure boot in edk2 on arm guarantee? How should one enable secure boot on the ARM Juno platform? I've tried copying sections related to "SECURE_BOOT_ENABLE" from OpenPlatformPkg/Platforms/ARM/VExpress/* into corresponding files in OpenPlatformPkg/Platforms/ARM/Juno/ and setting SECURE_BOOT_ENABLE = True. After rebuilding edk2 and arm-tf for Juno, I did a sanity test to check if the kernel image is verified during boot. I didn't sign the kernel image or provide any certificate, etc. so I expect the boot process to fail at kernel verification. However, the boot process continue until the Linux shell prompt. What did I miss here? I also came across this doc which includes some instructions on secure boot: https://github.com/tianocore/tianocore.github.io/wiki/How-to-Enable-Security Could you elaborate on how the DATA block (which include VARIABLE_STORE_HEADER) is created? Best Regards, Tommy IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

9 years, 1 month

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