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[PATCH v2 1/1] MM: Add SPM_BIN to support prebuilt secure partition image.

by Supreeth Venkatesh

This patch adds SPM_BIN to suport prebuilt secure partition image. For the moment, it assumes that secure partition image is STANDALONESMM image. The path is relative to $EDK2_DIR/Build/StandaloneSmmPkg/$BUILD_PROFILE/FV/. Also, this patch adds commandline "SPM=1" implicitly to build flags, when SPM_BIN is defined. SPM_BIN prebuilt image is passed in as a bl32 image to arm trusted firmware. Signed-off-by: Supreeth Venkatesh <supreeth.venkatesh(a)arm.com> --- Changes since v1: (*) Reword Commit Message. (*) Avoid references to SPD or TOS, though it still needs to evolve, since the final SPM code in arm-tf is not merged to master branch. --- atf-build.sh | 23 +++++++++++------------ platforms.config | 8 +++++--- 2 files changed, 16 insertions(+), 15 deletions(-) diff --git a/atf-build.sh b/atf-build.sh index 5c45708..b72cfbb 100755 --- a/atf-build.sh +++ b/atf-build.sh @@ -118,21 +118,20 @@ function build_platform fi else # - # BL32 could be the secure partition. - # If TOS_DIR is not set and the SPD is none then include BL32 as a - # prebuilt secure partition. + # Since TOS_DIR is not set, user does not want a Trusted OS + # even if the source directory and/or binary for it exists. + # Next, Check whether user wants secure partition image. + # If SPM_BIN is set then include pre-built secure partition image as a + # BL32 Image and implicitly set SPM=1. # - SPD="`$TOOLS_DIR/parse-platforms.py $PLATFORM_CONFIG -p $1 get -o atf_spd`" - TOS_BIN="`$TOOLS_DIR/parse-platforms.py $PLATFORM_CONFIG -p $1 get -o tos_bin`" + SPM_BIN="`$TOOLS_DIR/parse-platforms.py $PLATFORM_CONFIG -p $1 get -o spm_bin`" - if [ X"$SPD" == X"none" ] && [ X"$TOS_BIN" != X"" ]; then - BL32=$EDK2_DIR/$TOS_BIN - SPD_OPTION="BL32=$BL32" - else - echo "WARNING: Proceeding without Secure Partition!" - echo " Please specify both ATF_SPD=none and TOS_BIN" - echo " if you wish to use a Secure Partition!" + if [ X"$SPM_BIN" != X"" ]; then + BL32=$EDK2_DIR/Build/StandaloneSmmPkg/$BUILD_PROFILE/FV/$SPM_BIN + PLATFORM_BUILDFLAGS="$PLATFORM_BUILDFLAGS SPM=1" fi + # We assume that user does not want secure partition either. + # Todo: Revisit if either one of Trusted OS or Secure Partition Image is Mandatory. fi diff --git a/platforms.config b/platforms.config index 0639583..6db1340 100644 --- a/platforms.config +++ b/platforms.config @@ -46,6 +46,9 @@ # - ATF_SPD Name of Secure Payload Dispatcher # To actually build the Trusted OS, you must also set # TOS_BIN. +# - SPM_BIN Prebuilt Secure Partition image to pass to ARM Trusted Firmware. +# The path is relative to +# $EDK2_DIR/Build/StandaloneSmmPkg/$BUILD_PROFILE/FV/. # # Optional options: # - BUILDFLAGS Any special flags you want to pass to the build command. @@ -107,9 +110,8 @@ BUILD_ATF=debug UEFI_BIN=FVP_AARCH64_EFI.fd UEFI_IMAGE_DIR=ArmVExpress-FVP-AArch64-MM-Normal ATF_PLATFORM=fvp -TOS_BIN=Build/StandaloneSmmPkg/DEBUG_GCC49/FV/STANDALONESMM.fd -ATF_SPD=none -ATF_BUILDFLAGS=ARM_BL31_IN_DRAM=1 SPM=1 +SPM_BIN=STANDALONESMM.fd +ATF_BUILDFLAGS=ARM_BL31_IN_DRAM=1 [tc2] LONGNAME=Versatile Express TC2 -- 2.7.4

7 years, 6 months

[PATCH] MM: Corrected TOS_BIN Path for STANDALONESMM image.

by Supreeth Venkatesh

This patch corrects TOS_BIN Path from "Build/StandaloneSmmPkg/DEBUG_GCC49/FV/STANDALONESMM.fd" to "Build/StandaloneSmmPkg/DEBUG_GCC5/FV/STANDALONESMM.fd"so that normal world firmware image package(fip) is generated successfully. Also, this patch adds commandline "SPM=1", when there is no secure payload dispatcher defined but TOS_BIN exists. Signed-off-by: Supreeth Venkatesh <supreeth.venkatesh(a)arm.com> --- atf-build.sh | 2 +- platforms.config | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/atf-build.sh b/atf-build.sh index 5c45708..1eb1c44 100755 --- a/atf-build.sh +++ b/atf-build.sh @@ -127,7 +127,7 @@ function build_platform if [ X"$SPD" == X"none" ] && [ X"$TOS_BIN" != X"" ]; then BL32=$EDK2_DIR/$TOS_BIN - SPD_OPTION="BL32=$BL32" + SPD_OPTION="SPM=1" else echo "WARNING: Proceeding without Secure Partition!" echo " Please specify both ATF_SPD=none and TOS_BIN" diff --git a/platforms.config b/platforms.config index 0639583..82b959c 100644 --- a/platforms.config +++ b/platforms.config @@ -107,9 +107,9 @@ BUILD_ATF=debug UEFI_BIN=FVP_AARCH64_EFI.fd UEFI_IMAGE_DIR=ArmVExpress-FVP-AArch64-MM-Normal ATF_PLATFORM=fvp -TOS_BIN=Build/StandaloneSmmPkg/DEBUG_GCC49/FV/STANDALONESMM.fd +TOS_BIN=Build/StandaloneSmmPkg/DEBUG_GCC5/FV/STANDALONESMM.fd ATF_SPD=none -ATF_BUILDFLAGS=ARM_BL31_IN_DRAM=1 SPM=1 +ATF_BUILDFLAGS=ARM_BL31_IN_DRAM=1 [tc2] LONGNAME=Versatile Express TC2 -- 2.7.4

7 years, 6 months

[PATCH 0/5] OpenPlatformPkg: hacks to support RAS+SDEI on the FVP

by James Morse

Hi Leif, Achin, These are the OpenPlatformPkg parts of the RAS with SDEI demo on the FVP. There is no intention of upstreaming this, it's intended as a short-lived staging/topic branch, to be replaced by a proper version incorporating the MM work. This is just a bunch of hacks that let us work on the ATF<->Linux and MM stuff separately. Unfortunately this is based on an old commit: 4e9cfc934508 ("Platforms/ARM: Juno - add Uhci/Xhci drivers"). due to a mixture of ignorance and laziness, (shuffle compiler versions and branches until you find a combination that builds). MangleHEST? This is a short-lived efi-application that runs before the kernel to fixup the hard-coded HEST by allocating memory for the CPER records and re-writing the table. Obviously no real system should ever do this, this too will be replaced by a proper version that generates a correct HEST all in one go. Thanks, James Ard Biesheuvel (1): Platforms/FVP: Fix MADT to run the Foundation model in GICv3 mode with 4 CPUs James Morse (4): Platforms/FVP: Update FADT to ACPIv6 Platforms/FVP: Build MangleHEST, not LinuxLoader Platforms/FVP: Add SDEI and HEST ACPI tables Platforms/FVP: Correct PMU IRQ and GTDT timer offset .../AcpiTables/rtsm_ve-aemv8a/AcpiTables.inf | 2 + .../VExpress/AcpiTables/rtsm_ve-aemv8a/apic.asl | 124 ++++----------------- .../VExpress/AcpiTables/rtsm_ve-aemv8a/facp.asl | 6 +- .../VExpress/AcpiTables/rtsm_ve-aemv8a/gtdt.asl | 2 +- .../VExpress/AcpiTables/rtsm_ve-aemv8a/hest.asl | 48 ++++++++ .../VExpress/AcpiTables/rtsm_ve-aemv8a/sdei.asl | 18 +++ Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc | 2 + Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.fdf | 2 +- Platforms/ARM/VExpress/ArmVExpress.dsc.inc | 2 +- 9 files changed, 100 insertions(+), 106 deletions(-) create mode 100644 Platforms/ARM/VExpress/AcpiTables/rtsm_ve-aemv8a/hest.asl create mode 100644 Platforms/ARM/VExpress/AcpiTables/rtsm_ve-aemv8a/sdei.asl -- 2.11.0

7 years, 6 months

[PATCH 0/6] OpenPlatformPkg/AMD updates

by Ard Biesheuvel

This is what I have queued up for AMD Overdrive over the past couple of months. Some fixes and some features that would be good to get merged. Note that this only contains the SMMU support for the OS, not for UEFI itself. Most notably, there is now a dynamic PCD + UEFI var that needs to be set for the DT SMMU nodes and the ACPI IORT table to appear. Ard Biesheuvel (6): Platforms/AMD/Styx: remove unused PCD 'PcdStyxFdt' Platforms/AMD/Overdrive: add dynamic PCD to control SMMU availibility Platforms/AMD/Styx: enable SMMUs in the ACPI IORT table Platforms/AMD/Styx: enable SMMUs in the device tree Platforms/AMD/Overdrive: fix GIC MMIO region sizes Platforms/AMD/Styx: align UEFI PCI bus range with DT/ACPI descriptions Platforms/AMD/Styx/AcpiTables/AcpiTables.inf | 1 + Platforms/AMD/Styx/AcpiTables/Iort.c | 375 ++++++++++++++++++++ Platforms/AMD/Styx/AmdStyx.dec | 10 +- Platforms/AMD/Styx/Common/AmdStyxAcpiLib.h | 1 + Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c | 6 +- Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf | 6 +- Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c | 51 +++ Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.inf | 3 +- Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-overdrive.dtb | Bin 8293 -> 9357 bytes Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-overdrive.dts | 76 +++- Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 6 +- 11 files changed, 523 insertions(+), 12 deletions(-) create mode 100644 Platforms/AMD/Styx/AcpiTables/Iort.c -- 2.9.3

7 years, 6 months

[PATCH] platforms.config: add hikey960 platform

by Haojian Zhuang

Support both v1 and v2 hardware of hikey960 platform. Signed-off-by: Haojian Zhuang <haojian.zhuang(a)linaro.org> --- platforms.config | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/platforms.config b/platforms.config index 5332e0f..0639583 100644 --- a/platforms.config +++ b/platforms.config @@ -210,6 +210,17 @@ SCP_BIN=OpenPlatformPkg/Platforms/Hisilicon/HiKey/Binary/mcuimage.bin # Uncomment this to use UART0 as the OP-TEE Trusted OS console #TOS_BUILDFLAGS=CFG_CONSOLE_UART=0 +[hikey960] +LONGNAME=Hikey960 +DSC=OpenPlatformPkg/Platforms/Hisilicon/HiKey960/HiKey960.dsc +ARCH=AARCH64 +UEFI_BIN=BL33_AP_UEFI.fd +UEFI_IMAGE_DIR=HiKey960 +BUILD_ATF=yes +SCP_BIN=OpenPlatformPkg/Platforms/Hisilicon/HiKey960/Binary/lpm3.img +# Uncomment this to use UART5 as the EDK2 console for v1 hardware +#BUILDFLAGS=-DSERIAL_BASE=0xFDF05000 + [xen64] LONGNAME=AArch64 Xen guest BUILDFLAGS= -- 2.7.4

7 years, 6 months

[PATCH] Platforms/Marvell/Armada70x0: use dynamically discovered DRAM size

by Ard Biesheuvel

Find the structure in memory that describes the DRAM discovered by the secure firmware, and use it to initialize the UEFI memory descriptors. At the same time, drop the hardcoded DRAM size to 2 GB, which should be a reasonable lower bound for the amount of DDR4 DRAM on platforms built around this SoC family. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel(a)linaro.org> --- Platforms/Marvell/Armada/Armada.dsc.inc | 2 +- .../Armada70x0Lib/AArch64/ArmPlatformHelper.S | 84 +++++++++++++++------ .../Library/Armada70x0Lib/ARM/ArmPlatformHelper.S | 88 ++++++++++++++++------ .../Library/Armada70x0Lib/Armada70x0LibMem.c | 15 ++-- 4 files changed, 140 insertions(+), 49 deletions(-) diff --git a/Platforms/Marvell/Armada/Armada.dsc.inc b/Platforms/Marvell/Armada/Armada.dsc.inc index 222ab89cb45e..002c3b3ec961 100644 --- a/Platforms/Marvell/Armada/Armada.dsc.inc +++ b/Platforms/Marvell/Armada/Armada.dsc.inc @@ -371,7 +371,7 @@ # ARM Pcds gArmTokenSpaceGuid.PcdSystemMemoryBase|0 - gArmTokenSpaceGuid.PcdSystemMemorySize|0x100000000 + gArmTokenSpaceGuid.PcdSystemMemorySize|0x80000000 gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|36 gMarvellTokenSpaceGuid.PcdSecureRegionBase|0x4000000 diff --git a/Platforms/Marvell/Armada/Library/Armada70x0Lib/AArch64/ArmPlatformHelper.S b/Platforms/Marvell/Armada/Library/Armada70x0Lib/AArch64/ArmPlatformHelper.S index ba9685f1d36e..8246892f2585 100644 --- a/Platforms/Marvell/Armada/Library/Armada70x0Lib/AArch64/ArmPlatformHelper.S +++ b/Platforms/Marvell/Armada/Library/Armada70x0Lib/AArch64/ArmPlatformHelper.S @@ -26,37 +26,47 @@ #define CCU_MC_RTBR_OFFSET 0x8 #define CCU_MC_RTBR_TARGET_BASE(Base) (((Base) >> 20) << 10) +#define SYSTEM_INFO_ADDRESS 0x4000000 +#define SYSINFO_ARRAY_SIZE 0x0 +#define SYSINFO_DRAM_CS0_SIZE 0x1 + ASM_FUNC(ArmPlatformPeiBootAction) mov x29, xzr + mov x28, x30 .if FixedPcdGet64 (PcdSystemMemoryBase) != 0 .err PcdSystemMemoryBase should be 0x0 on this platform! .endif .if FixedPcdGet64 (PcdSystemMemorySize) > FixedPcdGet32 (PcdDramRemapTarget) - // - // Remap the DRAM region [DramRemapTarget, DramRemapTarget + DramRemapSize) - // to the top of the DRAM space. This is mainly intended to free up 32-bit - // addressable memory for MMIO and PCI windows. - // - MOV32 (x0, CCU_MC_BASE) - MOV32 (w1, CCU_MC_RSBR_SOURCE_BASE (FixedPcdGet64 (PcdSystemMemorySize))) - MOV32 (w2, CCU_MC_RTBR_TARGET_BASE (FixedPcdGet32 (PcdDramRemapTarget))) - MOV32 (w3, CCU_MC_RCR_REMAP_SIZE (FixedPcdGet32 (PcdDramRemapSize)) | CCU_MC_RCR_REMAP_EN) - str w1, [x0, #CCU_MC_RSBR_OFFSET] - str w2, [x0, #CCU_MC_RTBR_OFFSET] - str w3, [x0, #CCU_MC_RCR_OFFSET] - - // - // Use the low range for UEFI itself. The remaining memory will be mapped - // and added to the GCD map later. - // - adr x0, mSystemMemoryEnd - MOV64 (x1, FixedPcdGet32 (PcdDramRemapTarget) - 1) - str x1, [x0] + .err Hard coded PcdSystemMemorySize should not exceed PcdDramRemapTarget .endif - MOV32 (x0, FixedPcdGet64 (PcdFvBaseAddress)) + bl DiscoverDramSize + cbz w0, 0f + + // + // Remap the DRAM region [DramRemapTarget, DramRemapTarget + DramRemapSize) + // to the top of the DRAM space. This is mainly intended to free up 32-bit + // addressable memory for MMIO and PCI windows. + // + lsl w1, w0, #10 // set CCU_MC_RSBR_SOURCE_BASE to DRAM size in KiB + MOV32 (x0, CCU_MC_BASE) + MOV32 (w2, CCU_MC_RTBR_TARGET_BASE (FixedPcdGet32 (PcdDramRemapTarget))) + MOV32 (w3, CCU_MC_RCR_REMAP_SIZE (FixedPcdGet32 (PcdDramRemapSize)) | CCU_MC_RCR_REMAP_EN) + str w1, [x0, #CCU_MC_RSBR_OFFSET] + str w2, [x0, #CCU_MC_RTBR_OFFSET] + str w3, [x0, #CCU_MC_RCR_OFFSET] + + // + // Use the low range for UEFI itself. The remaining memory will be mapped + // and added to the GCD map later. + // + adr x0, mSystemMemoryEnd + MOV64 (x1, FixedPcdGet32 (PcdDramRemapTarget) - 1) + str x1, [x0] + +0:MOV32 (x0, FixedPcdGet64 (PcdFvBaseAddress)) MOV32 (x3, FixedPcdGet32 (PcdFvSize)) add x3, x3, x0 @@ -70,6 +80,38 @@ ASM_FUNC(ArmPlatformPeiBootAction) cmp x0, x3 b.lt 0b + ret x28 + +DiscoverDramSize: + // + // ARM Trusted Firmware leaves us a structure in memory that describes the + // nature of the available DRAM. It consists of an array of <u32, u32> + // key/value pairs, where the only keys we are [currently] interested in are: + // + // 0x0 (ARRAY_SIZE) the overall number of entries (should be the first) + // 0x1 (DRAM_CS0_SIZE) the size in MiB of DRAM bank 0 + // + MOV32 (x4, SYSTEM_INFO_ADDRESS) + ldp w0, w1, [x4], #8 + + cmp w0, #SYSINFO_ARRAY_SIZE // first entry contains array size? + b.ne 1f + +0:subs w1, w1, #1 // more entries to check? + b.eq 1f + + ldp w2, w3, [x4], #8 // next entry contains DRAM CS0 size? + cmp w2, #SYSINFO_DRAM_CS0_SIZE + b.ne 0b + + mov w0, w3 // return value in MiB + + adr x1, DiscoveredDramSize // store value in bytes + lsl x3, x3, #20 + str x3, [x1] + ret + +1:mov w0, wzr ret //UINTN diff --git a/Platforms/Marvell/Armada/Library/Armada70x0Lib/ARM/ArmPlatformHelper.S b/Platforms/Marvell/Armada/Library/Armada70x0Lib/ARM/ArmPlatformHelper.S index 4cd8b3154e82..fdb688ca489a 100644 --- a/Platforms/Marvell/Armada/Library/Armada70x0Lib/ARM/ArmPlatformHelper.S +++ b/Platforms/Marvell/Armada/Library/Armada70x0Lib/ARM/ArmPlatformHelper.S @@ -26,36 +26,80 @@ #define CCU_MC_RTBR_OFFSET 0x8 #define CCU_MC_RTBR_TARGET_BASE(Base) (((Base) >> 20) << 10) +#define SYSTEM_INFO_ADDRESS 0x4000000 +#define SYSINFO_ARRAY_SIZE 0x0 +#define SYSINFO_DRAM_CS0_SIZE 0x1 + ASM_FUNC(ArmPlatformPeiBootAction) + mov r13, lr + .if FixedPcdGet64 (PcdSystemMemoryBase) != 0 .err PcdSystemMemoryBase should be 0x0 on this platform! .endif .if FixedPcdGet64 (PcdSystemMemorySize) > FixedPcdGet32 (PcdDramRemapTarget) - // - // Remap the DRAM region [DramRemapTarget, DramRemapTarget + DramRemapSize) - // to the top of the DRAM space. This is mainly intended to free up 32-bit - // addressable memory for MMIO and PCI windows. - // - MOV32 (r0, CCU_MC_BASE) - MOV32 (r1, CCU_MC_RSBR_SOURCE_BASE (FixedPcdGet64 (PcdSystemMemorySize))) - MOV32 (r2, CCU_MC_RTBR_TARGET_BASE (FixedPcdGet32 (PcdDramRemapTarget))) - MOV32 (r3, CCU_MC_RCR_REMAP_SIZE (FixedPcdGet32 (PcdDramRemapSize)) | CCU_MC_RCR_REMAP_EN) - str r1, [r0, #CCU_MC_RSBR_OFFSET] - str r2, [r0, #CCU_MC_RTBR_OFFSET] - str r3, [r0, #CCU_MC_RCR_OFFSET] - - // - // Use the low range for UEFI itself. The remaining memory will be mapped - // and added to the GCD map later. - // - ADRL (r0, mSystemMemoryEnd) - MOV32 (r2, FixedPcdGet32 (PcdDramRemapTarget) - 1) - mov r3, #0 - strd r2, r3, [r0] - + .err Hard coded PcdSystemMemorySize should not exceed PcdDramRemapTarget .endif + bl DiscoverDramSize + cmp r0, #0 + beq 0f + + // + // Remap the DRAM region [DramRemapTarget, DramRemapTarget + DramRemapSize) + // to the top of the DRAM space. This is mainly intended to free up 32-bit + // addressable memory for MMIO and PCI windows. + // + lsl r1, r0, #10 // set CCU_MC_RSBR_SOURCE_BASE to DRAM size in KiB + MOV32 (r0, CCU_MC_BASE) + MOV32 (r2, CCU_MC_RTBR_TARGET_BASE (FixedPcdGet32 (PcdDramRemapTarget))) + MOV32 (r3, CCU_MC_RCR_REMAP_SIZE (FixedPcdGet32 (PcdDramRemapSize)) | CCU_MC_RCR_REMAP_EN) + str r1, [r0, #CCU_MC_RSBR_OFFSET] + str r2, [r0, #CCU_MC_RTBR_OFFSET] + str r3, [r0, #CCU_MC_RCR_OFFSET] + + // + // Use the low range for UEFI itself. The remaining memory will be mapped + // and added to the GCD map later. + // + ADRL (r0, mSystemMemoryEnd) + MOV32 (r2, FixedPcdGet32 (PcdDramRemapTarget) - 1) + mov r3, #0 + strd r2, r3, [r0] + +0:bx r13 + +DiscoverDramSize: + // + // ARM Trusted Firmware leaves us a structure in memory that describes the + // nature of the available DRAM. It consists of an array of <u32, u32> + // key/value pairs, where the only keys we are [currently] interested in are: + // + // 0x0 (ARRAY_SIZE) the overall number of entries (should be the first) + // 0x1 (DRAM_CS0_SIZE) the size in MiB of DRAM bank 0 + // + MOV32 (r4, SYSTEM_INFO_ADDRESS) + ldrd r0, r1, [r4], #8 + + cmp r0, #SYSINFO_ARRAY_SIZE // first entry contains array size? + bne 1f + +0:subs r1, r1, #1 // more entries to check? + beq 1f + + ldrd r2, r3, [r4], #8 // next entry contains DRAM CS0 size? + cmp r2, #SYSINFO_DRAM_CS0_SIZE + bne 0b + + mov r0, r3 // return value in MiB + + ADRL (r1, DiscoveredDramSize) + lsl r2, r3, #20 // store value in bytes + lsr r3, r3, #12 + strd r2, r3, [r1] + bx lr + +1:mov r0, #0 bx lr //UINTN diff --git a/Platforms/Marvell/Armada/Library/Armada70x0Lib/Armada70x0LibMem.c b/Platforms/Marvell/Armada/Library/Armada70x0Lib/Armada70x0LibMem.c index 4d80426c177c..85df57164b7f 100644 --- a/Platforms/Marvell/Armada/Library/Armada70x0Lib/Armada70x0LibMem.c +++ b/Platforms/Marvell/Armada/Library/Armada70x0Lib/Armada70x0LibMem.c @@ -47,6 +47,13 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. STATIC ARM_MEMORY_REGION_DESCRIPTOR VirtualMemoryTable[MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS]; +// +// This will be overwritten by ArmPlatformPeiBootAction() based on information +// provided by the secure firmware. PcdSystemMemorySize should be a reasonable +// default otherwise. +// +UINT64 DiscoveredDramSize = FixedPcdGet64 (PcdSystemMemorySize); + /** Return the Virtual Memory Map of your platform @@ -63,7 +70,6 @@ ArmPlatformGetVirtualMemoryMap ( ) { UINTN Index = 0; - UINT64 MemSize; UINT64 MemLowSize; UINT64 MemHighStart; UINT64 MemHighSize; @@ -71,11 +77,10 @@ ArmPlatformGetVirtualMemoryMap ( ASSERT (VirtualMemoryMap != NULL); - MemSize = FixedPcdGet64 (PcdSystemMemorySize); - MemLowSize = MIN (FixedPcdGet64 (PcdDramRemapTarget), MemSize); + MemLowSize = MIN (FixedPcdGet64 (PcdDramRemapTarget), DiscoveredDramSize); MemHighStart = (UINT64)FixedPcdGet64 (PcdDramRemapTarget) + FixedPcdGet32 (PcdDramRemapSize); - MemHighSize = MemSize - MemLowSize; + MemHighSize = DiscoveredDramSize - MemLowSize; ResourceAttributes = ( EFI_RESOURCE_ATTRIBUTE_PRESENT | @@ -105,7 +110,7 @@ ArmPlatformGetVirtualMemoryMap ( VirtualMemoryTable[Index].Length = 0x20000000; VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; - if (MemSize > MemLowSize) { + if (DiscoveredDramSize > MemLowSize) { // // If we have more than MemLowSize worth of DRAM, the remainder will be // mapped at the top of the remapped window. -- 2.9.3

7 years, 6 months

[uefi-tools v3 0/3] Update build commands to include MM image

by achin.gupta＠arm.com

From: Achin Gupta <achin.gupta(a)arm.com> Hi, This patch makes some tweaks to the ARM Trusted firmware build command being used to include support for the MM Dispatcher and EDK2 MM images. It also updated the atf-build.sh to not export the SCP_BL2 option for the FVP platform. cheers, Achin Changelog: v3: Split last patch in v2 to separate changes to remove the EDK2_ENABLE_SMSC_91X build option and to update the ARM TF build command line v2: Replaced platform specific conditional to not export the SCP_BL2 option with a generic condition. v1: First patchset Achin Gupta (2): Do not export SCP firmware path on FVP build MM: Change options to include MM image in ARM TF atf-build.sh | 33 +++++++++++++++++++++------------ platforms.config | 11 +++++------ 2 files changed, 26 insertions(+), 18 deletions(-) -- 1.9.1

7 years, 7 months

[linaro-uefi v1 0/3] Updates to AArch64StandaloneMm branch

by achin.gupta＠arm.com

From: Achin Gupta <achin.gupta(a)arm.com> Hi, This patchset incorporates changes to the AArch64StandaloneMm branch that: 1. Update the size of the MM communication buffer shared between the normal and secure worlds 2. Restore the size of the secure partition of the DRAM to 16MB instead of 64MB I would like the AArch64StandaloneMm branch to be force updated with this patch stack on top of the latest master branch. Please ignore any patches posted previously in this regard. cheers, Achin Achin Gupta (3): Platforms/ARM/VExpress: Define extents of MM communication buffer Platforms/ARM/VExpress: Include MM communication protocol driver Platforms/ARM/VExpress: Include UEFI Info application in FVP build Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc | 14 ++++++++++++++ Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.fdf | 6 ++++++ 2 files changed, 20 insertions(+) -- 1.9.1

7 years, 7 months

[uefi-tools v1 0/2] Update build commands to include MM image

by achin.gupta＠arm.com

7 years, 7 months

[uefi-tools v2 0/2] Update build commands to include MM image

by achin.gupta＠arm.com

From: Achin Gupta <achin.gupta(a)arm.com> Hi, This patch makes some tweaks to the ARM Trusted firmware build command being used to include support for the MM Dispatcher and EDK2 MM images. It also updated the atf-build.sh to not export the SCP_BL2 option for the FVP platform. cheers, Achin Changelog: v2: Replaced platform specific conditional to not export the SCP_BL2 option with a generic condition. v1: First patchset Achin Gupta (2): Do not export SCP firmware path on FVP build MM: Change options to include MM image in ARM TF atf-build.sh | 33 +++++++++++++++++++++------------ platforms.config | 11 +++++------ 2 files changed, 26 insertions(+), 18 deletions(-) -- 1.9.1

7 years, 7 months

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