Currently, the only supported way of running Tianocore on FVP is using ARM Trusted Firmware at EL3, in which case only a single core will enter the UEFI firmware at EL2. This means we can move to the UniCore flavor of PrePi/PrePeiCore, which now have been made compatible with running on an otherwise MpCore capable system. So replace the .inf references, and drop or update the PCDs related to secondary boot as appropriate.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Note that this depends on my patch 'ArmPlatformPkg/PrePi: allow unicore version to be used on MP hardware'
http://article.gmane.org/gmane.comp.bios.edk2.devel/10903
Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc | 18 +++++------------- Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.fdf | 4 ++-- 2 files changed, 7 insertions(+), 15 deletions(-)
diff --git a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc index 78330d624216..92af088b7759 100644 --- a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc +++ b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc @@ -90,9 +90,8 @@ gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Fixed Virtual Platform" gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ARM-FVP"
- # Up to 8 cores on Base models. This works fine if model happens to have less. - gArmPlatformTokenSpaceGuid.PcdCoreCount|8 - gArmPlatformTokenSpaceGuid.PcdClusterCount|2 + # Only one core enters UEFI, and PSCI is implemented in EL3 by ATF + gArmPlatformTokenSpaceGuid.PcdCoreCount|1
# # NV Storage PCDs. Use base of 0x0C000000 for NOR1 @@ -106,18 +105,11 @@
gArmTokenSpaceGuid.PcdVFPEnabled|1
- # FVP models can have 2 clusters with 4 cpus each - # Stacks for MPCores in Secure World - # Trusted SRAM (DRAM on Foundation model) - gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x04000000 - gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x1000 - gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x800 - # Stacks for MPCores in Normal World # Non-Trusted SRAM gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x2E000000 gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000 - gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000 + gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x0
# System Memory (2GB - 16MB of Trusted DRAM at the top of the 32bit address space) gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000 @@ -213,14 +205,14 @@ # !ifdef EDK2_SKIP_PEICORE # UEFI is placed in RAM by bootloader - ArmPlatformPkg/PrePi/PeiMPCore.inf { + ArmPlatformPkg/PrePi/PeiUniCore.inf { <LibraryClasses> ArmLib|ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf } !else # UEFI lives in FLASH and copies itself to RAM - ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf + ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf MdeModulePkg/Core/Pei/PeiMain.inf MdeModulePkg/Universal/PCD/Pei/Pcd.inf { <LibraryClasses> diff --git a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.fdf b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.fdf index 99230813b335..79c074c834d8 100644 --- a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.fdf +++ b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.fdf @@ -242,9 +242,9 @@ READ_LOCK_CAP = TRUE READ_LOCK_STATUS = TRUE
!if $(EDK2_SKIP_PEICORE) == 1 - INF ArmPlatformPkg/PrePi/PeiMPCore.inf + INF ArmPlatformPkg/PrePi/PeiUniCore.inf !else - INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf + INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf INF MdeModulePkg/Core/Pei/PeiMain.inf INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf