On Wed, Jan 11, 2017 at 01:36:29PM +0100, Marcin Wojtas wrote:
@@ -831,12 +831,10 @@ EmmcSwitchToHS200 ( return Status; } //
- // Set to HS200/SDR104 timing
- //
- //
- // Stop bus clock at first
- // Set to High Speed timing //
- Status = SdMmcHcStopClock (PciIo, Slot);
- HostCtrl1 = BIT2;
A descriptive #define for that bit, please.
Code chunk + comment copied from another function (EmmcSwitchToHighSpeed). Anyway, ok - will fix.
- Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1); if (EFI_ERROR (Status)) { return Status; }
@@ -849,33 +847,13 @@ EmmcSwitchToHS200 ( return Status; } //
- // Set UHS Mode Select field of Host Control 2 reigster to SDR104
- // Set UHS Mode Select field of Host Control 2 reigster to Xenon-specific HS200 value. //
- HostCtrl2 = BIT0 | BIT1;
- HostCtrl2 = 0x5;
And those two.
I thought comment can be enough - will fix.
With a descriptive define, the comment won't be needed.
Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2); if (EFI_ERROR (Status)) { return Status; }
//
// Wait Internal Clock Stable in the Clock Control register to be 1 before set SD Clock Enable bit
//
Status = SdMmcHcWaitMmioSet (
PciIo,
Slot,
SD_MMC_HC_CLOCK_CTRL,
sizeof (ClockCtrl),
BIT1,
BIT1,
SD_MMC_HC_GENERIC_TIMEOUT
);
if (EFI_ERROR (Status)) {
return Status;
}
//
// Set SD Clock Enable in the Clock Control register to 1
//
ClockCtrl = BIT2;
Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
HsTiming = 2;
2 what? And please add the numeric value as a #define in SdMmcPciHci.h.
This one is not added in the patch - it's original code from edk2. Should I update it anyway?
Hah, sorry, it just jumped out at me so I didn't spot it didn't have +s. No, you don't have to.
/ Leif