PCIe on some ARM platforms requires address translation, not only for legacy IO access, but also for 32bit memory BAR access as well. There will be "Address Translation Unit" or something similar in PCI host bridges to translation CPU address to PCI address and vice versa. So we think it may be useful to add address translation support to the generic PCI host bridge driver.
This RFC only contains one minor change to the definition of PciHostBridgeLib, and there certainly will be a lot of other changes to make it work, including:
1. Use CPU address for GCD space add and allocate operations, instead of PCI address; also IO space will be changed to memory space if translation exists.
2. RootBridgeIoMemRead/Write, RootBridgeIoRead/Write need to get translation of the corresponding aperture, add the translation to the input address, and then call CpuIo2 protocol; IO access will also be converted to memory access if IO translation exists.
3. RootBridgeIoConfiguration needs to fill AddrTranslationOffset in the discriptor.
If it makes sense, then I'll continue to prepare the formal patch.
Any comments?
Thanks,
Gary (Heyi Guo)
Cc: Star Zeng star.zeng@intel.com Cc: Eric Dong eric.dong@intel.com Cc: Ruiyu Ni ruiyu.ni@intel.com Cc: Ard Biesheuvel ard.biesheuvel@linaro.org Cc: Jason Zhang jason.zhang@linaro.org
--- MdeModulePkg/Include/Library/PciHostBridgeLib.h | 1 + 1 file changed, 1 insertion(+)
diff --git a/MdeModulePkg/Include/Library/PciHostBridgeLib.h b/MdeModulePkg/Include/Library/PciHostBridgeLib.h index d42e9ec..b9e8c0f 100644 --- a/MdeModulePkg/Include/Library/PciHostBridgeLib.h +++ b/MdeModulePkg/Include/Library/PciHostBridgeLib.h @@ -22,6 +22,7 @@ typedef struct { UINT64 Base; UINT64 Limit; + UINT64 Translation; } PCI_ROOT_BRIDGE_APERTURE;
typedef struct {