Hi Leif,
2017-01-11 13:28 GMT+01:00 Leif Lindholm leif.lindholm@linaro.org:
On Thu, Jan 05, 2017 at 12:03:37PM +0100, Marcin Wojtas wrote:
Following improvements were required:
- Set HS_ENABLE bit in HostCtrl1
- Do not disable clock when switching to HS200 mode
- Fix HS200 UHS mode value in HostCtrl2 register - Xenon controller uses custom value
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Marcin Wojtas mw@semihalf.com
Drivers/SdMmc/XenonDxe/EmmcDevice.c | 34 ++++++---------------------------- 1 file changed, 6 insertions(+), 28 deletions(-)
diff --git a/Drivers/SdMmc/XenonDxe/EmmcDevice.c b/Drivers/SdMmc/XenonDxe/EmmcDevice.c index 3f73194..f366038 100755 --- a/Drivers/SdMmc/XenonDxe/EmmcDevice.c +++ b/Drivers/SdMmc/XenonDxe/EmmcDevice.c @@ -819,8 +819,8 @@ EmmcSwitchToHS200 ( { EFI_STATUS Status; UINT8 HsTiming;
- UINT8 HostCtrl1; UINT8 HostCtrl2;
UINT16 ClockCtrl;
if ((BusWidth != 4) && (BusWidth != 8)) { return EFI_INVALID_PARAMETER;
@@ -831,12 +831,10 @@ EmmcSwitchToHS200 ( return Status; } //
- // Set to HS200/SDR104 timing
- //
- //
- // Stop bus clock at first
- // Set to High Speed timing //
- Status = SdMmcHcStopClock (PciIo, Slot);
- HostCtrl1 = BIT2;
A descriptive #define for that bit, please.
Code chunk + comment copied from another function (EmmcSwitchToHighSpeed). Anyway, ok - will fix.
- Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1); if (EFI_ERROR (Status)) { return Status; }
@@ -849,33 +847,13 @@ EmmcSwitchToHS200 ( return Status; } //
- // Set UHS Mode Select field of Host Control 2 reigster to SDR104
- // Set UHS Mode Select field of Host Control 2 reigster to Xenon-specific HS200 value. //
- HostCtrl2 = BIT0 | BIT1;
- HostCtrl2 = 0x5;
And those two.
I thought comment can be enough - will fix.
Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2); if (EFI_ERROR (Status)) { return Status; }
//
// Wait Internal Clock Stable in the Clock Control register to be 1 before set SD Clock Enable bit
//
Status = SdMmcHcWaitMmioSet (
PciIo,Slot,SD_MMC_HC_CLOCK_CTRL,sizeof (ClockCtrl),BIT1,BIT1,SD_MMC_HC_GENERIC_TIMEOUT);if (EFI_ERROR (Status)) {
return Status;
}
//
// Set SD Clock Enable in the Clock Control register to 1
//
ClockCtrl = BIT2;
Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
HsTiming = 2;
2 what? And please add the numeric value as a #define in SdMmcPciHci.h.
This one is not added in the patch - it's original code from edk2. Should I update it anyway?
Best regards, Marcin