On 2/12/2019 5:38 AM, Leif Lindholm wrote:
On Fri, Feb 01, 2019 at 10:25:03PM +0800, Ming Huang wrote:
As chip group suggestions, update Mbigen and gic RAS configuration flow.
Update how?
Add below flow: 1 Reset Mbigen; 2 Disable Mbigen clock; 3 Deassert reset Mbigen; 4 Enable Mbigen clock;
Thanks.
/ Leif
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang ming.huang@linaro.org
Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi | Bin 17984 -> 18720 bytes 1 file changed, 0 insertions(+), 0 deletions(-)
diff --git a/Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi b/Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi index 19adbc9..9ea21e9 100644 Binary files a/Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi and b/Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi differ -- 2.9.5