Rather then accessing the ARM_PROCESSOR_TABLE configuration table, retrieve the mailbox addresses for secondaries from the private HOB. This allows us to deprecate and ultimately get rid of this configuration table, since it exposes platform internals via an OS visible table, and this should be avoided if possible.

Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/OverdriveBoard/FdtDxe/BdsLinuxFdt.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/BdsLinuxFdt.c b/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/BdsLinuxFdt.c index 044ec8b33f9d..2768475aeda2 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/BdsLinuxFdt.c +++ b/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/BdsLinuxFdt.c @@ -382,7 +382,6 @@ AmdStyxPrepareFdt ( CHAR8 Name[10]; LIST_ENTRY ResourceList; BDS_SYSTEM_MEMORY_RESOURCE *Resource; - ARM_PROCESSOR_TABLE *ArmProcessorTable; ARM_CORE_INFO *ArmCoreInfoTable; UINTN ArmCoreCount; UINT32 PrimaryClusterId; @@ -547,13 +546,8 @@ AmdStyxPrepareFdt ( // in the kernel documentation: // Documentation/devicetree/bindings/arm/cpus.txt // - ArmProcessorTable = AmdStyxGetArmProcessorTable(); - ASSERT_EFI_ERROR (ArmProcessorTable == NULL); - ArmCoreInfoTable = ArmProcessorTable->ArmCpus; - - // Make sure SoC's core count does not exceed what we want to build - ArmCoreCount = ArmProcessorTable->NumberOfEntries; - ASSERT_EFI_ERROR (ArmCoreCount > NUM_CORES); + ArmCoreInfoTable = AmdStyxGetArmCoreInfoTable (&ArmCoreCount); + ASSERT (ArmCoreCount <= NUM_CORES);

// Get Id from primary CPU MpId = (UINTN) ArmReadMpidr ();

CelloBoard will not support the AMD XGBE network interface, so we can drop all the references to it from the CelloBoard DSC and FDF files.

Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 26 ++------------------ Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf | 8 ------ 2 files changed, 2 insertions(+), 32 deletions(-)

diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index fcdffbd278b5..9c623f227815 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -18,7 +18,6 @@ [Defines]

DEFINE NUM_CORES = 8 -DEFINE DO_XGBE = 0 DEFINE DO_KCS = 0 DEFINE DO_RTK = 0

@@ -267,8 +266,8 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) *_*_*_ASLPP_FLAGS = -x c -E -P $(ARCHCC_FLAGS) *_*_*_ASLCC_FLAGS = -x c $(ARCHCC_FLAGS)

- GCC:*_*_AARCH64_ARCHCC_FLAGS = -DDO_XGBE=$(DO_XGBE) -DDO_KCS=$(DO_KCS) -DDO_RTK=$(DO_RTK) -DNUM_CORES=$(NUM_CORES) -DARM_CPU_AARCH64 - GCC:*_*_AARCH64_PP_FLAGS = -DDO_XGBE=$(DO_XGBE) -DDO_KCS=$(DO_KCS) -DDO_RTK=$(DO_RTK) -DNUM_CORES=$(NUM_CORES) -DARM_CPU_AARCH64 + GCC:*_*_AARCH64_ARCHCC_FLAGS = -DDO_KCS=$(DO_KCS) -DDO_RTK=$(DO_RTK) -DNUM_CORES=$(NUM_CORES) -DARM_CPU_AARCH64 + GCC:*_*_AARCH64_PP_FLAGS = -DDO_KCS=$(DO_KCS) -DDO_RTK=$(DO_RTK) -DNUM_CORES=$(NUM_CORES) -DARM_CPU_AARCH64

GCC:*_*_AARCH64_PLATFORM_FLAGS = -I$(BIN_DIR)/OpenPlatformPkg/Platforms/AMD/Styx/AcpiTables/AcpiAml/OUTPUT

@@ -523,19 +522,6 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) gAmdModulePkgTokenSpaceGuid.PcdSataSerdesBase|0xE1200000 gAmdModulePkgTokenSpaceGuid.PcdSataSerdesOffset|0x00010000

-!if $(DO_XGBE) - gAmdModulePkgTokenSpaceGuid.PcdXgbeEnable|TRUE - - gAmdModulePkgTokenSpaceGuid.PcdPort0PhyMode|0 - gAmdModulePkgTokenSpaceGuid.PcdPort1PhyMode|0 - gAmdModulePkgTokenSpaceGuid.PcdPort0NetSpeed|1 - gAmdModulePkgTokenSpaceGuid.PcdPort1NetSpeed|1 - - gAmdModulePkgTokenSpaceGuid.PcdEthMacA|0x02A1A2A3A4A5 - gAmdModulePkgTokenSpaceGuid.PcdEthMacB|0x02B1B2B3B4B5 -!endif - - ################################################################################ # # Components Section - list of all EDK II Modules needed by this Platform @@ -638,14 +624,6 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf

-!if $(DO_XGBE) - # - # SNP support - # - AmdModulePkg/SnpDxe/SnpDxePort0.inf - AmdModulePkg/SnpDxe/SnpDxePort1.inf -!endif - # # Networking stack # diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf b/Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf index 3af47ef4c5b6..d6b18d3fd0f7 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf @@ -157,14 +157,6 @@ READ_LOCK_STATUS = TRUE INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf

-!if $(DO_XGBE) - # - # SNP support - # - INF AmdModulePkg/SnpDxe/SnpDxePort0.inf - INF AmdModulePkg/SnpDxe/SnpDxePort1.inf -!endif - # # Networking stack #

The GCD layer in DXE core claims the HOB that covers the PHIT memory allocation fully, even if this single HOB covers system memory completely. This means the memory allocation HOBs that are declared next have no effect, since they conflict with the allocation performed by DXE core, and are dropped silently.

Instead, describe system memory as two separate regions, one of which can be used to host the EfiReservedMemory allocation.

The EfiRuntimeServicesData allocation of the FD region also had no effect, but since it is unnecessary, let's just remove it.

Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c | 56 +++++++++++++------- 1 file changed, 38 insertions(+), 18 deletions(-)

diff --git a/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c b/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c index fd3b36ea45a1..ac172fa526c5 100644 --- a/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c +++ b/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c @@ -79,6 +79,8 @@ MemoryPeim ( IN UINT64 UefiMemorySize ) { + UINT64 Base, Size; + // Ensure PcdSystemMemorySize has been set ASSERT (PcdGet64 (PcdSystemMemorySize) != 0);

@@ -86,6 +88,40 @@ MemoryPeim ( // Now, the permanent memory has been installed, we can call AllocatePages() //

+ Base = PcdGet64 (PcdSystemMemoryBase); + Size = PcdGet64 (PcdSystemMemorySize); + if (FixedPcdGetBool (PcdTrustedFWSupport)) { + + // + // For now, we assume that the trusted firmware region is at the base of + // system memory, since that is much easier to deal with. + // + ASSERT (Base == PcdGet64 (PcdTrustedFWMemoryBase)); + + Base += PcdGet64 (PcdTrustedFWMemorySize); + Size -= PcdGet64 (PcdTrustedFWMemorySize); + + // Reserved Trusted Firmware region + BuildResourceDescriptorHob ( + EFI_RESOURCE_SYSTEM_MEMORY, + ( EFI_RESOURCE_ATTRIBUTE_PRESENT | + EFI_RESOURCE_ATTRIBUTE_INITIALIZED | + EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE | + EFI_RESOURCE_ATTRIBUTE_TESTED ), + PcdGet64 (PcdTrustedFWMemoryBase), + PcdGet64 (PcdTrustedFWMemorySize) + ); + + BuildMemoryAllocationHob ( + PcdGet64 (PcdTrustedFWMemoryBase), + PcdGet64 (PcdTrustedFWMemorySize), + EfiReservedMemoryType + ); + } + // Declare system memory BuildResourceDescriptorHob ( EFI_RESOURCE_SYSTEM_MEMORY, @@ -96,26 +132,10 @@ MemoryPeim ( EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE | EFI_RESOURCE_ATTRIBUTE_TESTED ), - PcdGet64 (PcdSystemMemoryBase), - PcdGet64 (PcdSystemMemorySize) + Base, + Size );

- // Reserve firmware - BuildMemoryAllocationHob ( - PcdGet64 (PcdFdBaseAddress), - PcdGet32 (PcdFdSize), - EfiRuntimeServicesData - ); - - // Reserved Trusted Firmware region - if (FixedPcdGetBool (PcdTrustedFWSupport)) { - BuildMemoryAllocationHob ( - PcdGet64 (PcdTrustedFWMemoryBase), - PcdGet64 (PcdTrustedFWMemorySize), - EfiReservedMemoryType - ); - } - // Build Memory Allocation Hob InitMmu ();

Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 27 ++++++++++++++++++++ Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf | 2 +- Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 27 ++++++++++++++++++++ Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.fdf | 2 +- 4 files changed, 56 insertions(+), 2 deletions(-)

diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index da7623c6b99e..98e08ba90828 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -677,3 +677,30 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) # OpenPlatformPkg/Platforms/AMD/Styx/Drivers/StyxRngDxe/StyxRngDxe.inf

+ # + # UEFI application (Shell Embedded Boot Loader) + # + ShellPkg/Application/Shell/Shell.inf { + <LibraryClasses> + ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf + NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf + NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf + NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf + NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf + NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf + NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf + NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf + NULL|ShellPkg/Library/UefiShellTftpCommandLib/UefiShellTftpCommandLib.inf + HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf + BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgCommandLib.inf + + FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf + ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf + + <PcdsFixedAtBuild> + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE + gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000 + } diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf b/Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf index d6b18d3fd0f7..333a6e4c619d 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf @@ -197,7 +197,7 @@ READ_LOCK_STATUS = TRUE # # UEFI application (Shell Embedded Boot Loader) # - INF ShellBinPkg/UefiShell/UefiShell.inf + INF ShellPkg/Application/Shell/Shell.inf

# # Bds diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index ae797f5f184a..d069851b5c93 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -717,3 +717,30 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) # OpenPlatformPkg/Platforms/AMD/Styx/Drivers/StyxRngDxe/StyxRngDxe.inf

+ # + # UEFI application (Shell Embedded Boot Loader) + # + ShellPkg/Application/Shell/Shell.inf { + <LibraryClasses> + ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf + NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf + NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf + NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf + NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf + NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf + NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf + NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf + NULL|ShellPkg/Library/UefiShellTftpCommandLib/UefiShellTftpCommandLib.inf + HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf + BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgCommandLib.inf + + FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf + ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf + + <PcdsFixedAtBuild> + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE + gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000 + } diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.fdf b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.fdf index b712337aacfd..679e71a10fae 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.fdf +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.fdf @@ -215,7 +215,7 @@ READ_LOCK_STATUS = TRUE # # UEFI application (Shell Embedded Boot Loader) # - INF ShellBinPkg/UefiShell/UefiShell.inf + INF ShellPkg/Application/Shell/Shell.inf

# # Bds

Since ACPI is mandatory on ARM 64-bit servers while FDT support is optional, it makes sense to move shared functionality to the ACPI driver. So move the parking protocol code to AcpiPlatformDxe. This way, we can [conditionally] remove FdtDxe from the build without affecting ACPI parking protocol functionality.

Note that this requires the dispatch of FdtDxe to be strictly order after the dispatch of ApciPlatformDxe, so update the FdtDxe Depex expression as well.

Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/AmdStyx.dec | 3 +++ Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c | 7 +++++++ Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf | 15 ++++++++++++++- Platforms/AMD/Styx/{OverdriveBoard/FdtDxe/AArch64/BdsLinuxLoader.c => Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocol.c} | 13 +++++-------- Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocol.h | 19 +++++++++++++++++++ Platforms/AMD/Styx/{OverdriveBoard/FdtDxe/AArch64/BdsLinuxLoaderHelper.S => Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocolHelper.S} | 0 Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.c | 5 ----- Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.inf | 8 +------- 8 files changed, 49 insertions(+), 21 deletions(-)

diff --git a/Platforms/AMD/Styx/AmdStyx.dec b/Platforms/AMD/Styx/AmdStyx.dec index ad65fc9eaf8b..3bdb4f83f858 100644 --- a/Platforms/AMD/Styx/AmdStyx.dec +++ b/Platforms/AMD/Styx/AmdStyx.dec @@ -42,6 +42,9 @@ gAmdStyxTokenSpaceGuid = { 0x220d9653, 0x4a0e, 0x40bc, { 0xb3, 0x65, 0x2f, 0xbb, 0xa2, 0xd9, 0x03, 0x45 } } gAmdStyxMpCoreInfoGuid = { 0x68efeabd, 0xcb77, 0x4aa5, { 0xbf, 0x0c, 0xa3, 0x31, 0xfc, 0xcf, 0x76, 0x66 } }

+ # used to manually order the dispatch of FdtDxe after AcpiPlatformDxe + gAmdStyxAcpiPlatformDxeFileGuid = { 0xf229c831, 0x6a35, 0x440b, { 0x9c, 0x84, 0xdd, 0x3b, 0xc7, 0x1e, 0x38, 0x65 } } + [PcdsDynamic] gAmdStyxTokenSpaceGuid.PcdSocCoreCount|1|UINT32|0x00000100 gAmdStyxTokenSpaceGuid.PcdSocCpuId|1|UINT32|0x00000101 diff --git a/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c b/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c index 36db0e2211f3..3b3d36eea007 100644 --- a/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c +++ b/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c @@ -26,6 +26,7 @@ #include <Library/UefiBootServicesTableLib.h> #include <Library/DebugLib.h>

+#include <AcpiPlatformParkingProtocol.h>

#define MAX_ACPI_TABLES 12

@@ -55,6 +56,12 @@ AcpiPlatformEntryPoint ( UINTN TableHandle; UINTN TableIndex;

+ // Move secondary cores to a Pen compliant with MP-Parking protocol + if (!FixedPcdGetBool (PcdPsciOsSupport) && + FixedPcdGetBool (PcdTrustedFWSupport)) { + AmdStyxParkSecondaryCores(); + } + ZeroMem(AcpiTableList, sizeof(AcpiTableList));

TableIndex = 0; diff --git a/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf b/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf index d78d7ef330d8..6a3d6ec0e949 100644 --- a/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf +++ b/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf @@ -28,10 +28,15 @@

[Sources] AcpiPlatform.c + AcpiPlatformParkingProtocol.c + +[Sources.AARCH64] + AcpiPlatformParkingProtocolHelper.S

[Packages] MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec + AmdModulePkg/AmdModulePkg.dec OpenPlatformPkg/Platforms/AMD/Styx/AmdStyx.dec

[LibraryClasses] @@ -44,10 +49,18 @@ UefiDriverEntryPoint AmdStyxHelperLib AmdStyxAcpiLib + ArmSmcLib + CacheMaintenanceLib + +[FixedPcd] + gAmdStyxTokenSpaceGuid.PcdParkingProtocolVersion + gAmdStyxTokenSpaceGuid.PcdParkingProtocolBase + gAmdStyxTokenSpaceGuid.PcdParkingProtocolSize + gAmdStyxTokenSpaceGuid.PcdPsciOsSupport + gAmdStyxTokenSpaceGuid.PcdTrustedFWSupport

[Protocols] gEfiAcpiTableProtocolGuid # PROTOCOL ALWAYS_CONSUMED

[Depex] gEfiAcpiTableProtocolGuid - diff --git a/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/AArch64/BdsLinuxLoader.c b/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocol.c similarity index 91% rename from Platforms/AMD/Styx/OverdriveBoard/FdtDxe/AArch64/BdsLinuxLoader.c rename to Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocol.c index 6e0519edd9da..be85f3f442f0 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/AArch64/BdsLinuxLoader.c +++ b/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocol.c @@ -2,6 +2,7 @@ * * Copyright (c) 2011-2014, ARM Limited. All rights reserved.<BR> * Copyright (c) 2014 - 2015, AMD Inc. All rights reserved.<BR> +* Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR> * * This program and the accompanying materials * are licensed and made available under the terms and conditions of the BSD License @@ -18,11 +19,11 @@

**/

+#include <Base.h> +#include <Library/ArmLib.h> #include <Library/ArmSmcLib.h> #include <Library/CacheMaintenanceLib.h> #include <Library/PcdLib.h> -#include <Base.h> -#include <BdsLib/BdsInternal.h>

#include <Common/CoreState.h> #include <IndustryStandard/ArmStdSmc.h> @@ -67,7 +68,7 @@ AmdStyxBringupSecondary (

VOID EFIAPI -AmdStyxParkSecondaryCores( +AmdStyxParkSecondaryCores ( VOID ) { @@ -104,11 +105,7 @@ AmdStyxParkSecondaryCores( // Reserve the memory as RuntimeServices Status = gBS->AllocatePages (AllocateAddress, EfiRuntimeServicesCode, EFI_SIZE_TO_PAGES (MpParkingSize ), &MpParkingBase ); - if (EFI_ERROR (Status)) { - Print (L"Warning: Failed to reserve memory for MP-Parking protocol at 0x%lX, Status = %r\n", - MpParkingBase, Status); - // Even if there is a risk of memory corruption we carry on - } + ASSERT_EFI_ERROR (Status);

// Relocate the Pen code CopyMem ((VOID*)(PenBase), (VOID*)&SecondariesPenStart, PenSize); diff --git a/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocol.h b/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocol.h new file mode 100644 index 000000000000..fb79a803026d --- /dev/null +++ b/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocol.h @@ -0,0 +1,19 @@ +/** @file +* +* Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR> +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +VOID +EFIAPI +AmdStyxParkSecondaryCores ( + VOID + ); diff --git a/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/AArch64/BdsLinuxLoaderHelper.S b/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocolHelper.S similarity index 100% rename from Platforms/AMD/Styx/OverdriveBoard/FdtDxe/AArch64/BdsLinuxLoaderHelper.S rename to Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocolHelper.S diff --git a/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.c b/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.c index 08430730f6ca..58599e8e1714 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.c +++ b/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.c @@ -117,11 +117,6 @@ FdtReadyToBoot ( UINTN FdtBlobSize = 0; EFI_DEVICE_PATH *FdtDevicePath;

- // Move secondary cores to a Pen complaint with MP-Parking protocol - if (!FixedPcdGetBool (PcdPsciOsSupport) && FixedPcdGetBool (PcdTrustedFWSupport)) { - AmdStyxParkSecondaryCores(); - } - // Search for FDT blob in EFI partition Status = FdtOverrideDevicePath(L"fdt.dtb", &FdtDevicePath); if (!EFI_ERROR (Status)) { diff --git a/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.inf b/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.inf index 5653cac39b71..813324f6d308 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.inf +++ b/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.inf @@ -32,10 +32,6 @@ BdsLinuxFdt.c LinuxLoaderHelper.c

-[Sources.AARCH64] - AArch64/BdsLinuxLoader.c - AArch64/BdsLinuxLoaderHelper.S | GCC - [Packages] ArmPkg/ArmPkg.dec EmbeddedPkg/EmbeddedPkg.dec @@ -78,8 +74,6 @@ gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment gAmdStyxTokenSpaceGuid.PcdPsciOsSupport gAmdStyxTokenSpaceGuid.PcdTrustedFWSupport - gAmdStyxTokenSpaceGuid.PcdParkingProtocolBase - gAmdStyxTokenSpaceGuid.PcdParkingProtocolSize

[Depex] - TRUE + AFTER gAmdStyxAcpiPlatformDxeFileGuid

This implements a firmware volume block I/O protocol driver on top of the SPI flash that is exposed by the SCP. Since the generic FTW and variable drivers cannot deal with non-memorymapped flash, this driver uses a RuntimeServicesData buffer to expose the varstore slice of the SPI flash, and keeps it in sync when the Write() or Erase() methods are called.

Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/AmdStyx.dec | 6 + Platforms/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.c | 503 ++++++++++++++++++++ Platforms/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.inf | 63 +++ 3 files changed, 572 insertions(+)

diff --git a/Platforms/AMD/Styx/AmdStyx.dec b/Platforms/AMD/Styx/AmdStyx.dec index bec1d21ee4bb..d409c7b74397 100644 --- a/Platforms/AMD/Styx/AmdStyx.dec +++ b/Platforms/AMD/Styx/AmdStyx.dec @@ -112,3 +112,9 @@ gAmdStyxTokenSpaceGuid.PcdParkingProtocolVersion|1|UINT32|0x000b0000 gAmdStyxTokenSpaceGuid.PcdParkingProtocolSize|0x0000008000|UINT64|0x000b0002

+ # The original offset in memory of the NV store firmware volume, before + # relocating it to a dynamically allocated buffer. We need this to correlate + # flash accesses to the in-memory copy with LBAs in the actual SPI flash + gAmdStyxTokenSpaceGuid.PcdFlashNvStorageOriginalBase|0|UINT64|0x000c0000 + # block size to use when invoking the ISCP FV methods + gAmdStyxTokenSpaceGuid.PcdFlashNvStorageBlockSize|0x1000|UINT32|0x000c0001 diff --git a/Platforms/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.c b/Platforms/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.c new file mode 100644 index 000000000000..e27d9afd6c22 --- /dev/null +++ b/Platforms/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.c @@ -0,0 +1,503 @@ +/** @file + + FV block I/O protocol driver for Styx SPI flash exposed via ISCP + + Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR> + + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include <PiDxe.h> + +#include <Library/BaseMemoryLib.h> +#include <Library/DebugLib.h> +#include <Library/PcdLib.h> +#include <Library/UefiBootServicesTableLib.h> +#include <Library/UefiRuntimeLib.h> + +#include <Protocol/AmdIscpDxeProtocol.h> +#include <Protocol/FirmwareVolumeBlock.h> + +// TODO: replace with FixedPcdGet64 (PcdFdBaseAddress) once we have updated +// the .FDF to let STYX_EFI.fd cover the entire SPI flash +#define SPI_BASE 0x8000C80000UL +#define BLOCK_SIZE (FixedPcdGet32 (PcdFlashNvStorageBlockSize)) + +STATIC AMD_ISCP_DXE_PROTOCOL *mIscpDxeProtocol; +STATIC EFI_HANDLE mStyxSpiFvHandle; + +STATIC EFI_EVENT mVirtualAddressChangeEvent; + +STATIC UINT64 mNvStorageBase; +STATIC UINT64 mNvStorageLbaOffset; + +STATIC CONST UINT64 mNvStorageSize = FixedPcdGet32 (PcdFlashNvStorageVariableSize) + + FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize) + + FixedPcdGet32 (PcdFlashNvStorageFtwSpareSize); + + +/** + Notification function of EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE. + + This is a notification function registered on EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE event. + It convers pointer to new virtual address. + + @param Event Event whose notification function is being invoked. + @param Context Pointer to the notification function's context. + +**/ +STATIC +VOID +EFIAPI +VariableClassAddressChangeEvent ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + EfiConvertPointer (0x0, (VOID **)&mIscpDxeProtocol); + EfiConvertPointer (0x0, (VOID **)&mNvStorageBase); +} + +/** + The GetAttributes() function retrieves the attributes and + current settings of the block. + + @param This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance. + + @param Attributes Pointer to EFI_FVB_ATTRIBUTES_2 in which the + attributes and current settings are + returned. Type EFI_FVB_ATTRIBUTES_2 is defined + in EFI_FIRMWARE_VOLUME_HEADER. + + @retval EFI_SUCCESS The firmware volume attributes were + returned. + +**/ +STATIC +EFI_STATUS +StyxSpiFvDxeGetAttributes ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + OUT EFI_FVB_ATTRIBUTES_2 *Attributes + ) +{ + *Attributes = EFI_FVB2_READ_ENABLED_CAP | // Reads may be enabled + EFI_FVB2_READ_STATUS | // Reads are currently enabled + EFI_FVB2_WRITE_STATUS | // Writes are currently enabled + EFI_FVB2_WRITE_ENABLED_CAP | // Writes may be enabled + EFI_FVB2_STICKY_WRITE | // A block erase is required to flip bits into EFI_FVB2_ERASE_POLARITY + EFI_FVB2_MEMORY_MAPPED | // It is memory mapped + EFI_FVB2_ERASE_POLARITY; // After erasure all bits take this value (i.e. '1') + + return EFI_SUCCESS; +} + +/** + The SetAttributes() function sets configurable firmware volume + attributes and returns the new settings of the firmware volume. + + @param This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance. + + @param Attributes On input, Attributes is a pointer to + EFI_FVB_ATTRIBUTES_2 that contains the + desired firmware volume settings. On + successful return, it contains the new + settings of the firmware volume. Type + EFI_FVB_ATTRIBUTES_2 is defined in + EFI_FIRMWARE_VOLUME_HEADER. + + @retval EFI_SUCCESS The firmware volume attributes were returned. + + @retval EFI_INVALID_PARAMETER The attributes requested are in + conflict with the capabilities + as declared in the firmware + volume header. + +**/ +STATIC +EFI_STATUS +StyxSpiFvDxeSetAttributes ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes + ) +{ + return EFI_SUCCESS; // ignore for now +} + +/** + The GetPhysicalAddress() function retrieves the base address of + a memory-mapped firmware volume. This function should be called + only for memory-mapped firmware volumes. + + @param This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance. + + @param Address Pointer to a caller-allocated + EFI_PHYSICAL_ADDRESS that, on successful + return from GetPhysicalAddress(), contains the + base address of the firmware volume. + + @retval EFI_SUCCESS The firmware volume base address was returned. + + @retval EFI_UNSUPPORTED The firmware volume is not memory mapped. + +**/ +STATIC +EFI_STATUS +StyxSpiFvDxeGetPhysicalAddress ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + OUT EFI_PHYSICAL_ADDRESS *Address + ) +{ + *Address = (EFI_PHYSICAL_ADDRESS)mNvStorageBase; + return EFI_SUCCESS; +} + +/** + The GetBlockSize() function retrieves the size of the requested + block. It also returns the number of additional blocks with + the identical size. The GetBlockSize() function is used to + retrieve the block map (see EFI_FIRMWARE_VOLUME_HEADER). + + + @param This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance. + + @param Lba Indicates the block for which to return the size. + + @param BlockSize Pointer to a caller-allocated UINTN in which + the size of the block is returned. + + @param NumberOfBlocks Pointer to a caller-allocated UINTN in + which the number of consecutive blocks, + starting with Lba, is returned. All + blocks in this range have a size of + BlockSize. + + + @retval EFI_SUCCESS The firmware volume base address was returned. + + @retval EFI_INVALID_PARAMETER The requested LBA is out of range. + +**/ +STATIC +EFI_STATUS +StyxSpiFvDxeGetBlockSize ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + IN EFI_LBA Lba, + OUT UINTN *BlockSize, + OUT UINTN *NumberOfBlocks + ) +{ + *BlockSize = BLOCK_SIZE; + *NumberOfBlocks = mNvStorageSize / BLOCK_SIZE - (UINTN)Lba; + + return EFI_SUCCESS; +} + +/** + Reads the specified number of bytes into a buffer from the specified block. + + The Read() function reads the requested number of bytes from the + requested block and stores them in the provided buffer. + Implementations should be mindful that the firmware volume + might be in the ReadDisabled state. If it is in this state, + the Read() function must return the status code + EFI_ACCESS_DENIED without modifying the contents of the + buffer. The Read() function must also prevent spanning block + boundaries. If a read is requested that would span a block + boundary, the read must read up to the boundary but not + beyond. The output parameter NumBytes must be set to correctly + indicate the number of bytes actually read. The caller must be + aware that a read may be partially completed. + + @param This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance. + + @param Lba The starting logical block index + from which to read. + + @param Offset Offset into the block at which to begin reading. + + @param NumBytes Pointer to a UINTN. At entry, *NumBytes + contains the total size of the buffer. At + exit, *NumBytes contains the total number of + bytes read. + + @param Buffer Pointer to a caller-allocated buffer that will + be used to hold the data that is read. + + @retval EFI_SUCCESS The firmware volume was read successfully, + and contents are in Buffer. + + @retval EFI_BAD_BUFFER_SIZE Read attempted across an LBA + boundary. On output, NumBytes + contains the total number of bytes + returned in Buffer. + + @retval EFI_ACCESS_DENIED The firmware volume is in the + ReadDisabled state. + + @retval EFI_DEVICE_ERROR The block device is not + functioning correctly and could + not be read. + +**/ +STATIC +EFI_STATUS +StyxSpiFvDxeRead ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + IN EFI_LBA Lba, + IN UINTN Offset, + IN OUT UINTN *NumBytes, + IN OUT UINT8 *Buffer + ) +{ + VOID *Base; + + if (Offset + *NumBytes > BLOCK_SIZE) { + return EFI_BAD_BUFFER_SIZE; + } + + Base = (VOID *)mNvStorageBase + Lba * BLOCK_SIZE + Offset; + + // + // Copy the data from the in-memory image + // + CopyMem (Buffer, Base, *NumBytes); + + DEBUG_CODE_BEGIN (); + EFI_STATUS Status; + + if (!EfiAtRuntime ()) { + Lba += mNvStorageLbaOffset; + Status = mIscpDxeProtocol->AmdExecuteLoadFvBlockDxe (mIscpDxeProtocol, + Lba * BLOCK_SIZE + Offset, Buffer, *NumBytes); + ASSERT_EFI_ERROR (Status); + + ASSERT (CompareMem (Base, Buffer, *NumBytes) == 0); + } + DEBUG_CODE_END (); + + return EFI_SUCCESS; +} + +/** + Writes the specified number of bytes from the input buffer to the block. + + The Write() function writes the specified number of bytes from + the provided buffer to the specified block and offset. If the + firmware volume is sticky write, the caller must ensure that + all the bits of the specified range to write are in the + EFI_FVB_ERASE_POLARITY state before calling the Write() + function, or else the result will be unpredictable. This + unpredictability arises because, for a sticky-write firmware + volume, a write may negate a bit in the EFI_FVB_ERASE_POLARITY + state but cannot flip it back again. Before calling the + Write() function, it is recommended for the caller to first call + the EraseBlocks() function to erase the specified block to + write. A block erase cycle will transition bits from the + (NOT)EFI_FVB_ERASE_POLARITY state back to the + EFI_FVB_ERASE_POLARITY state. Implementations should be + mindful that the firmware volume might be in the WriteDisabled + state. If it is in this state, the Write() function must + return the status code EFI_ACCESS_DENIED without modifying the + contents of the firmware volume. The Write() function must + also prevent spanning block boundaries. If a write is + requested that spans a block boundary, the write must store up + to the boundary but not beyond. The output parameter NumBytes + must be set to correctly indicate the number of bytes actually + written. The caller must be aware that a write may be + partially completed. All writes, partial or otherwise, must be + fully flushed to the hardware before the Write() service + returns. + + @param This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance. + + @param Lba The starting logical block index to write to. + + @param Offset Offset into the block at which to begin writing. + + @param NumBytes The pointer to a UINTN. At entry, *NumBytes + contains the total size of the buffer. At + exit, *NumBytes contains the total number of + bytes actually written. + + @param Buffer The pointer to a caller-allocated buffer that + contains the source for the write. + + @retval EFI_SUCCESS The firmware volume was written successfully. + + @retval EFI_BAD_BUFFER_SIZE The write was attempted across an + LBA boundary. On output, NumBytes + contains the total number of bytes + actually written. + + @retval EFI_ACCESS_DENIED The firmware volume is in the + WriteDisabled state. + + @retval EFI_DEVICE_ERROR The block device is malfunctioning + and could not be written. + + +**/ +STATIC +EFI_STATUS +StyxSpiFvDxeWrite ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + IN EFI_LBA Lba, + IN UINTN Offset, + IN OUT UINTN *NumBytes, + IN UINT8 *Buffer + ) +{ + EFI_STATUS Status; + VOID *Base; + + if (Offset + *NumBytes > BLOCK_SIZE) { + return EFI_BAD_BUFFER_SIZE; + } + + Base = (VOID *)mNvStorageBase + Lba * BLOCK_SIZE + Offset; + + Lba += mNvStorageLbaOffset; + Status = mIscpDxeProtocol->AmdExecuteUpdateFvBlockDxe (mIscpDxeProtocol, + Lba * BLOCK_SIZE + Offset, Buffer, *NumBytes); + if (!EFI_ERROR (Status)) { + // + // Copy the data we just wrote to the in-memory copy of the + // firmware volume + // + CopyMem (Base, Buffer, *NumBytes); + } + return Status; +} + +/** + Erases and initializes a firmware volume block. + + The EraseBlocks() function erases one or more blocks as denoted + by the variable argument list. The entire parameter list of + blocks must be verified before erasing any blocks. If a block is + requested that does not exist within the associated firmware + volume (it has a larger index than the last block of the + firmware volume), the EraseBlocks() function must return the + status code EFI_INVALID_PARAMETER without modifying the contents + of the firmware volume. Implementations should be mindful that + the firmware volume might be in the WriteDisabled state. If it + is in this state, the EraseBlocks() function must return the + status code EFI_ACCESS_DENIED without modifying the contents of + the firmware volume. All calls to EraseBlocks() must be fully + flushed to the hardware before the EraseBlocks() service + returns. + + @param This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL + instance. + + @param ... The variable argument list is a list of tuples. + Each tuple describes a range of LBAs to erase + and consists of the following: + - An EFI_LBA that indicates the starting LBA + - A UINTN that indicates the number of blocks to + erase. + + The list is terminated with an + EFI_LBA_LIST_TERMINATOR. For example, the + following indicates that two ranges of blocks + (5-7 and 10-11) are to be erased: EraseBlocks + (This, 5, 3, 10, 2, EFI_LBA_LIST_TERMINATOR); + + @retval EFI_SUCCESS The erase request successfully + completed. + + @retval EFI_ACCESS_DENIED The firmware volume is in the + WriteDisabled state. + @retval EFI_DEVICE_ERROR The block device is not functioning + correctly and could not be written. + The firmware device may have been + partially erased. + @retval EFI_INVALID_PARAMETER One or more of the LBAs listed + in the variable argument list do + not exist in the firmware volume. + +**/ +STATIC +EFI_STATUS +StyxSpiFvDxeErase ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + ... + ) +{ + VA_LIST Args; + EFI_LBA Start; + UINTN Length; + EFI_STATUS Status; + + VA_START (Args, This); + + for (Start = VA_ARG (Args, EFI_LBA); + Start != EFI_LBA_LIST_TERMINATOR; + Start = VA_ARG (Args, EFI_LBA)) { + Start += mNvStorageLbaOffset; + Length = VA_ARG (Args, UINTN); + Status = mIscpDxeProtocol->AmdExecuteEraseFvBlockDxe (mIscpDxeProtocol, + (Start + mNvStorageLbaOffset) * BLOCK_SIZE, + Length * BLOCK_SIZE); + if (!EFI_ERROR (Status)) { + SetMem64 ((VOID *)mNvStorageBase + Start * BLOCK_SIZE, + Length * BLOCK_SIZE, ~0UL); + } + } + + VA_END (Args); + + return EFI_SUCCESS; +} + +STATIC +EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL mStyxSpiFvProtocol = { + StyxSpiFvDxeGetAttributes, + StyxSpiFvDxeSetAttributes, + StyxSpiFvDxeGetPhysicalAddress, + StyxSpiFvDxeGetBlockSize, + StyxSpiFvDxeRead, + StyxSpiFvDxeWrite, + StyxSpiFvDxeErase +}; + +EFI_STATUS +EFIAPI +StyxSpiFvDxeInitialize ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + mNvStorageBase = PcdGet64 (PcdFlashNvStorageVariableBase64); + mNvStorageLbaOffset = (FixedPcdGet64 (PcdFlashNvStorageOriginalBase) - + SPI_BASE) / BLOCK_SIZE; + + DEBUG ((EFI_D_INFO, + "%a: Using NV store FV in-memory copy at 0x%lx, LBA offset == 0x%lx\n", + __FUNCTION__, mNvStorageBase, mNvStorageLbaOffset)); + + Status = gBS->LocateProtocol (&gAmdIscpDxeProtocolGuid, NULL, + (VOID **)&mIscpDxeProtocol); + if (EFI_ERROR (Status)) { + return Status; + } + + Status = gBS->CreateEventEx (EVT_NOTIFY_SIGNAL, TPL_NOTIFY, + VariableClassAddressChangeEvent, NULL, + &gEfiEventVirtualAddressChangeGuid, + &mVirtualAddressChangeEvent); + ASSERT_EFI_ERROR (Status); + + return gBS->InstallMultipleProtocolInterfaces (&mStyxSpiFvHandle, + &gEfiFirmwareVolumeBlockProtocolGuid, &mStyxSpiFvProtocol, + NULL); +} diff --git a/Platforms/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.inf b/Platforms/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.inf new file mode 100644 index 000000000000..2c1f243c76e9 --- /dev/null +++ b/Platforms/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.inf @@ -0,0 +1,63 @@ +#/** @file +# +# Component description file for StyxSpiFvDxe module +# +# Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR> +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = StyxSpiFvDxe + FILE_GUID = F549FC67-C4A6-4E92-B9BA-297E1F82A1A8 + MODULE_TYPE = DXE_RUNTIME_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = StyxSpiFvDxeInitialize + +[Sources] + StyxSpiFvDxe.c + +[Packages] + ArmPkg/ArmPkg.dec + AmdModulePkg/AmdModulePkg.dec + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + OpenPlatformPkg/Platforms/AMD/Styx/AmdStyx.dec + +[LibraryClasses] + BaseLib + DebugLib + UefiLib + UefiDriverEntryPoint + UefiBootServicesTableLib + UefiRuntimeLib + DxeServicesTableLib + +[FixedPcd] + gArmTokenSpaceGuid.PcdFdBaseAddress + + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize + gAmdStyxTokenSpaceGuid.PcdFlashNvStorageOriginalBase + gAmdStyxTokenSpaceGuid.PcdFlashNvStorageBlockSize + +[Pcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64 + +[Protocols] + gAmdIscpDxeProtocolGuid ## CONSUMES + gEfiFirmwareVolumeBlockProtocolGuid ## PRODUCES + +[Depex] + gAmdIscpDxeProtocolGuid

Before the DXE core has a chance to overwrite the in-memory copy of the varstore FV, relocate it to a dynamically allocated buffer. Note that, while this allocation is not made from the temporary PEI heap, the bookkeeping involved in calling AllocateAlignedRuntimePages() appears to push the envelope slightly, and so we need to increase the initial stack size (which is actually stack + heap)

Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 6 ++- Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c | 41 ++++++++++++++++++++ Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf | 9 +++++ Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 6 ++- 4 files changed, 60 insertions(+), 2 deletions(-)

diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index 98e08ba90828..52b891d9d1e4 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -400,7 +400,7 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2)

# Stacks for MPCores in Normal World gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x8001680000 - gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x6000 + gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000 gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x800

# Stacks for MPCores in Monitor Mode @@ -524,6 +524,10 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) gAmdModulePkgTokenSpaceGuid.PcdSataSerdesBase|0xE1200000 gAmdModulePkgTokenSpaceGuid.PcdSataSerdesOffset|0x00010000

+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0x0 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|0x0 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|0x0 + ################################################################################ # # Components Section - list of all EDK II Modules needed by this Platform diff --git a/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c b/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c index ac172fa526c5..77116274c770 100644 --- a/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c +++ b/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c @@ -24,6 +24,7 @@ #include <PiPei.h>

#include <Library/ArmPlatformLib.h> +#include <Library/BaseMemoryLib.h> #include <Library/DebugLib.h> #include <Library/HobLib.h> #include <Library/MemoryAllocationLib.h> @@ -56,6 +57,44 @@ InitMmu ( } }

+STATIC +VOID +MoveNvStoreImage ( + VOID + ) +{ + VOID *OldBase, *NewBase; + UINTN Size; + + // + // Move the in-memory image of the NV store firmware volume to a dynamically + // allocated buffer. This gets rid of the annoying static memory reservation + // at the base of memory where all other UEFI allocations are near the top. + // + OldBase = (VOID *)FixedPcdGet64 (PcdFlashNvStorageOriginalBase); + + Size = FixedPcdGet32 (PcdFlashNvStorageVariableSize) + + FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize) + + FixedPcdGet32 (PcdFlashNvStorageFtwSpareSize); + + NewBase = AllocateAlignedRuntimePages (EFI_SIZE_TO_PAGES (Size), SIZE_64KB); + ASSERT (NewBase != NULL); + + CopyMem (NewBase, OldBase, Size); + + DEBUG ((EFI_D_INFO, "%a: Relocating NV store FV from %p to %p\n", + __FUNCTION__, OldBase, NewBase)); + + PcdSet64 (PcdFlashNvStorageVariableBase64, (UINT64)NewBase); + + PcdSet64 (PcdFlashNvStorageFtwWorkingBase64, (UINT64)NewBase + + FixedPcdGet32 (PcdFlashNvStorageVariableSize)); + + PcdSet64 (PcdFlashNvStorageFtwSpareBase64, (UINT64)NewBase + + FixedPcdGet32 (PcdFlashNvStorageVariableSize) + + FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize)); +} + /*++

Routine Description: @@ -144,5 +183,7 @@ MemoryPeim ( BuildMemoryTypeInformationHob (); }

+ MoveNvStoreImage (); + return EFI_SUCCESS; } diff --git a/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf b/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf index adacd700083c..0201964003d0 100644 --- a/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf +++ b/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf @@ -78,9 +78,18 @@

gAmdStyxTokenSpaceGuid.PcdIscpSupport

+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize + gAmdStyxTokenSpaceGuid.PcdFlashNvStorageOriginalBase + [Pcd] gArmTokenSpaceGuid.PcdSystemMemoryBase gArmTokenSpaceGuid.PcdSystemMemorySize

+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64 + [Depex] gAmdStyxPlatInitPpiGuid diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index d069851b5c93..a1a755180da0 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -404,7 +404,7 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2)

# Stacks for MPCores in Normal World gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x8001680000 - gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x6000 + gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000 gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x800

# Stacks for MPCores in Monitor Mode @@ -549,6 +549,10 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) gAmdModulePkgTokenSpaceGuid.PcdEthMacB|0x02B1B2B3B4B5 !endif

+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0x0 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|0x0 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|0x0 +

################################################################################ #